]> git.sur5r.net Git - u-boot/commitdiff
ppc: Move fpga_state to arch_global_data
authorSimon Glass <sjg@chromium.org>
Thu, 13 Dec 2012 20:49:02 +0000 (20:49 +0000)
committerTom Rini <trini@ti.com>
Mon, 4 Feb 2013 14:05:44 +0000 (09:05 -0500)
Move this field into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
arch/powerpc/include/asm/global_data.h
board/gdsys/405ep/405ep.c
board/gdsys/405ex/405ex.c
board/gdsys/405ex/io64.c

index 6f88b764659ab68f86af651f2c2021330a301749..52aece012c014391f042b4293a321b62f8c693e2 100644 (file)
@@ -122,6 +122,9 @@ struct arch_global_data {
 #if defined(CONFIG_SYS_GT_6426x)
        unsigned int mirror_hack[16];
 #endif
+#ifdef CONFIG_SYS_FPGA_COUNT
+       unsigned fpga_state[CONFIG_SYS_FPGA_COUNT];
+#endif
 };
 
 /*
@@ -170,9 +173,6 @@ typedef     struct  global_data {
 #if defined(CONFIG_LWMON) || defined(CONFIG_LWMON5)
        unsigned long kbd_status;
 #endif
-#ifdef CONFIG_SYS_FPGA_COUNT
-       unsigned fpga_state[CONFIG_SYS_FPGA_COUNT];
-#endif
 #if defined(CONFIG_WD_MAX_RATE)
        unsigned long long wdt_last;    /* trace watch-dog triggering rate */
 #endif
index bc9b7d0a971bd78bfd62f5000d95813d0ded3e63..622117109280b0e976607d74161787dbbac90df9 100644 (file)
@@ -38,14 +38,14 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int get_fpga_state(unsigned dev)
 {
-       return gd->fpga_state[dev];
+       return gd->arch.fpga_state[dev];
 }
 
 void print_fpga_state(unsigned dev)
 {
-       if (gd->fpga_state[dev] & FPGA_STATE_DONE_FAILED)
+       if (gd->arch.fpga_state[dev] & FPGA_STATE_DONE_FAILED)
                puts("       Waiting for FPGA-DONE timed out.\n");
-       if (gd->fpga_state[dev] & FPGA_STATE_REFLECTION_FAILED)
+       if (gd->arch.fpga_state[dev] & FPGA_STATE_REFLECTION_FAILED)
                puts("       FPGA reflection test failed.\n");
 }
 
@@ -54,7 +54,7 @@ int board_early_init_f(void)
        unsigned k;
 
        for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k)
-               gd->fpga_state[k] = 0;
+               gd->arch.fpga_state[k] = 0;
 
        mtdcr(UIC0SR, 0xFFFFFFFF);      /* clear all ints */
        mtdcr(UIC0ER, 0x00000000);      /* disable all ints */
@@ -78,7 +78,7 @@ int board_early_init_r(void)
        unsigned ctr;
 
        for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k)
-               gd->fpga_state[k] = 0;
+               gd->arch.fpga_state[k] = 0;
 
        /*
         * reset FPGA
@@ -94,7 +94,8 @@ int board_early_init_r(void)
                while (!gd405ep_get_fpga_done(k)) {
                        udelay(100000);
                        if (ctr++ > 5) {
-                               gd->fpga_state[k] |= FPGA_STATE_DONE_FAILED;
+                               gd->arch.fpga_state[k] |=
+                                       FPGA_STATE_DONE_FAILED;
                                break;
                        }
                }
@@ -126,7 +127,7 @@ int board_early_init_r(void)
 
                        udelay(100000);
                        if (ctr++ > 5) {
-                               gd->fpga_state[k] |=
+                               gd->arch.fpga_state[k] |=
                                        FPGA_STATE_REFLECTION_FAILED;
                                break;
                        }
index 5766c0f562fa953a9105ae6b703c04b7430d60c2..32e24c08cb9ce8340f589ab21d1772ef61bea087 100644 (file)
@@ -15,14 +15,14 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int get_fpga_state(unsigned dev)
 {
-       return gd->fpga_state[dev];
+       return gd->arch.fpga_state[dev];
 }
 
 void print_fpga_state(unsigned dev)
 {
-       if (gd->fpga_state[dev] & FPGA_STATE_DONE_FAILED)
+       if (gd->arch.fpga_state[dev] & FPGA_STATE_DONE_FAILED)
                puts("       Waiting for FPGA-DONE timed out.\n");
-       if (gd->fpga_state[dev] & FPGA_STATE_REFLECTION_FAILED)
+       if (gd->arch.fpga_state[dev] & FPGA_STATE_REFLECTION_FAILED)
                puts("       FPGA reflection test failed.\n");
 }
 
@@ -192,7 +192,7 @@ int board_early_init_r(void)
        unsigned ctr;
 
        for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k)
-               gd->fpga_state[k] = 0;
+               gd->arch.fpga_state[k] = 0;
 
        /*
         * reset FPGA
@@ -208,7 +208,8 @@ int board_early_init_r(void)
                while (!gd405ex_get_fpga_done(k)) {
                        udelay(100000);
                        if (ctr++ > 5) {
-                               gd->fpga_state[k] |= FPGA_STATE_DONE_FAILED;
+                               gd->arch.fpga_state[k] |=
+                                       FPGA_STATE_DONE_FAILED;
                                break;
                        }
                }
@@ -240,7 +241,7 @@ int board_early_init_r(void)
 
                        udelay(100000);
                        if (ctr++ > 5) {
-                               gd->fpga_state[k] |=
+                               gd->arch.fpga_state[k] |=
                                        FPGA_STATE_REFLECTION_FAILED;
                                break;
                        }
index 41fdef7da81bb8919d36150923a0a1add6b3489f..7d2899dc94a30bc047c8ab76dac0e9ad3ec5ff99 100644 (file)
@@ -359,7 +359,7 @@ void gd405ex_init(void)
 
        if (i2c_probe(0x22)) { /* i2c_probe returns 0 on success */
                for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k)
-                       gd->fpga_state[k] |= FPGA_STATE_PLATFORM;
+                       gd->arch.fpga_state[k] |= FPGA_STATE_PLATFORM;
        } else {
                pca9698_direction_output(0x22, 39, 1);
        }