Move this field into arch_global_data and tidy up.
Signed-off-by: Simon Glass <sjg@chromium.org>
 #if defined(CONFIG_SYS_GT_6426x)
        unsigned int mirror_hack[16];
 #endif
+#ifdef CONFIG_SYS_FPGA_COUNT
+       unsigned fpga_state[CONFIG_SYS_FPGA_COUNT];
+#endif
 };
 
 /*
 #if defined(CONFIG_LWMON) || defined(CONFIG_LWMON5)
        unsigned long kbd_status;
 #endif
-#ifdef CONFIG_SYS_FPGA_COUNT
-       unsigned fpga_state[CONFIG_SYS_FPGA_COUNT];
-#endif
 #if defined(CONFIG_WD_MAX_RATE)
        unsigned long long wdt_last;    /* trace watch-dog triggering rate */
 #endif
 
 
 int get_fpga_state(unsigned dev)
 {
-       return gd->fpga_state[dev];
+       return gd->arch.fpga_state[dev];
 }
 
 void print_fpga_state(unsigned dev)
 {
-       if (gd->fpga_state[dev] & FPGA_STATE_DONE_FAILED)
+       if (gd->arch.fpga_state[dev] & FPGA_STATE_DONE_FAILED)
                puts("       Waiting for FPGA-DONE timed out.\n");
-       if (gd->fpga_state[dev] & FPGA_STATE_REFLECTION_FAILED)
+       if (gd->arch.fpga_state[dev] & FPGA_STATE_REFLECTION_FAILED)
                puts("       FPGA reflection test failed.\n");
 }
 
        unsigned k;
 
        for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k)
-               gd->fpga_state[k] = 0;
+               gd->arch.fpga_state[k] = 0;
 
        mtdcr(UIC0SR, 0xFFFFFFFF);      /* clear all ints */
        mtdcr(UIC0ER, 0x00000000);      /* disable all ints */
        unsigned ctr;
 
        for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k)
-               gd->fpga_state[k] = 0;
+               gd->arch.fpga_state[k] = 0;
 
        /*
         * reset FPGA
                while (!gd405ep_get_fpga_done(k)) {
                        udelay(100000);
                        if (ctr++ > 5) {
-                               gd->fpga_state[k] |= FPGA_STATE_DONE_FAILED;
+                               gd->arch.fpga_state[k] |=
+                                       FPGA_STATE_DONE_FAILED;
                                break;
                        }
                }
 
                        udelay(100000);
                        if (ctr++ > 5) {
-                               gd->fpga_state[k] |=
+                               gd->arch.fpga_state[k] |=
                                        FPGA_STATE_REFLECTION_FAILED;
                                break;
                        }
 
 
 int get_fpga_state(unsigned dev)
 {
-       return gd->fpga_state[dev];
+       return gd->arch.fpga_state[dev];
 }
 
 void print_fpga_state(unsigned dev)
 {
-       if (gd->fpga_state[dev] & FPGA_STATE_DONE_FAILED)
+       if (gd->arch.fpga_state[dev] & FPGA_STATE_DONE_FAILED)
                puts("       Waiting for FPGA-DONE timed out.\n");
-       if (gd->fpga_state[dev] & FPGA_STATE_REFLECTION_FAILED)
+       if (gd->arch.fpga_state[dev] & FPGA_STATE_REFLECTION_FAILED)
                puts("       FPGA reflection test failed.\n");
 }
 
        unsigned ctr;
 
        for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k)
-               gd->fpga_state[k] = 0;
+               gd->arch.fpga_state[k] = 0;
 
        /*
         * reset FPGA
                while (!gd405ex_get_fpga_done(k)) {
                        udelay(100000);
                        if (ctr++ > 5) {
-                               gd->fpga_state[k] |= FPGA_STATE_DONE_FAILED;
+                               gd->arch.fpga_state[k] |=
+                                       FPGA_STATE_DONE_FAILED;
                                break;
                        }
                }
 
                        udelay(100000);
                        if (ctr++ > 5) {
-                               gd->fpga_state[k] |=
+                               gd->arch.fpga_state[k] |=
                                        FPGA_STATE_REFLECTION_FAILED;
                                break;
                        }
 
 
        if (i2c_probe(0x22)) { /* i2c_probe returns 0 on success */
                for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k)
-                       gd->fpga_state[k] |= FPGA_STATE_PLATFORM;
+                       gd->arch.fpga_state[k] |= FPGA_STATE_PLATFORM;
        } else {
                pca9698_direction_output(0x22, 39, 1);
        }