]> git.sur5r.net Git - u-boot/commitdiff
am335x_evm: CPSW support
authorChandan Nath <chandan.nath@ti.com>
Tue, 24 Jul 2012 12:22:20 +0000 (12:22 +0000)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>
Sat, 1 Sep 2012 12:58:11 +0000 (14:58 +0200)
This patch adds board-specific initialization for CPSW on
TI AM335X based boards. Tested on BeagleBone.

Signed-off-by: Chandan Nath <chandan.nath@ti.com>
[Ilya: split board-specific part into separate patch]
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
board/ti/am335x/evm.c
include/configs/am335x_evm.h

index 55e24a8f92b10c597fc99bfebc7cc7ce4e7019f7..b7eee80af1e689a659e9c8c0fdd839bc015d2247 100644 (file)
 
 #include <common.h>
 #include <errno.h>
+#include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/common_def.h>
 #include <i2c.h>
+#include <miiphy.h>
+#include <cpsw.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define UART_RESET             (0x1 << 1)
+#define UART_CLK_RUNNING_MASK  0x1
+#define UART_SMART_IDLE_EN     (0x1 << 0x3)
+
+/* MII mode defines */
+#define MII_MODE_ENABLE                0x0
+#define RGMII_MODE_ENABLE      0xA
+
+struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
+
 /*
  * I2C Address of on-board EEPROM
  */
@@ -106,3 +119,81 @@ int board_init(void)
 
        return 0;
 }
+
+#ifdef CONFIG_DRIVER_TI_CPSW
+static void cpsw_control(int enabled)
+{
+       /* VTP can be added here */
+
+       return;
+}
+
+static struct cpsw_slave_data cpsw_slaves[] = {
+       {
+               .slave_reg_ofs  = 0x208,
+               .sliver_reg_ofs = 0xd80,
+               .phy_id         = 0,
+       },
+       {
+               .slave_reg_ofs  = 0x308,
+               .sliver_reg_ofs = 0xdc0,
+               .phy_id         = 1,
+       },
+};
+
+static struct cpsw_platform_data cpsw_data = {
+       .mdio_base              = AM335X_CPSW_MDIO_BASE,
+       .cpsw_base              = AM335X_CPSW_BASE,
+       .mdio_div               = 0xff,
+       .channels               = 8,
+       .cpdma_reg_ofs          = 0x800,
+       .slaves                 = 1,
+       .slave_data             = cpsw_slaves,
+       .ale_reg_ofs            = 0xd00,
+       .ale_entries            = 1024,
+       .host_port_reg_ofs      = 0x108,
+       .hw_stats_reg_ofs       = 0x900,
+       .mac_control            = (1 << 5),
+       .control                = cpsw_control,
+       .host_port_num          = 0,
+       .version                = CPSW_CTRL_VERSION_2,
+};
+
+int board_eth_init(bd_t *bis)
+{
+       uint8_t mac_addr[6];
+       uint32_t mac_hi, mac_lo;
+
+       if (!eth_getenv_enetaddr("ethaddr", mac_addr)) {
+               debug("<ethaddr> not set. Reading from E-fuse\n");
+               /* try reading mac address from efuse */
+               mac_lo = readl(&cdev->macid0l);
+               mac_hi = readl(&cdev->macid0h);
+               mac_addr[0] = mac_hi & 0xFF;
+               mac_addr[1] = (mac_hi & 0xFF00) >> 8;
+               mac_addr[2] = (mac_hi & 0xFF0000) >> 16;
+               mac_addr[3] = (mac_hi & 0xFF000000) >> 24;
+               mac_addr[4] = mac_lo & 0xFF;
+               mac_addr[5] = (mac_lo & 0xFF00) >> 8;
+
+               if (is_valid_ether_addr(mac_addr))
+                       eth_setenv_enetaddr("ethaddr", mac_addr);
+               else
+                       return -1;
+       }
+
+       if (board_is_bone()) {
+               enable_mii1_pin_mux();
+               writel(MII_MODE_ENABLE, &cdev->miisel);
+               cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if =
+                               PHY_INTERFACE_MODE_MII;
+       } else {
+               enable_rgmii1_pin_mux();
+               writel(RGMII_MODE_ENABLE, &cdev->miisel);
+               cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if =
+                               PHY_INTERFACE_MODE_RGMII;
+       }
+
+       return cpsw_register(&cpsw_data);
+}
+#endif
index 2b41c1c9d5188d21c1d5d16f3e18d807a71ba7ff..2a3251bdd3c28c73a44164c6b712bdde6c0e62b7 100644 (file)
 #undef CONFIG_GZIP
 #undef CONFIG_ZLIB
 #undef CONFIG_SYS_HUSH_PARSER
-#undef CONFIG_CMD_NET
 
 #include <asm/arch/cpu.h>
 #include <asm/arch/hardware.h>
 
+#define CONFIG_DMA_COHERENT
+#define CONFIG_DMA_COHERENT_SIZE       (1 << 20)
+
 #define CONFIG_ENV_SIZE                        0x400
 #define CONFIG_SYS_MALLOC_LEN          (CONFIG_ENV_SIZE + (8 * 1024))
 #define CONFIG_SYS_PROMPT              "U-Boot# "
 /* Unsupported features */
 #undef CONFIG_USE_IRQ
 
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PING
+#define CONFIG_DRIVER_TI_CPSW
+#define CONFIG_MII
+#define CONFIG_BOOTP_DEFAULT
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_NET_RETRY_COUNT         10
+#define CONFIG_NET_MULTI
+#define CONFIG_PHY_GIGE
+#define CONFIG_PHYLIB
+
 #endif /* ! __CONFIG_AM335X_EVM_H */