The SPL can't use high speed MMC modes if the associated pinctrl and
IOdelays are described in the DTS.
Make them available in SPL by tagging the nodes with 'u-boot,dm-spl;'
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
&pcf_hdmi{
u-boot,i2c-offset-len = <0>;
};
+
+&mmc2_pins_default {
+ u-boot,dm-spl;
+};
+
+&mmc2_pins_hs {
+ u-boot,dm-spl;
+};
+
+&mmc2_pins_ddr_rev20 {
+ u-boot,dm-spl;
+};
+
+&mmc2_pins_hs200 {
+ u-boot,dm-spl;
+};
+
+&mmc2_iodelay_hs200_rev20_conf {
+ u-boot,dm-spl;
+};
&cpsw_emac1 {
phy-handle = <&dp83867_1>;
};
+
+&mmc2_pins_default {
+ u-boot,dm-spl;
+};
+
+&mmc2_pins_hs {
+ u-boot,dm-spl;
+};
+
+&mmc2_pins_ddr_rev20 {
+ u-boot,dm-spl;
+};
+
+&mmc2_iodelay_ddr_conf {
+ u-boot,dm-spl;
+};
+
+&mmc2_pins_hs200 {
+ u-boot,dm-spl;
+};
+
+&mmc2_iodelay_hs200_rev20_conf {
+ u-boot,dm-spl;
+};
&cpsw_emac1 {
phy-handle = <&dp83867_1>;
};
+
+&mmc2_pins_default {
+ u-boot,dm-spl;
+};
+
+&mmc2_pins_hs {
+ u-boot,dm-spl;
+};
+
+&mmc2_pins_ddr_rev20 {
+ u-boot,dm-spl;
+};
+
+&mmc2_iodelay_ddr_conf {
+ u-boot,dm-spl;
+};
+
+&mmc2_pins_hs200 {
+ u-boot,dm-spl;
+};
+
+&mmc2_iodelay_hs200_rev20_conf {
+ u-boot,dm-spl;
+};
&cpsw_emac1 {
phy-handle = <&dp83867_1>;
};
+
+&mmc2_pins_default {
+ u-boot,dm-spl;
+};
+
+&mmc2_pins_hs200 {
+ u-boot,dm-spl;
+};
+
+&mmc2_iodelay_hs200_conf {
+ u-boot,dm-spl;
+};