x86: Enable DM RTC support for all x86 boards

Add a RTC node in the device tree to enable DM RTC support.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
(Squashed in 'x86: Fix RTC build error on ivybridge')

diff --git a/arch/x86/cpu/ivybridge/lpc.c b/arch/x86/cpu/ivybridge/lpc.c
index bc1a0f06fbe31d6829a7a1c75c38c50c0c768a11..3efd3e841f4e8f1c7696664ac7efc33dad54a839 100644 (file)
--- a/arch/x86/cpu/ivybridge/lpc.c
+++ b/arch/x86/cpu/ivybridge/lpc.c
@@ -252,7 +252,6 @@ static void pch_rtc_init(pci_dev_t dev)
        /* TODO: Handle power failure */
        if (rtc_failed)
                printf("RTC power failed\n");
-       rtc_init();
 }
 
 /* CougarPoint PCH Power Management init */

diff --git a/arch/x86/cpu/ivybridge/sdram.c b/arch/x86/cpu/ivybridge/sdram.c
index af907c5b9b3c9a36e8c37a29821500a7580e5ccc..7f3b13d3571f420aee76006c4277445d878d1df3 100644 (file)
--- a/arch/x86/cpu/ivybridge/sdram.c
+++ b/arch/x86/cpu/ivybridge/sdram.c
@@ -128,6 +128,14 @@ static int get_mrc_entry(struct udevice **devp, struct fmap_entry *entry)
 static int read_seed_from_cmos(struct pei_data *pei_data)
 {
        u16 c1, c2, checksum, seed_checksum;
+       struct udevice *dev;
+       int rcode = 0;
+
+       rcode = uclass_get_device(UCLASS_RTC, 0, &dev);
+       if (rcode) {
+               debug("Cannot find RTC: err=%d\n", rcode);
+               return -ENODEV;
+       }
 
        /*
         * Read scrambler seeds from CMOS RAM. We don't want to store them in
@@ -135,11 +143,11 @@ static int read_seed_from_cmos(struct pei_data *pei_data)
         * the flash too much. So we store these in CMOS and the large MRC
         * data in SPI flash.
         */
-       pei_data->scrambler_seed = rtc_read32(CMOS_OFFSET_MRC_SEED);
+       rtc_read32(dev, CMOS_OFFSET_MRC_SEED, &pei_data->scrambler_seed);
        debug("Read scrambler seed    0x%08x from CMOS 0x%02x\n",
              pei_data->scrambler_seed, CMOS_OFFSET_MRC_SEED);
 
-       pei_data->scrambler_seed_s3 = rtc_read32(CMOS_OFFSET_MRC_SEED_S3);
+       rtc_read32(dev, CMOS_OFFSET_MRC_SEED_S3, &pei_data->scrambler_seed_s3);
        debug("Read S3 scrambler seed 0x%08x from CMOS 0x%02x\n",
              pei_data->scrambler_seed_s3, CMOS_OFFSET_MRC_SEED_S3);
 
@@ -150,8 +158,8 @@ static int read_seed_from_cmos(struct pei_data *pei_data)
                                 sizeof(u32));
        checksum = add_ip_checksums(sizeof(u32), c1, c2);
 
-       seed_checksum = rtc_read8(CMOS_OFFSET_MRC_SEED_CHK);
-       seed_checksum |= rtc_read8(CMOS_OFFSET_MRC_SEED_CHK + 1) << 8;
+       seed_checksum = rtc_read8(dev, CMOS_OFFSET_MRC_SEED_CHK);
+       seed_checksum |= rtc_read8(dev, CMOS_OFFSET_MRC_SEED_CHK + 1) << 8;
 
        if (checksum != seed_checksum) {
                debug("%s: invalid seed checksum\n", __func__);
@@ -223,13 +231,21 @@ static int build_mrc_data(struct mrc_data_container **datap)
 static int write_seeds_to_cmos(struct pei_data *pei_data)
 {
        u16 c1, c2, checksum;
+       struct udevice *dev;
+       int rcode = 0;
+
+       rcode = uclass_get_device(UCLASS_RTC, 0, &dev);
+       if (rcode) {
+               debug("Cannot find RTC: err=%d\n", rcode);
+               return -ENODEV;
+       }
 
        /* Save the MRC seed values to CMOS */
-       rtc_write32(CMOS_OFFSET_MRC_SEED, pei_data->scrambler_seed);
+       rtc_write32(dev, CMOS_OFFSET_MRC_SEED, pei_data->scrambler_seed);
        debug("Save scrambler seed    0x%08x to CMOS 0x%02x\n",
              pei_data->scrambler_seed, CMOS_OFFSET_MRC_SEED);
 
-       rtc_write32(CMOS_OFFSET_MRC_SEED_S3, pei_data->scrambler_seed_s3);
+       rtc_write32(dev, CMOS_OFFSET_MRC_SEED_S3, pei_data->scrambler_seed_s3);
        debug("Save s3 scrambler seed 0x%08x to CMOS 0x%02x\n",
              pei_data->scrambler_seed_s3, CMOS_OFFSET_MRC_SEED_S3);
 
@@ -240,8 +256,8 @@ static int write_seeds_to_cmos(struct pei_data *pei_data)
                                 sizeof(u32));
        checksum = add_ip_checksums(sizeof(u32), c1, c2);
 
-       rtc_write8(CMOS_OFFSET_MRC_SEED_CHK, checksum & 0xff);
-       rtc_write8(CMOS_OFFSET_MRC_SEED_CHK + 1, (checksum >> 8) & 0xff);
+       rtc_write8(dev, CMOS_OFFSET_MRC_SEED_CHK, checksum & 0xff);
+       rtc_write8(dev, CMOS_OFFSET_MRC_SEED_CHK + 1, (checksum >> 8) & 0xff);
 
        return 0;
 }

diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts
index 7c7034c7ebe25a8dce184ff8ad1de32a55091cb4..ad390bf11721a3b161c3b55a1c517ddf1e55eb5b 100644 (file)
--- a/arch/x86/dts/chromebook_link.dts
+++ b/arch/x86/dts/chromebook_link.dts
@@ -2,6 +2,7 @@
 
 /include/ "skeleton.dtsi"
 /include/ "serial.dtsi"
+/include/ "rtc.dtsi"
 
 / {
        model = "Google Link";

diff --git a/arch/x86/dts/chromebox_panther.dts b/arch/x86/dts/chromebox_panther.dts
index 4eccefdb8c8413c8d6bf8a5a18c8ff344d637599..84eae3ab6513ac0990ebab28255936d24ff684c0 100644 (file)
--- a/arch/x86/dts/chromebox_panther.dts
+++ b/arch/x86/dts/chromebox_panther.dts
@@ -2,6 +2,7 @@
 
 /include/ "skeleton.dtsi"
 /include/ "serial.dtsi"
+/include/ "rtc.dtsi"
 
 / {
        model = "Google Panther";

diff --git a/arch/x86/dts/galileo.dts b/arch/x86/dts/galileo.dts
index 2ba081e9dc22bf60ed4d72c4958e67a596326ca2..d77ff8ad5558c30e06de3fb69866ee68859567b0 100644 (file)
--- a/arch/x86/dts/galileo.dts
+++ b/arch/x86/dts/galileo.dts
@@ -10,6 +10,7 @@
 #include <dt-bindings/interrupt-router/intel-irq.h>
 
 /include/ "skeleton.dtsi"
+/include/ "rtc.dtsi"
 
 / {
        model = "Intel Galileo";

diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
index 0e59b18d3404eb3a75ae163c7f5bda3a6807fbc2..9527233d7fc084d6c8c38832dc65890077c46315 100644 (file)
--- a/arch/x86/dts/minnowmax.dts
+++ b/arch/x86/dts/minnowmax.dts
@@ -10,6 +10,7 @@
 
 /include/ "skeleton.dtsi"
 /include/ "serial.dtsi"
+/include/ "rtc.dtsi"
 
 / {
        model = "Intel Minnowboard Max";

diff --git a/arch/x86/dts/qemu-x86_i440fx.dts b/arch/x86/dts/qemu-x86_i440fx.dts
index 557428a459c6d55765c14d75a351a4b8f354ef7c..0c522c860f8fd38481efe1cb5cd3a14538825d38 100644 (file)
--- a/arch/x86/dts/qemu-x86_i440fx.dts
+++ b/arch/x86/dts/qemu-x86_i440fx.dts
@@ -10,6 +10,7 @@
 
 /include/ "skeleton.dtsi"
 /include/ "serial.dtsi"
+/include/ "rtc.dtsi"
 
 / {
        model = "QEMU x86 (I440FX)";

diff --git a/arch/x86/dts/qemu-x86_q35.dts b/arch/x86/dts/qemu-x86_q35.dts
index c259f2a3d296d2f8a40ee8db3801262cc16424d6..5fbabc2f3c59db2430a8661d34902c70fea9b4e3 100644 (file)
--- a/arch/x86/dts/qemu-x86_q35.dts
+++ b/arch/x86/dts/qemu-x86_q35.dts
@@ -20,6 +20,7 @@
 
 /include/ "skeleton.dtsi"
 /include/ "serial.dtsi"
+/include/ "rtc.dtsi"
 
 / {
        model = "QEMU x86 (Q35)";

diff --git a/arch/x86/dts/rtc.dtsi b/arch/x86/dts/rtc.dtsi
index 93dacd7307c5c2a5c72246196efc9313cef8fdd8..1797e042daf052940233e568991bb82ea8039def 100644 (file)
--- a/arch/x86/dts/rtc.dtsi
+++ b/arch/x86/dts/rtc.dtsi
@@ -1,6 +1,7 @@
 / {
        rtc {
                compatible = "motorola,mc146818";
+               u-boot,dm-pre-reloc;
                reg = <0x70 2>;
        };
 };

diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig
index 9931d65dc2e92f34c5bfb6a2a9d853b9bce735f7..e394dab719b9c3106b177e9023c386b3ee14abf8 100644 (file)
--- a/configs/chromebook_link_defconfig
+++ b/configs/chromebook_link_defconfig
@@ -17,5 +17,6 @@ CONFIG_SPI_FLASH=y
 CONFIG_VIDEO_VESA=y
 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
 CONFIG_FRAMEBUFFER_VESA_MODE_11A=y
+CONFIG_DM_RTC=y
 CONFIG_USE_PRIVATE_LIBGCC=y
 CONFIG_SYS_VSNPRINTF=y

diff --git a/configs/chromebox_panther_defconfig b/configs/chromebox_panther_defconfig
index b3a5f28be91753ce00a84cdf1d33d04aa32af906..340510f71a6af0f72a6f67cc157f8fe1a97f109c 100644 (file)
--- a/configs/chromebox_panther_defconfig
+++ b/configs/chromebox_panther_defconfig
@@ -17,5 +17,6 @@ CONFIG_SPI_FLASH=y
 CONFIG_VIDEO_VESA=y
 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
 CONFIG_FRAMEBUFFER_VESA_MODE_11A=y
+CONFIG_DM_RTC=y
 CONFIG_USE_PRIVATE_LIBGCC=y
 CONFIG_SYS_VSNPRINTF=y

diff --git a/configs/galileo_defconfig b/configs/galileo_defconfig
index 1ced47e7b8f41fddcdbaa6b99adc7a32b11926dc..3f80483aef96704b8aad7dad01e76966e421688d 100644 (file)
--- a/configs/galileo_defconfig
+++ b/configs/galileo_defconfig
@@ -15,5 +15,6 @@ CONFIG_SPL_DISABLE_OF_CONTROL=y
 CONFIG_SPI_FLASH=y
 CONFIG_NETDEVICES=y
 CONFIG_ETH_DESIGNWARE=y
+CONFIG_DM_RTC=y
 CONFIG_USE_PRIVATE_LIBGCC=y
 CONFIG_SYS_VSNPRINTF=y

diff --git a/configs/minnowmax_defconfig b/configs/minnowmax_defconfig
index 29dd44b4009009c0f506912e172e2be339b60633..e98f5eb5cee3b9f4bd325ddfb3b52d781d83df8a 100644 (file)
--- a/configs/minnowmax_defconfig
+++ b/configs/minnowmax_defconfig
@@ -21,5 +21,6 @@ CONFIG_SPI_FLASH=y
 CONFIG_VIDEO_VESA=y
 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
 CONFIG_FRAMEBUFFER_VESA_MODE_11A=y
+CONFIG_DM_RTC=y
 CONFIG_USE_PRIVATE_LIBGCC=y
 CONFIG_SYS_VSNPRINTF=y

diff --git a/configs/qemu-x86_defconfig b/configs/qemu-x86_defconfig
index 5639cc5b151f7f03bc4644b138796180a6af9fbe..a4c20bd4f181af43ef227f3fe35b7a1e8735b14a 100644 (file)
--- a/configs/qemu-x86_defconfig
+++ b/configs/qemu-x86_defconfig
@@ -13,5 +13,6 @@ CONFIG_SPI_FLASH=y
 CONFIG_VIDEO_VESA=y
 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
 CONFIG_FRAMEBUFFER_VESA_MODE_111=y
+CONFIG_DM_RTC=y
 CONFIG_USE_PRIVATE_LIBGCC=y
 CONFIG_SYS_VSNPRINTF=y