]> git.sur5r.net Git - u-boot/commitdiff
ARM: keystone2: Cleanup init_pll definition
authorLokesh Vutla <lokeshvutla@ti.com>
Tue, 28 Jul 2015 08:46:46 +0000 (14:16 +0530)
committerTom Rini <trini@konsulko.com>
Thu, 13 Aug 2015 00:47:53 +0000 (20:47 -0400)
This is just a cosmetic change that makes
the calling of pll init code looks much cleaner.

Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
arch/arm/mach-keystone/clock.c
arch/arm/mach-keystone/include/mach/clock.h
board/ti/ks2_evm/board_k2e.c
board/ti/ks2_evm/board_k2hk.c
board/ti/ks2_evm/board_k2l.c

index de5dfe15eb9340842bc21203e2923185c8947711..378ed101592aa4c91c7e53f802459f25fe61956d 100644 (file)
@@ -211,12 +211,16 @@ void init_pll(const struct pll_init_data *data)
        sdelay(210000);
 }
 
-void init_plls(int num_pll, struct pll_init_data *config)
+void init_plls(void)
 {
-       int i;
+       struct pll_init_data *data;
+       int pll;
 
-       for (i = 0; i < num_pll; i++)
-               init_pll(&config[i]);
+       for (pll = MAIN_PLL; pll < MAX_PLL_COUNT; pll++) {
+               data = get_pll_init_data(pll);
+               if (data)
+                       init_pll(data);
+       }
 }
 
 static int get_max_speed(u32 val, u32 speed_supported)
index 9ba4463224e1fb6d082a7a3ce678fed7f634b2d5..de697c01eb8e076bb2490d6e8bb543620550b877 100644 (file)
@@ -76,8 +76,9 @@ extern const struct keystone_pll_regs keystone_pll_regs[];
 extern s16 divn_val[];
 extern int speeds[];
 
-void init_plls(int num_pll, struct pll_init_data *config);
+void init_plls(void);
 void init_pll(const struct pll_init_data *data);
+struct pll_init_data *get_pll_init_data(int pll);
 unsigned long clk_get_rate(unsigned int clk);
 unsigned long clk_round_rate(unsigned int clk, unsigned long hz);
 int clk_set_rate(unsigned int clk, unsigned long hz);
index 2043759533021c03ad80141a0e2161d77d89645b..e33cc64ea01f515fc48ea710d78980664c68e641 100644 (file)
@@ -59,6 +59,26 @@ s16 divn_val[16] = {
 static struct pll_init_data pa_pll_config =
        PASS_PLL_1000;
 
+struct pll_init_data *get_pll_init_data(int pll)
+{
+       int speed;
+       struct pll_init_data *data;
+
+       switch (pll) {
+       case MAIN_PLL:
+               speed = get_max_dev_speed();
+               data = &core_pll_config[speed];
+               break;
+       case PASS_PLL:
+               data = &pa_pll_config;
+               break;
+       default:
+               data = NULL;
+       }
+
+       return data;
+}
+
 #ifdef CONFIG_DRIVER_TI_KEYSTONE_NET
 struct eth_priv_t eth_priv_cfg[] = {
        {
@@ -128,24 +148,15 @@ int get_num_eth_ports(void)
 #if defined(CONFIG_BOARD_EARLY_INIT_F)
 int board_early_init_f(void)
 {
-       int speed;
-
-       speed = get_max_dev_speed();
-       init_pll(&core_pll_config[speed]);
-
-       init_pll(&pa_pll_config);
+       init_plls();
 
        return 0;
 }
 #endif
 
 #ifdef CONFIG_SPL_BUILD
-static struct pll_init_data spl_pll_config[] = {
-       CORE_PLL_800,
-};
-
 void spl_init_keystone_plls(void)
 {
-       init_plls(ARRAY_SIZE(spl_pll_config), spl_pll_config);
+       init_plls();
 }
 #endif
index 6c0a092c96725b1d7af68bf9fb9a8df791e2b24e..b9e2b07b8ae6c15472f7d22929f99ecf4707c01c 100644 (file)
@@ -50,6 +50,30 @@ static struct pll_init_data tetris_pll_config[] = {
 static struct pll_init_data pa_pll_config =
        PASS_PLL_983;
 
+struct pll_init_data *get_pll_init_data(int pll)
+{
+       int speed;
+       struct pll_init_data *data;
+
+       switch (pll) {
+       case MAIN_PLL:
+               speed = get_max_dev_speed();
+               data = &core_pll_config[speed];
+               break;
+       case TETRIS_PLL:
+               speed = get_max_arm_speed();
+               data = &tetris_pll_config[speed];
+               break;
+       case PASS_PLL:
+               data = &pa_pll_config;
+               break;
+       default:
+               data = NULL;
+       }
+
+       return data;
+}
+
 #ifdef CONFIG_DRIVER_TI_KEYSTONE_NET
 struct eth_priv_t eth_priv_cfg[] = {
        {
@@ -91,28 +115,15 @@ int get_num_eth_ports(void)
 #ifdef CONFIG_BOARD_EARLY_INIT_F
 int board_early_init_f(void)
 {
-       int speed;
-
-       speed = get_max_dev_speed();
-       init_pll(&core_pll_config[speed]);
-
-       init_pll(&pa_pll_config);
-
-       speed = get_max_arm_speed();
-       init_pll(&tetris_pll_config[speed]);
+       init_plls();
 
        return 0;
 }
 #endif
 
 #ifdef CONFIG_SPL_BUILD
-static struct pll_init_data spl_pll_config[] = {
-       CORE_PLL_799,
-       TETRIS_PLL_500,
-};
-
 void spl_init_keystone_plls(void)
 {
-       init_plls(ARRAY_SIZE(spl_pll_config), spl_pll_config);
+       init_plls();
 }
 #endif
index d6c0492d7656147149001a1b2d72733d2c4bd4e0..58a6cbd86eafcfe7f64dfca0500e8bf4df4d034f 100644 (file)
@@ -46,6 +46,30 @@ static struct pll_init_data tetris_pll_config[] = {
 static struct pll_init_data pa_pll_config =
        PASS_PLL_983;
 
+struct pll_init_data *get_pll_init_data(int pll)
+{
+       int speed;
+       struct pll_init_data *data;
+
+       switch (pll) {
+       case MAIN_PLL:
+               speed = get_max_dev_speed();
+               data = &core_pll_config[speed];
+               break;
+       case TETRIS_PLL:
+               speed = get_max_arm_speed();
+               data = &tetris_pll_config[speed];
+               break;
+       case PASS_PLL:
+               data = &pa_pll_config;
+               break;
+       default:
+               data = NULL;
+       }
+
+       return data;
+}
+
 #ifdef CONFIG_DRIVER_TI_KEYSTONE_NET
 struct eth_priv_t eth_priv_cfg[] = {
        {
@@ -87,28 +111,15 @@ int get_num_eth_ports(void)
 #ifdef CONFIG_BOARD_EARLY_INIT_F
 int board_early_init_f(void)
 {
-       int speed;
-
-       speed = get_max_dev_speed();
-       init_pll(&core_pll_config[speed]);
-
-       init_pll(&pa_pll_config);
-
-       speed = get_max_arm_speed();
-       init_pll(&tetris_pll_config[speed]);
+       init_plls();
 
        return 0;
 }
 #endif
 
 #ifdef CONFIG_SPL_BUILD
-static struct pll_init_data spl_pll_config[] = {
-       CORE_PLL_799,
-       TETRIS_PLL_491,
-};
-
 void spl_init_keystone_plls(void)
 {
-       init_plls(ARRAY_SIZE(spl_pll_config), spl_pll_config);
+       init_plls();
 }
 #endif