]> git.sur5r.net Git - u-boot/commitdiff
drivers: i2c: mxc: Update SYS_I2C_MXC_I2C support in Kconfig
authorSriram Dash <sriram.dash@nxp.com>
Tue, 6 Feb 2018 05:56:30 +0000 (11:26 +0530)
committerStefano Babic <sbabic@denx.de>
Thu, 29 Mar 2018 15:20:42 +0000 (17:20 +0200)
NXP layerscape platforms like ls1088a, ls2088a
uses MXC I2C Controller.
-Remove dependency of MX6 for the same.

Update related configs to use Kconfig file.
-Add SYS_I2C_MXC_I2C1,_I2C2,_I2C3,_I2C4 in Kconfig
-Add CONFIG_SYS_MXC_I2C1_SPEED,_I2C2_,_I2C3_,_I2C4_ in Kconfig
-Add CONFIG_SYS_MXC_I2C1_SLAVE,_I2C2_,_I2C3_,_I2C4_ in Kconfig

Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
arch/arm/cpu/armv8/fsl-layerscape/Kconfig
drivers/i2c/Kconfig
include/configs/ls1012a_common.h
include/configs/ls1043a_common.h
include/configs/ls1046a_common.h
include/configs/ls1088a_common.h
include/configs/ls2080a_common.h
include/configs/ls2080a_emu.h
include/configs/ls2080a_simu.h

index 7b59dc9a7c8b4e94bca89678b94dbea160258a2b..c4a96d48baf71b62e83351cbbaf91c9072468ce7 100644 (file)
@@ -14,6 +14,9 @@ config ARCH_LS1012A
        select SYS_FSL_ERRATUM_A009008
        select ARCH_EARLY_INIT_R
        select BOARD_EARLY_INIT_F
+       select SYS_I2C_MXC
+       select SYS_I2C_MXC_I2C1
+       select SYS_I2C_MXC_I2C2
        imply PANIC_HANG
 
 config ARCH_LS1043A
@@ -41,6 +44,11 @@ config ARCH_LS1043A
        select SYS_FSL_HAS_DDR4
        select ARCH_EARLY_INIT_R
        select BOARD_EARLY_INIT_F
+       select SYS_I2C_MXC
+       select SYS_I2C_MXC_I2C1
+       select SYS_I2C_MXC_I2C2
+       select SYS_I2C_MXC_I2C3
+       select SYS_I2C_MXC_I2C4
        imply SCSI
        imply SCSI_AHCI
        imply CMD_PCI
@@ -70,6 +78,11 @@ config ARCH_LS1046A
        select SYS_FSL_SRDS_2
        select ARCH_EARLY_INIT_R
        select BOARD_EARLY_INIT_F
+       select SYS_I2C_MXC
+       select SYS_I2C_MXC_I2C1
+       select SYS_I2C_MXC_I2C2
+       select SYS_I2C_MXC_I2C3
+       select SYS_I2C_MXC_I2C4
        imply SCSI
        imply SCSI_AHCI
 
@@ -102,6 +115,11 @@ config ARCH_LS1088A
        select FSL_TZASC_1
        select ARCH_EARLY_INIT_R
        select BOARD_EARLY_INIT_F
+       select SYS_I2C_MXC
+       select SYS_I2C_MXC_I2C1
+       select SYS_I2C_MXC_I2C2
+       select SYS_I2C_MXC_I2C3
+       select SYS_I2C_MXC_I2C4
        imply SCSI
        imply PANIC_HANG
 
@@ -144,6 +162,11 @@ config ARCH_LS2080A
        select SYS_FSL_ERRATUM_A009203
        select ARCH_EARLY_INIT_R
        select BOARD_EARLY_INIT_F
+       select SYS_I2C_MXC
+       select SYS_I2C_MXC_I2C1
+       select SYS_I2C_MXC_I2C2
+       select SYS_I2C_MXC_I2C3
+       select SYS_I2C_MXC_I2C4
        imply PANIC_HANG
 
 config FSL_LSCH2
index 932abd305970e23aab3efc3618a07419732103c5..cc9fa96ac519ff824dc7e2632167d96640d3fc98 100644 (file)
@@ -149,13 +149,96 @@ config SYS_I2C_MESON
          both 7-bit and 10-bit addresses.
 
 config SYS_I2C_MXC
-       bool "NXP i.MX I2C driver"
-       depends on MX6
+       bool "NXP MXC I2C driver"
        help
-         Add support for the NXP i.MX I2C driver. This supports upto for bus
+         Add support for the NXP I2C driver. This supports upto for bus
          channels and operating on standard mode upto 100 kbits/s and fast
          mode upto 400 kbits/s.
 
+if SYS_I2C_MXC
+config SYS_I2C_MXC_I2C1
+       bool "NXP MXC I2C1"
+       help
+        Add support for NXP MXC I2C Controller 1.
+        Required for SoCs which have I2C MXC controller 1 eg LS1088A, LS2080A
+
+config SYS_I2C_MXC_I2C2
+       bool "NXP MXC I2C2"
+       help
+        Add support for NXP MXC I2C Controller 2.
+        Required for SoCs which have I2C MXC controller 2 eg LS1088A, LS2080A
+
+config SYS_I2C_MXC_I2C3
+       bool "NXP MXC I2C3"
+       help
+        Add support for NXP MXC I2C Controller 3.
+        Required for SoCs which have I2C MXC controller 3 eg LS1088A, LS2080A
+
+config SYS_I2C_MXC_I2C4
+       bool "NXP MXC I2C4"
+       help
+        Add support for NXP MXC I2C Controller 4.
+        Required for SoCs which have I2C MXC controller 4 eg LS1088A, LS2080A
+endif
+
+if SYS_I2C_MXC_I2C1
+config SYS_MXC_I2C1_SPEED
+       int "I2C Channel 1 speed"
+       default 40000000 if TARGET_LS2080A_SIMU || TARGET_LS2080A_EMU
+       default 100000
+       help
+        MXC I2C Channel 1 speed
+
+config SYS_MXC_I2C1_SLAVE
+       int "I2C1 Slave"
+       default 0
+       help
+        MXC I2C1 Slave
+endif
+
+if SYS_I2C_MXC_I2C2
+config SYS_MXC_I2C2_SPEED
+       int "I2C Channel 2 speed"
+       default 40000000 if TARGET_LS2080A_SIMU || TARGET_LS2080A_EMU
+       default 100000
+       help
+        MXC I2C Channel 2 speed
+
+config SYS_MXC_I2C2_SLAVE
+       int "I2C2 Slave"
+       default 0
+       help
+        MXC I2C2 Slave
+endif
+
+if SYS_I2C_MXC_I2C3
+config SYS_MXC_I2C3_SPEED
+       int "I2C Channel 3 speed"
+       default 100000
+       help
+        MXC I2C Channel 3 speed
+
+config SYS_MXC_I2C3_SLAVE
+       int "I2C3 Slave"
+       default 0
+       help
+        MXC I2C3 Slave
+endif
+
+if SYS_I2C_MXC_I2C4
+config SYS_MXC_I2C4_SPEED
+       int "I2C Channel 4 speed"
+       default 100000
+       help
+        MXC I2C Channel 4 speed
+
+config SYS_MXC_I2C4_SLAVE
+       int "I2C4 Slave"
+       default 0
+       help
+        MXC I2C4 Slave
+endif
+
 config SYS_I2C_OMAP24XX
        bool "TI OMAP2+ I2C driver"
        depends on ARCH_OMAP2PLUS
index 46b3566adf8882bc6a69ed77a3af38fa8d1a1cfd..73cd049f28dfa6405d056938de39c4b49f000fb2 100644 (file)
@@ -77,9 +77,6 @@
 
 /* I2C */
 #define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1                /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2                /* enable I2C bus 2 */
 
 #define CONFIG_CONS_INDEX       1
 #define CONFIG_SYS_NS16550_SERIAL
index 4c96186289258f3b44a4544c9849ebbb59884994..9e1b81a5649d189e60067aaa883d77d2cb6d776e 100644 (file)
 
 /* I2C */
 #define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1
-#define CONFIG_SYS_I2C_MXC_I2C2
-#define CONFIG_SYS_I2C_MXC_I2C3
-#define CONFIG_SYS_I2C_MXC_I2C4
 
 /* PCIe */
 #ifndef SPL_NO_PCIE
index b5af4b053bd910e5d57c52ac0709c8e3731e103b..2494d9dc9413ab9b5ee935a5523ae509e262e78f 100644 (file)
 
 /* I2C */
 #define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1
-#define CONFIG_SYS_I2C_MXC_I2C2
-#define CONFIG_SYS_I2C_MXC_I2C3
-#define CONFIG_SYS_I2C_MXC_I2C4
 
 /* PCIe */
 #define CONFIG_PCIE1           /* PCIE controller 1 */
index a3a393e472ec88ad188ed61e78b0d647d45b71e9..393ce4ff9dae7bb6b1f8017115043d7f874eca57 100644 (file)
 
 /* I2C */
 #define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1                /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2                /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
-#define CONFIG_SYS_I2C_MXC_I2C4                /* enable I2C bus 4 */
 
 /* Serial Port */
 #define CONFIG_CONS_INDEX       1
index edf954dadd7b602e1b4c332563693098ca903372..3e05b2788a1569c9de19d5a0fe7d733b08a76791 100644 (file)
 
 /* I2C */
 #define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1                /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2                /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
-#define CONFIG_SYS_I2C_MXC_I2C4                /* enable I2C bus 4 */
 
 /* Serial Port */
 #define CONFIG_CONS_INDEX       1
index 6b34edfbf115d3bf4286c46f15625b0752491c99..c2fdc4daf6fb5b6666f2e20d7f234d5c6495ee36 100644 (file)
@@ -12,9 +12,6 @@
 #define CONFIG_SYS_CLK_FREQ    100000000
 #define CONFIG_DDR_CLK_FREQ    133333333
 
-#define CONFIG_SYS_MXC_I2C1_SPEED      40000000
-#define CONFIG_SYS_MXC_I2C2_SPEED      40000000
-
 #define CONFIG_DDR_SPD
 #define CONFIG_SYS_FSL_DDR_EMU         /* Support emulator */
 #define SPD_EEPROM_ADDRESS1    0x51
index dad1090f84f7275821ca4db3469dbe6907776a2d..103ebec79e2b075bbefa09ed89001b9cbeebee0b 100644 (file)
@@ -12,9 +12,6 @@
 #define CONFIG_SYS_CLK_FREQ    100000000
 #define CONFIG_DDR_CLK_FREQ    133333333
 
-#define CONFIG_SYS_MXC_I2C1_SPEED      40000000
-#define CONFIG_SYS_MXC_I2C2_SPEED      40000000
-
 #define CONFIG_DIMM_SLOTS_PER_CTLR             1
 #define CONFIG_CHIP_SELECTS_PER_CTRL           4
 #ifdef CONFIG_SYS_FSL_HAS_DP_DDR