]> git.sur5r.net Git - u-boot/commitdiff
powerpc/83xx: configure CONFIG_POST for kmcoge5ne
authorThomas Herzmann <thomas.herzmann@keymile.com>
Fri, 4 May 2012 08:55:56 +0000 (10:55 +0200)
committerKim Phillips <kim.phillips@freescale.com>
Fri, 15 Jun 2012 22:12:51 +0000 (17:12 -0500)
kmcoge5ne starts the post tests if the testpin on
the board was enabled. Currently it does simply a memory
test.

Signed-off-by: Thomas Herzmann <thomas.herzmann@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
board/keymile/common/common.h
board/keymile/km83xx/km83xx.c
include/configs/km8360.h

index db117c77c08bcc2200e39377faa39b522932859c..f457aa30c6a49a71831316caa8563a97aa3c2679 100644 (file)
@@ -32,7 +32,11 @@ struct km_bec_fpga {
        unsigned char   res1[3];
        unsigned char   bprth;
        unsigned char   bprtl;
-       unsigned char   res2[6];
+       unsigned char   gprt3;
+       unsigned char   gprt2;
+       unsigned char   gprt1;
+       unsigned char   gprt0;
+       unsigned char   res2[2];
        unsigned char   prst;
        unsigned char   res3[0xfff0];
        unsigned char   pgy_id;
index a889750ff09e095eb5b23f05e3cccc2462c7bb08..f05cdfd93811bf55b91995a464746bdbcd589226 100644 (file)
@@ -27,6 +27,7 @@
 #include <asm/processor.h>
 #include <pci.h>
 #include <libfdt.h>
+#include <post.h>
 
 #include "../common/common.h"
 
@@ -288,3 +289,39 @@ int hush_init_var(void)
        return 0;
 }
 #endif
+
+#if defined(CONFIG_POST)
+int post_hotkeys_pressed(void)
+{
+       int testpin = 0;
+       struct km_bec_fpga *base =
+               (struct km_bec_fpga *)CONFIG_SYS_KMBEC_FPGA_BASE;
+       int testpin_reg = in_8(&base->CONFIG_TESTPIN_REG);
+       testpin = (testpin_reg & CONFIG_TESTPIN_MASK) != 0;
+       debug("post_hotkeys_pressed: %d\n", !testpin);
+       return testpin;
+}
+
+ulong post_word_load(void)
+{
+       void* addr = (ulong *) (CPM_POST_WORD_ADDR);
+       debug("post_word_load 0x%08lX:  0x%08X\n", (ulong)addr, in_le32(addr));
+       return in_le32(addr);
+
+}
+void post_word_store(ulong value)
+{
+       void* addr = (ulong *) (CPM_POST_WORD_ADDR);
+       debug("post_word_store 0x%08lX: 0x%08lX\n", (ulong)addr, value);
+       out_le32(addr, value);
+}
+
+int arch_memory_test_prepare(u32 *vstart, u32 *size, phys_addr_t *phys_offset)
+{
+       *vstart = CONFIG_SYS_MEMTEST_START;
+       *size = CONFIG_SYS_MEMTEST_END - CONFIG_SYS_MEMTEST_START;
+       debug("arch_memory_test_prepare 0x%08X 0x%08X\n", *vstart, *size);
+
+       return 0;
+}
+#endif
index 230b0545b71ee032515621e6a7a5842598dcf749..7631ab6a65602edc13c04398a6b611be1b193d51 100644 (file)
        BATU_BL_256M |\
        BATU_VS |\
        BATU_VP)
+/* enable POST tests */
+#define CONFIG_POST (CONFIG_SYS_POST_MEMORY|CONFIG_SYS_POST_MEM_REGIONS)
+#define CONFIG_POST_EXTERNAL_WORD_FUNCS /* use own functions, not generic */
+#define CPM_POST_WORD_ADDR  CONFIG_SYS_MEMTEST_END
+#define CONFIG_TESTPIN_REG  gprt3      /* for kmcoge5ne */
+#define CONFIG_TESTPIN_MASK 0x20       /* for kmcoge5ne */
+#define CONFIG_CMD_DIAG        /* so that testpin is inquired for POST test */
+
 #else
 #define CONFIG_SYS_IBAT6L      (0)
 #define CONFIG_SYS_IBAT6U      (0)