Remove lpd7a400 and lpd7a404 boards.
Signed-off-by: Wolfgang Denk <wd@denx.de>
imx27lite \
jadecpu \
km_kirkwood \
- lpd7a400 \
magnesium \
mv88f6281gtw_ge \
mx1ads \
+++ /dev/null
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := lpd7a40x.o flash.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak $(obj).depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+++ /dev/null
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-# Logic ZOOM LH7A400 SDK board w/Logic LH7A400-10 card engine
-# w/Sharp LH7A400 SoC (ARM920T) cpu
-#
-
-#
-# 32 or 64 MB SDRAM on SDCSC0 @ 0xc0000000
-#
-# Linux-Kernel is @ 0xC0008000, entry 0xc0008000
-# params @ 0xc0000100
-# optionally with a ramdisk at 0xc0300000
-#
-# we load ourself to 0xc1fc0000 (32M - 256K)
-#
-# download area is 0xc0f00000
-#
-
-CONFIG_SYS_TEXT_BASE = 0xc1fc0000
-#CONFIG_SYS_TEXT_BASE = 0x00000000
+++ /dev/null
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* #define DEBUG */
-
-#include <common.h>
-#include <environment.h>
-
-#define FLASH_BANK_SIZE 0x1000000 /* 16MB (2 x 8 MB) */
-#define MAIN_SECT_SIZE 0x40000 /* 256KB (2 x 128kB) */
-
-flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
-
-
-#define CMD_READ_ARRAY 0x00FF00FF
-#define CMD_IDENTIFY 0x00900090
-#define CMD_ERASE_SETUP 0x00200020
-#define CMD_ERASE_CONFIRM 0x00D000D0
-#define CMD_PROGRAM 0x00400040
-#define CMD_RESUME 0x00D000D0
-#define CMD_SUSPEND 0x00B000B0
-#define CMD_STATUS_READ 0x00700070
-#define CMD_STATUS_RESET 0x00500050
-
-#define BIT_BUSY 0x00800080
-#define BIT_ERASE_SUSPEND 0x00400040
-#define BIT_ERASE_ERROR 0x00200020
-#define BIT_PROGRAM_ERROR 0x00100010
-#define BIT_VPP_RANGE_ERROR 0x00080008
-#define BIT_PROGRAM_SUSPEND 0x00040004
-#define BIT_PROTECT_ERROR 0x00020002
-#define BIT_UNDEFINED 0x00010001
-
-#define BIT_SEQUENCE_ERROR 0x00300030
-#define BIT_TIMEOUT 0x80000000
-
-/*-----------------------------------------------------------------------
- */
-
-ulong flash_init (void)
-{
- int i, j;
- ulong size = 0;
-
- for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
- ulong flashbase = 0;
-
- flash_info[i].flash_id =
- (INTEL_MANUFACT & FLASH_VENDMASK) |
- (INTEL_ID_28F640J3A & FLASH_TYPEMASK);
- flash_info[i].size = FLASH_BANK_SIZE;
- flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
- memset (flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
- if (i == 0)
- flashbase = CONFIG_SYS_FLASH_BASE;
- else
- panic ("configured too many flash banks!\n");
- for (j = 0; j < flash_info[i].sector_count; j++) {
- flash_info[i].start[j] = flashbase;
-
- /* uniform sector size */
- flashbase += MAIN_SECT_SIZE;
- }
- size += flash_info[i].size;
- }
-
- /*
- * Protect monitor and environment sectors
- */
- flash_protect ( FLAG_PROTECT_SET,
- CONFIG_SYS_FLASH_BASE,
- CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-
- flash_protect ( FLAG_PROTECT_SET,
- CONFIG_ENV_ADDR,
- CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1, &flash_info[0]);
-
-#ifdef CONFIG_ENV_ADDR_REDUND
- flash_protect ( FLAG_PROTECT_SET,
- CONFIG_ENV_ADDR_REDUND,
- CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
- &flash_info[0]);
-#endif
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case (INTEL_MANUFACT & FLASH_VENDMASK):
- printf ("Intel: ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case (INTEL_ID_28F640J3A & FLASH_TYPEMASK):
- printf ("2x 28F640J3A (64Mbit)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- return;
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++) {
- if ((i % 5) == 0) {
- printf ("\n ");
- }
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_error (ulong code)
-{
- /* Check bit patterns */
- /* SR.7=0 is busy, SR.7=1 is ready */
- /* all other flags indicate error on 1 */
- /* SR.0 is undefined */
- /* Timeout is our faked flag */
-
- /* sequence is described in Intel 290644-005 document */
-
- /* check Timeout */
- if (code & BIT_TIMEOUT) {
- puts ("Timeout\n");
- return ERR_TIMOUT;
- }
-
- /* check Busy, SR.7 */
- if (~code & BIT_BUSY) {
- puts ("Busy\n");
- return ERR_PROG_ERROR;
- }
-
- /* check Vpp low, SR.3 */
- if (code & BIT_VPP_RANGE_ERROR) {
- puts ("Vpp range error\n");
- return ERR_PROG_ERROR;
- }
-
- /* check Device Protect Error, SR.1 */
- if (code & BIT_PROTECT_ERROR) {
- puts ("Device protect error\n");
- return ERR_PROG_ERROR;
- }
-
- /* check Command Seq Error, SR.4 & SR.5 */
- if (code & BIT_SEQUENCE_ERROR) {
- puts ("Command seqence error\n");
- return ERR_PROG_ERROR;
- }
-
- /* check Block Erase Error, SR.5 */
- if (code & BIT_ERASE_ERROR) {
- puts ("Block erase error\n");
- return ERR_PROG_ERROR;
- }
-
- /* check Program Error, SR.4 */
- if (code & BIT_PROGRAM_ERROR) {
- puts ("Program error\n");
- return ERR_PROG_ERROR;
- }
-
- /* check Block Erase Suspended, SR.6 */
- if (code & BIT_ERASE_SUSPEND) {
- puts ("Block erase suspended\n");
- return ERR_PROG_ERROR;
- }
-
- /* check Program Suspended, SR.2 */
- if (code & BIT_PROGRAM_SUSPEND) {
- puts ("Program suspended\n");
- return ERR_PROG_ERROR;
- }
-
- /* OK, no error */
- return ERR_OK;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- ulong result, result1;
- int iflag, prot, sect;
- int rc = ERR_OK;
- ulong start;
-
-#ifdef USE_920T_MMU
- int cflag;
-#endif
-
- debug ("flash_erase: s_first %d s_last %d\n", s_first, s_last);
-
- /* first look for protection bits */
-
- if (info->flash_id == FLASH_UNKNOWN)
- return ERR_UNKNOWN_FLASH_TYPE;
-
- if ((s_first < 0) || (s_first > s_last)) {
- return ERR_INVAL;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) !=
- (INTEL_MANUFACT & FLASH_VENDMASK)) {
- return ERR_UNKNOWN_FLASH_VENDOR;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
-#ifdef USE_920T_MMU
- cflag = dcache_status ();
- dcache_disable ();
-#endif
- iflag = disable_interrupts ();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
-
- debug ("Erasing sector %2d @ %08lX... ",
- sect, info->start[sect]);
-
- /* arm simple, non interrupt dependent timer */
- start = get_timer(0);
-
- if (info->protect[sect] == 0) { /* not protected */
- vu_long *addr = (vu_long *) (info->start[sect]);
- ulong bsR7, bsR7_2, bsR5, bsR5_2;
-
- /* *addr = CMD_STATUS_RESET; */
- *addr = CMD_ERASE_SETUP;
- *addr = CMD_ERASE_CONFIRM;
-
- /* wait until flash is ready */
- do {
- /* check timeout */
- if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
- *addr = CMD_STATUS_RESET;
- result = BIT_TIMEOUT;
- break;
- }
-
- *addr = CMD_STATUS_READ;
- result = *addr;
- bsR7 = result & (1 << 7);
- bsR7_2 = result & (1 << 23);
- } while (!bsR7 | !bsR7_2);
-
- *addr = CMD_STATUS_READ;
- result1 = *addr;
- bsR5 = result1 & (1 << 5);
- bsR5_2 = result1 & (1 << 21);
-#ifdef SAMSUNG_FLASH_DEBUG
- printf ("bsR5 %lx bsR5_2 %lx\n", bsR5, bsR5_2);
- if (bsR5 != 0 && bsR5_2 != 0)
- printf ("bsR5 %lx bsR5_2 %lx\n", bsR5, bsR5_2);
-#endif
-
- *addr = CMD_READ_ARRAY;
- *addr = CMD_RESUME;
-
- if ((rc = flash_error (result)) != ERR_OK)
- goto outahere;
-#if 0
- printf ("ok.\n");
- } else { /* it was protected */
-
- printf ("protected!\n");
-#endif
- }
- }
-
-outahere:
- /* allow flash to settle - wait 10 ms */
- udelay_masked (10000);
-
- if (iflag)
- enable_interrupts ();
-
-#ifdef USE_920T_MMU
- if (cflag)
- dcache_enable ();
-#endif
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash
- */
-
-static int write_word (flash_info_t * info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long *) dest;
- ulong result;
- int rc = ERR_OK;
- int iflag;
- ulong start;
-
-#ifdef USE_920T_MMU
- int cflag;
-#endif
-
- /*
- * Check if Flash is (sufficiently) erased
- */
- result = *addr;
- if ((result & data) != data)
- return ERR_NOT_ERASED;
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
-#ifdef USE_920T_MMU
- cflag = dcache_status ();
- dcache_disable ();
-#endif
- iflag = disable_interrupts ();
-
- /* *addr = CMD_STATUS_RESET; */
- *addr = CMD_PROGRAM;
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- start = get_timer(0);
-
- /* wait until flash is ready */
- do {
- /* check timeout */
- if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
- *addr = CMD_SUSPEND;
- result = BIT_TIMEOUT;
- break;
- }
-
- *addr = CMD_STATUS_READ;
- result = *addr;
- } while (~result & BIT_BUSY);
-
- /* *addr = CMD_READ_ARRAY; */
- *addr = CMD_STATUS_READ;
- result = *addr;
-
- rc = flash_error (result);
-
- if (iflag)
- enable_interrupts ();
-
-#ifdef USE_920T_MMU
- if (cflag)
- dcache_enable ();
-#endif
- *addr = CMD_READ_ARRAY;
- *addr = CMD_RESUME;
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash.
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int l;
- int i, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 24);
- }
- for (; i < 4 && cnt > 0; ++i) {
- data = (data >> 8) | (*src++ << 24);
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < 4; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 24);
- }
-
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = *((vu_long *) src);
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- src += 4;
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return ERR_OK;
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
- data = (data >> 8) | (*src++ << 24);
- --cnt;
- }
- for (; i < 4; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 24);
- }
-
- return write_word (info, wp, data);
-}
+++ /dev/null
-/*
- * Memory Setup - initialize memory controller(s) for devices required
- * to boot and relocate
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <config.h>
-#include <version.h>
-
-
-/* memory controller */
-#define BCRX_DEFAULT (0x0000fbe0)
-#define BCRX_MW_8 (0x00000000)
-#define BCRX_MW_16 (0x10000000)
-#define BCRX_MW_32 (0x20000000)
-#define BCRX_PME (0x08000000)
-#define BCRX_WP (0x04000000)
-#define BCRX_WST2_SHIFT (11)
-#define BCRX_WST1_SHIFT (5)
-#define BCRX_IDCY_SHIFT (0)
-
-/* Bank0 Async Flash */
-#define BCR0 (0x80002000)
-#define BCR0_FLASH (BCRX_MW_32 | (0x08<<BCRX_WST2_SHIFT) | (0x0E<<BCRX_WST1_SHIFT))
-
-/* Bank1 Open */
-#define BCR1 (0x80002004)
-
-/* Bank2 Not used (EEPROM?) */
-#define BCR2 (0x80002008)
-
-/* Bank3 Not used */
-#define BCR3 (0x8000200C)
-
-/* Bank4 PC Card1 */
-
-/* Bank5 PC Card2 */
-
-/* Bank6 CPLD IO Controller Peripherals (slow) */
-#define BCR6 (0x80002018)
-#define BCR6_CPLD_SLOW (BCRX_DEFAULT | BCRX_MW_16)
-
-/* Bank7 CPLD IO Controller Peripherals (fast) */
-#define BCR7 (0x8000201C)
-#define BCR7_CPLD_FAST (BCRX_MW_16 | (0x16<<BCRX_WST2_SHIFT) | (0x16<<BCRX_WST1_SHIFT) | (0x2<<BCRX_IDCY_SHIFT))
-
-/* SDRAM */
-#define GBLCNFG (0x80002404)
-#define GC_CKE (0x80000000)
-#define GC_CKSD (0x40000000)
-#define GC_LCR (0x00000040)
-#define GC_SMEMBURST (0x00000020)
-#define GC_MRS (0x00000002)
-#define GC_INIT (0x00000001)
-
-#define GC_CMD_NORMAL (GC_CKE)
-#define GC_CMD_MODE (GC_CKE | GC_MRS)
-#define GC_CMD_SYNCFLASH_LOAD (GC_CKE | GC_MRS | GC_LCR)
-#define GC_CMD_PRECHARGEALL (GC_CKE | GC_INIT)
-#define GC_CMD_NOP (GC_CKE | GC_INIT | GC_MRS)
-
-#define RFSHTMR (0x80002408)
-#define RFSHTMR_INIT (10) /* period=100 ns, HCLK=100Mhz, (2048+1-15.6*66) */
-#define RFSHTMR_NORMAL (1500) /* period=15.6 us, HCLK=100Mhz, (2048+1-15.6*66) */
-
-#define SDCSCX_BASE (0x80002410)
-#define SDCSCX_DEFAULT (0x01220008)
-#define SDCSCX_AUTOPC (0x01000000)
-#define SDCSCX_RAS2CAS_2 (0x00200000)
-#define SDCSCX_RAS2CAS_3 (0x00300000)
-#define SDCSCX_WBL (0x00080000)
-#define SDCSCX_CASLAT_8 (0x00070000)
-#define SDCSCX_CASLAT_7 (0x00060000)
-#define SDCSCX_CASLAT_6 (0x00050000)
-#define SDCSCX_CASLAT_5 (0x00040000)
-#define SDCSCX_CASLAT_4 (0x00030000)
-#define SDCSCX_CASLAT_3 (0x00020000)
-#define SDCSCX_CASLAT_2 (0x00010000)
-#define SDCSCX_2KPAGE (0x00000040)
-#define SDCSCX_SROMLL (0x00000020)
-#define SDCSCX_SROM512 (0x00000010)
-#define SDCSCX_4BNK (0x00000008)
-#define SDCSCX_2BNK (0x00000000)
-#define SDCSCX_EBW_16 (0x00000004)
-#define SDCSCX_EBW_32 (0x00000000)
-
-#define SDRAM_BASE (0xC0000000)
-#define SDCSC_BANK_OFFSET (0x10000000)
-
-/*
- * The SDRAM DEVICE MODE PROGRAMMING VALUE
- */
-#define BURST_LENGTH_4 (2 << 10)
-#define BURST_LENGTH_8 (3 << 10)
-#define WBURST_LENGTH_BL (0 << 19)
-#define WBURST_LENGTH_SINGLE (1 << 19)
-#define CAS_2 (2 << 14)
-#define CAS_3 (3 << 14)
-#define BAT_SEQUENTIAL (0 << 13)
-#define BAT_INTERLEAVED (1 << 13)
-#define OPM_NORMAL (0 << 17)
-#define SDRAM_DEVICE_MODE (WBURST_LENGTH_BL|OPM_NORMAL|CAS_3|BAT_SEQUENTIAL|BURST_LENGTH_4)
-
-
-#define TIMER1_BASE (0x80000C00)
-
-/*
- * special lookup flags
- */
-#define DO_MEM_DELAY 1
-#define DO_MEM_READ 2
-
-_TEXT_BASE:
- .word CONFIG_SYS_TEXT_BASE
-
-.globl lowlevel_init
-lowlevel_init:
- mov r9, lr @ save return address
-
- /* memory control configuration */
- /* make r0 relative the current location so that it */
- /* reads INITMEM_DATA out of FLASH rather than memory ! */
- /* r0 = current word pointer */
- /* r1 = end word location, one word past last actual word */
- /* r3 = address for writes, special lookup flags */
- /* r4 = value for writes, delay constants, or read addresses */
- /* r2 = location for mem reads */
-
- ldr r0, =INITMEM_DATA
- ldr r1, _TEXT_BASE
- sub r0, r0, r1
- add r1, r0, #112
-
-mem_loop:
- cmp r1, r0
- moveq pc, r9 @ Done
-
- ldr r3, [r0], #4 @ Fetch Destination Register Address, or 1 for delay
- ldr r4, [r0], #4 @ value
-
- cmp r3, #DO_MEM_DELAY
- bleq mem_delay
- beq mem_loop
- cmp r3, #DO_MEM_READ
- ldreq r2, [r4]
- beq mem_loop
- str r4, [r3] @ normal register/ram store
- b mem_loop
-
-mem_delay:
- ldr r5, =TIMER1_BASE
- mov r6, r4, LSR #1 @ timer resolution is ~2us
- str r6, [r5]
- mov r6, #0x88 @ using 508.469KHz clock, enable
- str r6, [r5, #8]
-0: ldr r6, [r5, #4] @ timer value
- cmp r6, #0
- bne 0b
- mov r6, #0 @ disable timer
- str r6, [r5, #8]
- mov pc, lr
-
- .ltorg
-/* the literal pools origin */
-
-INITMEM_DATA:
- .word BCR0
- .word BCR0_FLASH
- .word BCR6
- .word BCR6_CPLD_SLOW
- .word BCR7
- .word BCR7_CPLD_FAST
- .word SDCSCX_BASE
- .word (SDCSCX_RAS2CAS_3 | SDCSCX_CASLAT_3 | SDCSCX_SROMLL | SDCSCX_4BNK | SDCSCX_EBW_32)
- .word GBLCNFG
- .word GC_CMD_NOP
- .word DO_MEM_DELAY
- .word 200
- .word GBLCNFG
- .word GC_CMD_PRECHARGEALL
- .word RFSHTMR
- .word RFSHTMR_INIT
- .word DO_MEM_DELAY
- .word 8
- .word RFSHTMR
- .word RFSHTMR_NORMAL
- .word GBLCNFG
- .word GC_CMD_MODE
- .word DO_MEM_READ
- .word (SDRAM_BASE | SDRAM_DEVICE_MODE)
- .word GBLCNFG
- .word GC_CMD_NORMAL
- .word SDCSCX_BASE
- .word (SDCSCX_AUTOPC | SDCSCX_RAS2CAS_3 | SDCSCX_CASLAT_3 | SDCSCX_SROMLL | SDCSCX_4BNK | SDCSCX_EBW_32)
+++ /dev/null
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <netdev.h>
-#if defined(CONFIG_LH7A400)
-#include <lh7a400.h>
-#elif defined(CONFIG_LH7A404)
-#include <lh7a404.h>
-#else
-#error "No CPU defined!"
-#endif
-#include <asm/mach-types.h>
-
-#include <lpd7a400_cpld.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/*
- * Miscellaneous platform dependent initialisations
- */
-
-int board_init (void)
-{
- /* set up the I/O ports */
-
- /* enable flash programming */
- *(LPD7A400_CPLD_REGPTR(LPD7A400_CPLD_FLASH_REG)) |= FLASH_FPEN;
-
- /* Auto wakeup, LCD disable, WLAN enable */
- *(LPD7A400_CPLD_REGPTR(LPD7A400_CPLD_CECTL_REG)) &=
- ~(CECTL_AWKP|CECTL_LCDV|CECTL_WLPE);
-
- /* Status LED 2 on (leds are active low) */
- *(LPD7A400_CPLD_REGPTR(LPD7A400_CPLD_EXTGPIO_REG)) =
- (EXTGPIO_STATUS1|EXTGPIO_GPIO1) & ~(EXTGPIO_STATUS2);
-
-#if defined(CONFIG_LH7A400)
- /* arch number of Logic-Board - MACH_TYPE_LPD7A400 */
- gd->bd->bi_arch_number = MACH_TYPE_LPD7A400;
-#elif defined(CONFIG_LH7A404)
- /* arch number of Logic-Board - MACH_TYPE_LPD7A400 */
- gd->bd->bi_arch_number = MACH_TYPE_LPD7A404;
-#endif
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0xc0000100;
-
- return 0;
-}
-
-int dram_init (void)
-{
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
- return 0;
-}
-
-#ifdef CONFIG_CMD_NET
-int board_eth_init(bd_t *bis)
-{
- int rc = 0;
-#ifdef CONFIG_SMC91111
- rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
-#endif
- return rc;
-}
-#endif
dvlhost arm ixp
ixdp425 arm ixp
ixdpg425 arm ixp ixdp425
-lpd7a400 arm lh7a40x lpd7a40x
-lpd7a404 arm lh7a40x lpd7a40x
balloon3 arm pxa
cerf250 arm pxa
colibri_pxa270 arm pxa
Board Arch CPU removed Commit last known maintainer/contact
=============================================================================
+lpd7a404 arm lh7a40x - 2011-07-17
edb9301 arm arm920t - 2011-07-17
edb9302 arm arm920t - 2011-07-17
edb9302a arm arm920t - 2011-07-17
+++ /dev/null
-/*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Logic LH7A400-10 card engine
- */
-
-#ifndef __LPD7A400_10_H
-#define __LPD7A400_10_H
-
-
-#define CONFIG_ARM920T 1 /* arm920t core */
-#define CONFIG_LH7A40X 1 /* Sharp LH7A40x SoC family */
-#define CONFIG_LH7A400 1 /* Sharp LH7A400 S0C */
-
-/* The system clock PLL input frequency */
-#define CONFIG_SYS_CLK_FREQ 14745600 /* System Clock PLL Input (Hz) */
-
-/* ticks per second */
-#define CONFIG_SYS_HZ (508469)
-
-/*-----------------------------------------------------------------------
- * Stack sizes
- *
- * The stack sizes are set up in start.S using the settings below
- */
-#define CONFIG_STACKSIZE (128*1024) /* regular stack */
-#ifdef CONFIG_USE_IRQ
-#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
-#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
-#endif
-
-/*-----------------------------------------------------------------------
- * Physical Memory Map
- */
-#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
-#define PHYS_SDRAM_1 0xc0000000 /* SDRAM Bank #1 */
-#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
-
-#define CONFIG_SYS_FLASH_BASE 0x00000000 /* Flash Bank #1 */
-
-/*-----------------------------------------------------------------------
- * FLASH and environment organization
- */
-#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
-#define CONFIG_SYS_MAX_FLASH_SECT (64) /* max number of sectors on one chip */
-
-/* timeout values are in ticks */
-#define CONFIG_SYS_FLASH_ERASE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
-#define CONFIG_SYS_FLASH_WRITE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Write */
-
-/*----------------------------------------------------------------------
- * Using SMC91C111 LAN chip
- *
- * Default IO base of chip is 0x300, Card Engine has this address lines
- * (LAN chip) tied to Vcc, so we just care about the chip select
- */
-#define CONFIG_NET_MULTI
-#define CONFIG_SMC91111
-#define CONFIG_SMC91111_BASE (0x70000000)
-#undef CONFIG_SMC_USE_32_BIT
-
-#endif /* __LPD7A400_10_H */
+++ /dev/null
-/*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __LPD7A400_H_
-#define __LPD7A400_H_
-
-#define CONFIG_LPD7A400 /* Logic LH7A400 SDK */
-
-#undef CONFIG_USE_IRQ
-
-/*
- * This board uses the logic LH7A400-10 card engine
- */
-#include <configs/lpd7a400-10.h>
-
-#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG 1
-
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
-
-/*
- * select serial console configuration
- */
-#define CONFIG_LH7A40X_SERIAL
-#define CONFIG_CONSOLE_UART2 /* UART2 LH7A40x for console */
-
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-#define CONFIG_BAUDRATE 115200
-#define CONFIG_IPADDR 192.168.1.100
-#define CONFIG_NETMASK 255.255.1.0
-#define CONFIG_SERVERIP 192.168.1.1
-
-#define CONFIG_TIMESTAMP 1 /* Print timestamp info for images */
-
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#ifndef USE_920T_MMU
- #define CONFIG_CMD_PING
- #undef CONFIG_CMD_CACHE
-#else
- #define CONFIG_CMD_DATE
-#endif
-
-
-#define CONFIG_BOOTDELAY 3
-
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
-/* what's this ? it's not used anywhere */
-#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
-#endif
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "LPD7A400> " /* Monitor Command Prompt */
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-
-#define CONFIG_SYS_MEMTEST_START 0xc0300000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END 0xc0500000 /* 2 MB in DRAM */
-
-#define CONFIG_SYS_LOAD_ADDR 0xc0f00000 /* default load address */
-
-/* valid baudrates */
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
-
-/* size and location of u-boot in flash */
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_MONITOR_LEN (256<<10)
-
-#define CONFIG_ENV_IS_IN_FLASH 1
-
-/* Address and size of Primary Environment Sector */
-#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0xFC0000)
-#define CONFIG_ENV_SIZE 0x40000
-
-#endif /* __LPD7A400_H_ */
+++ /dev/null
-/*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Logic LH7A400-10 card engine
- */
-
-#ifndef __LPD7A404_10_H
-#define __LPD7A404_10_H
-
-
-#define CONFIG_ARM920T 1 /* arm920t core */
-#define CONFIG_LH7A40X 1 /* Sharp LH7A40x SoC family */
-#define CONFIG_LH7A404 1 /* Sharp LH7A404 SoC */
-
-/* The system clock PLL input frequency */
-#define CONFIG_SYS_CLK_FREQ 14745600 /* System Clock PLL Input (Hz) */
-
-/* ticks per second */
-#define CONFIG_SYS_HZ (508469)
-
-/*-----------------------------------------------------------------------
- * Stack sizes
- *
- * The stack sizes are set up in start.S using the settings below
- */
-#define CONFIG_STACKSIZE (128*1024) /* regular stack */
-#ifdef CONFIG_USE_IRQ
-#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
-#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
-#endif
-
-/*-----------------------------------------------------------------------
- * Physical Memory Map
- */
-#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
-#define PHYS_SDRAM_1 0xc0000000 /* SDRAM Bank #1 */
-#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
-
-#define CONFIG_SYS_FLASH_BASE 0x00000000 /* Flash Bank #1 */
-
-/*-----------------------------------------------------------------------
- * FLASH and environment organization
- */
-#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
-#define CONFIG_SYS_MAX_FLASH_SECT (64) /* max number of sectors on one chip */
-
-/* timeout values are in ticks */
-#define CONFIG_SYS_FLASH_ERASE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
-#define CONFIG_SYS_FLASH_WRITE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Write */
-
-/*----------------------------------------------------------------------
- * Using SMC91C111 LAN chip
- *
- * Default IO base of chip is 0x300, Card Engine has this address lines
- * (LAN chip) tied to Vcc, so we just care about the chip select
- */
-#define CONFIG_NET_MULTI
-#define CONFIG_SMC91111
-#define CONFIG_SMC91111_BASE (0x70000000)
-#undef CONFIG_SMC_USE_32_BIT
-
-#endif /* __LPD7A404_10_H */
+++ /dev/null
-/*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __LPD7A404_H_
-#define __LPD7A404_H_
-
-#define CONFIG_LPD7A404 /* Logic LH7A400 SDK */
-
-#undef CONFIG_USE_IRQ
-
-/*
- * This board uses the logic LH7A404-10 card engine
- */
-#include <configs/lpd7a404-10.h>
-
-#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG 1
-
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
-
-/*
- * select serial console configuration
- */
-#define CONFIG_LH7A40X_SERIAL
-#define CONFIG_CONSOLE_UART2 /* UART2 LH7A40x for console */
-
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-#define CONFIG_BAUDRATE 115200
-#define CONFIG_IPADDR 192.168.1.100
-#define CONFIG_NETMASK 255.255.1.0
-#define CONFIG_SERVERIP 192.168.1.1
-
-#define CONFIG_TIMESTAMP 1 /* Print timestamp info for images */
-
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#ifndef USE_920T_MMU
- #define CONFIG_CMD_PING
- #undef CONFIG_CMD_CACHE
-#else
- #define CONFIG_CMD_DATE
-#endif
-
-
-#define CONFIG_BOOTDELAY 3
-
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
-/* what's this ? it's not used anywhere */
-#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
-#endif
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "LPD7A404> " /* Monitor Command Prompt */
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-
-#define CONFIG_SYS_MEMTEST_START 0xc0300000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END 0xc0500000 /* 2 MB in DRAM */
-
-#define CONFIG_SYS_LOAD_ADDR 0xc0f00000 /* default load address */
-
-/* valid baudrates */
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
-
-/* size and location of u-boot in flash */
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_MONITOR_LEN (256<<10)
-
-#define CONFIG_ENV_IS_IN_FLASH 1
-
-/* Address and size of Primary Environment Sector */
-#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0xFC0000)
-#define CONFIG_ENV_SIZE 0x40000
-
-#endif /* __LPD7A404_H_ */
projects / u-boot / commitdiff