]> git.sur5r.net Git - u-boot/commitdiff
dm: pci: Correct primary/secondary/subordinate bus number assignment
authorBin Meng <bmeng.cn@gmail.com>
Sat, 18 Jul 2015 16:20:03 +0000 (00:20 +0800)
committerSimon Glass <sjg@chromium.org>
Tue, 28 Jul 2015 16:36:23 +0000 (10:36 -0600)
In driver model, each pci bridge device has its own hose structure.
hose->first_busno points to the bridge device's device number, so
we should not substract hose->first_busno before programming the
bridge device's primary/secondary/subordinate bus number registers.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
drivers/pci/pci_auto.c

index e034ed1715cfcda988312bbb2dcce6cbea3177e2..ef6dc4facbfa28cf8f4406c86c1a170c3c154562 100644 (file)
@@ -224,10 +224,15 @@ void pciauto_prescan_setup_bridge(struct pci_controller *hose,
        prefechable_64 &= PCI_PREF_RANGE_TYPE_MASK;
 
        /* Configure bus number registers */
+#ifdef CONFIG_DM_PCI
+       pci_hose_write_config_byte(hose, dev, PCI_PRIMARY_BUS, PCI_BUS(dev));
+       pci_hose_write_config_byte(hose, dev, PCI_SECONDARY_BUS, sub_bus);
+#else
        pci_hose_write_config_byte(hose, dev, PCI_PRIMARY_BUS,
                                   PCI_BUS(dev) - hose->first_busno);
        pci_hose_write_config_byte(hose, dev, PCI_SECONDARY_BUS,
                                   sub_bus - hose->first_busno);
+#endif
        pci_hose_write_config_byte(hose, dev, PCI_SUBORDINATE_BUS, 0xff);
 
        if (pci_mem) {
@@ -295,8 +300,12 @@ void pciauto_postscan_setup_bridge(struct pci_controller *hose,
        struct pci_region *pci_io = hose->pci_io;
 
        /* Configure bus number registers */
+#ifdef CONFIG_DM_PCI
+       pci_hose_write_config_byte(hose, dev, PCI_SUBORDINATE_BUS, sub_bus);
+#else
        pci_hose_write_config_byte(hose, dev, PCI_SUBORDINATE_BUS,
                                   sub_bus - hose->first_busno);
+#endif
 
        if (pci_mem) {
                /* Round memory allocator to 1MB boundary */