phy.c:46:5: warning: symbol 'genphy_config_advert' was not declared. Should it be static?
phy.c:121:5: warning: symbol 'genphy_setup_forced' was not declared. Should it be static?
phy.c:468:5: warning: symbol 'phy_probe' was not declared. Should it be static?
phy.c:491:19: warning: symbol 'get_phy_driver' was not declared. Should it be static?
phy.c:508:19: warning: symbol 'phy_device_create' was not declared. Should it be static?
phy.c:552:5: warning: symbol 'get_phy_id' was not declared. Should it be static?
phy.c:584:19: warning: symbol 'get_phy_device' was not declared. Should it be sta
vitesse.c:126:5: warning: symbol 'vsc8601_config' was not declared. Should it be static?
vsc7385.c:33:5: warning: symbol 'vsc7385_upload_firmware' was not declared. Should it be static?
tgec_phy.c:33:5: warning: symbol 'tgec_mdio_write' was not declared. Should it be static?
tgec_phy.c:75:5: warning: symbol 'tgec_mdio_read' was not declared. Should it be static?
tgec_phy.c:117:5: warning: symbol 'tgec_mdio_reset' was not declared. Should it be static?
eth.c:48:6: warning: symbol 'dtsec_configure_serdes' was not declared. Should it be static?
p4080.c:26:5: warning: symbol 'port_to_devdisr' was not declared. Should it be static?
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
TBICR_FULL_DUPLEX | TBICR_SPEED1_SET)
/* Configure the TBI for SGMII operation */
-void dtsec_configure_serdes(struct fm_eth *priv)
+static void dtsec_configure_serdes(struct fm_eth *priv)
{
#ifdef CONFIG_SYS_FMAN_V3
u32 value;
#include <asm/immap_85xx.h>
#include <asm/fsl_serdes.h>
-u32 port_to_devdisr[] = {
+static u32 port_to_devdisr[] = {
[FM1_DTSEC1] = MPC85xx_DEVDISR_TSEC1,
[FM1_DTSEC2] = MPC85xx_DEVDISR_TSEC2,
};
#include <asm/immap_85xx.h>
#include <asm/fsl_serdes.h>
-u32 port_to_devdisr[] = {
+static u32 port_to_devdisr[] = {
[FM1_DTSEC1] = FSL_CORENET_DEVDISR2_DTSEC1_1,
[FM1_DTSEC2] = FSL_CORENET_DEVDISR2_DTSEC1_2,
[FM1_DTSEC3] = FSL_CORENET_DEVDISR2_DTSEC1_3,
#include <asm/immap_85xx.h>
#include <asm/fsl_serdes.h>
-u32 port_to_devdisr[] = {
+static u32 port_to_devdisr[] = {
[FM1_DTSEC1] = FSL_CORENET_DEVDISR2_DTSEC1_1,
[FM1_DTSEC2] = FSL_CORENET_DEVDISR2_DTSEC1_2,
[FM1_DTSEC3] = FSL_CORENET_DEVDISR2_DTSEC1_3,
* until the write is done before it returns. All PHY configuration has to be
* done through the TSEC1 MIIM regs
*/
-int tgec_mdio_write(struct mii_dev *bus, int port_addr, int dev_addr,
- int regnum, u16 value)
+static int tgec_mdio_write(struct mii_dev *bus, int port_addr, int dev_addr,
+ int regnum, u16 value)
{
u32 mdio_ctl;
u32 stat_val;
* Clears miimcom first. All PHY configuration has to be done through the
* TSEC1 MIIM regs
*/
-int tgec_mdio_read(struct mii_dev *bus, int port_addr, int dev_addr,
- int regnum)
+static int tgec_mdio_read(struct mii_dev *bus, int port_addr, int dev_addr,
+ int regnum)
{
u32 mdio_ctl;
u32 stat_val;
return in_be32(®s->mdio_data) & 0xffff;
}
-int tgec_mdio_reset(struct mii_dev *bus)
+static int tgec_mdio_reset(struct mii_dev *bus)
{
return 0;
}
* what is supported. Returns < 0 on error, 0 if the PHY's advertisement
* hasn't changed, and > 0 if it has changed.
*/
-int genphy_config_advert(struct phy_device *phydev)
+static int genphy_config_advert(struct phy_device *phydev)
{
u32 advertise;
int oldadv, adv;
* Description: Configures MII_BMCR to force speed/duplex
* to the values in phydev. Assumes that the values are valid.
*/
-int genphy_setup_forced(struct phy_device *phydev)
+static int genphy_setup_forced(struct phy_device *phydev)
{
int err;
int ctl = 0;
return 0;
}
-int phy_probe(struct phy_device *phydev)
+static int phy_probe(struct phy_device *phydev)
{
int err = 0;
return &genphy_driver;
}
-struct phy_driver *get_phy_driver(struct phy_device *phydev,
+static struct phy_driver *get_phy_driver(struct phy_device *phydev,
phy_interface_t interface)
{
struct list_head *entry;
return generic_for_interface(interface);
}
-struct phy_device *phy_device_create(struct mii_dev *bus, int addr, int phy_id,
- phy_interface_t interface)
+static struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
+ int phy_id,
+ phy_interface_t interface)
{
struct phy_device *dev;
* Description: Reads the ID registers of the PHY at @addr on the
* @bus, stores it in @phy_id and returns zero on success.
*/
-int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id)
+static int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id)
{
int phy_reg;
* Description: Reads the ID registers of the PHY at @addr on the
* @bus, then allocates and returns the phy_device to represent it.
*/
-struct phy_device *get_phy_device(struct mii_dev *bus, int addr,
- phy_interface_t interface)
+static struct phy_device *get_phy_device(struct mii_dev *bus, int addr,
+ phy_interface_t interface)
{
u32 phy_id = 0x1fffffff;
int i;
}
/* Vitesse VSC8601 */
-int vsc8601_config(struct phy_device *phydev)
+static int vsc8601_config(struct phy_device *phydev)
{
/* Configure some basic stuff */
#ifdef CONFIG_SYS_VSC8601_SKEWFIX
#include <common.h>
#include <asm/io.h>
#include <asm/errno.h>
+#include "vsc7385.h"
/*
* Upload a Vitesse VSC7385 firmware image to the hardware