+commit 5e6e350fc489aa19402f1e79037dd8c0a4bbd73d
+Author: Wolfgang Denk <wd@denx.de>
+Date: Fri Jul 4 20:07:35 2008 +0200
+
+ CCM/SCM boards: fix out of tree building
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit ab4c3a490df9a964711556d2a05b0c787db45fde
+Author: Wolfgang Denk <wd@denx.de>
+Date: Thu Jul 3 23:22:27 2008 +0200
+
+ SCM board: fix build errors.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit a566466f17ba0e2d2b6c250e77da678fb932470d
+Author: Wolfgang Denk <wd@denx.de>
+Date: Thu Jul 3 23:06:36 2008 +0200
+
+ IAD210 board: fix ``"ALIGN" redefined'' warning.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit ad756314797c16fa5dca23e115aab881011f164f
+Author: Wolfgang Denk <wd@denx.de>
+Date: Thu Jul 3 23:00:24 2008 +0200
+
+ CCM board: fix build errors.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit ced209c50e80c25f13c083099b05044048d21f4f
+Author: Wolfgang Denk <wd@denx.de>
+Date: Thu Jul 3 22:39:21 2008 +0200
+
+ sacsng board: fix warnings "suggest explicit braces to avoid ambiguous 'else'"
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 4ff170a8180a79da4cdaab1b30d58cd7b6be565e
+Author: Wolfgang Denk <wd@denx.de>
+Date: Thu Jul 3 22:34:08 2008 +0200
+
+ Cleanup: fix "expected specifier-qualifier-list before 'phys_size_t'" errors
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 730f298485984b011b6ee8f4acb511cb45a843dd
+Author: Wolfgang Denk <wd@denx.de>
+Date: Thu Jul 3 22:04:17 2008 +0200
+
+ lmb: fix "implicit declaration of function 'lmb_free'" warning
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 322ef5e28d2dc62571afc699b00add22a8e006e4
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Jul 2 23:53:23 2008 +0200
+
+ Cleanup: remove redundant deleting on *~ files
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit c8a3b109f07f02342d097b30908965f7261d9f15
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Jul 2 23:49:18 2008 +0200
+
+ Cleanup out-or-tree building for some boards (.depend)
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit a30cc5a340e7f8f5f85a0e08e7f6c4106ce117c4
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Jul 2 23:38:50 2008 +0200
+
+ Cleanup: fix out-of-tree building for some boards
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 461fa68d20861811487944d22291db5a13410e20
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Jul 2 23:00:14 2008 +0200
+
+ Cleanup: replace hard-wired $(AR) 'crv' settings by $(ARFLAGS)
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 5981ebd32017e062b08aa6747cf591276f2db779
+Author: Detlev Zundel <dzu@denx.de>
+Date: Fri Jun 20 22:26:24 2008 +0200
+
+ fdt: Fix typo in variable name.
+
+ Signed-off-by: Detlev Zundel <dzu@denx.de>
+
+commit a7a5982cd0f3482f88225af4da7795bc4f6cb9bc
+Author: Gary Jennejohn <garyj@denx.de>
+Date: Thu Jun 19 11:11:19 2008 +0200
+
+ Add logos for RRvision board
+
+ Signed-off-by: Gary Jennejohn <garyj@denx.de>
+
+commit ee4ae38342142237ca85913f88ee570c1eb5ca7c
+Author: Esben Haabendal <EsbenHaabendal@gmail.com>
+Date: Wed Jun 18 11:03:57 2008 +0200
+
+ mpc8260: add fdt_fixup_ethernet support
+
+ Add support for updating mac-address and local-mac-address in fdt for
+ all MPC8260 targets.
+
+ Signed-off-by: Esben Haabendal <eha@doredevelopment.dk>
+
+commit f6a69559d64498a04e1e0b087a9b920e5775f866
+Author: Steven A. Falco <sfalco@harris.com>
+Date: Thu Jun 12 13:24:42 2008 -0400
+
+ cmd_nvedit.c: clean up syntax highlighting
+
+ My text-editor (vim) has a bit of trouble syntax-highlighting the
+ cmd_nvedit.c file, because it apparently does not parse C
+ ifdef/else/endif. The following patch does not change the behavior of
+ the code at all, but does allow the editor to properly
+ syntax-highlight the file.
+
+ Signed-off-by: Steve Falco <sfalco@harris.com>
+
+commit 75678c807a6272ecc5541eb32898c93887f08400
+Author: Steven A. Falco <sfalco@harris.com>
+Date: Thu Jun 12 13:22:12 2008 -0400
+
+ Make setenv() return status
+
+ Currently, the setenv function does not return an error code.
+ This patch allows to test for errors.
+
+ Signed-off-by: Steve Falco <sfalco@harris.com>
+
+commit 4928e97c8531283ca9b368b7c29a8a12e726562a
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Wed Jun 11 10:14:06 2008 -0500
+
+ PPC: Added fls, fls64, __ilog2_u64, and ffs64 to bitops
+
+ fls64, __ilog2_u64, ffs64 are variants that work on an u64,
+ and fls is used to implement them.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 83002a77cbdf383015ca384eff5fa31722d8e571
+Author: Magnus Lilja <lilja.magnus@gmail.com>
+Date: Mon Jun 9 22:58:48 2008 +0200
+
+ i.MX31: Cleanup comments in lowlevel_init.S.
+
+ Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
+
+commit f8cc312bbee69257d741dc9f4062f4a0f5adf609
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Sun Jun 8 23:28:33 2008 -0700
+
+ Move conditional compilation of MPC8XXX SPI driver to Makefile
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit d92ea21bafb674ee2bf27447970b047845e7b0a2
+Author: Juergen Kilb <J.Kilb@gmx.de>
+Date: Sun Jun 8 17:59:53 2008 +0200
+
+ i.MX31: fixed CTRL-C detection
+
+ The Register URXD contains status information in bits [15..8].
+ With status bit 15 set, CTRL-C was reported as 0x8003 instead
+ of 0x03. Therefore CTRL-C was not detected.
+ To solve this, bits [15..8] were masked out now.
+
+ Signed-off-by: Juergen Kilb <J.Kilb@gmx.de>
+ Acked-by: Felix Radensky <felix@embedded-sol.com>
+
+commit b571afde0295b007a45055ee49f8822c753a5651
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Sat Jun 7 12:29:52 2008 +0200
+
+ add SHA256 support
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ Signed-off-by: Francesco Albanese <Francesco.Albanese@swisscom.com>
+
+commit 3bab76a26e03df4ff81342fcc16393ce37d9766b
+Author: Marian Balakowicz <m8@semihalf.com>
+Date: Fri Jun 6 23:07:40 2008 +0200
+
+ Delay FIT format check on sector based devices
+
+ Global FIT image operations like format check cannot be performed on
+ a first sector data, defer them to the point when whole FIT image was
+ uploaded to a system RAM.
+
+ Signed-off-by: Marian Balakowicz <m8@semihalf.com>
+ Partial ('cmd_nand' case) Acked-by: Grant Erickson <gerickson@nuovations.com>
+ NAND and DOC bits Acked-by: Scott Wood <scottwood@freescale.com>
+
+commit 9810263afec5ac5f38f92963bb3b6d799e4331d0
+Author: Dave Liu <r63238@freescale.com>
+Date: Tue Jun 3 17:38:19 2008 +0800
+
+ sata: wait for device updating signature to host
+
+ The driver need wait for the device updating signature to host.
+ If we don't wait for it, the driver can not detect the device(disk)
+ when the system powers up.
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+
+commit 8b616edb118e37d05f6401389eaee1c636b22828
+Author: Stuart Wood <stuart.wood@labxtechnologies.com>
+Date: Mon Jun 2 16:42:19 2008 -0400
+
+ serial_pl010.c: add watchdog support
+
+ Signed-off-by: Stuart Wood <stuart.wood@labxtechnologies.com>
+
+commit 86d3273e2b7be3fffb45e20c08535d6ad3aded6b
+Author: Stuart Wood <stuart.wood@labxtechnologies.com>
+Date: Mon Jun 2 16:40:08 2008 -0400
+
+ jffs2_1pass.c: add watchdog support
+
+ Signed-off-by: Stuart Wood <stuart.wood@labxtechnologies.com>
+
+commit 5744ddc6637fea4f7b911a54a5fa860cb81a5d89
+Author: Sascha Laue <sascha.laue@liebherr.com>
+Date: Fri May 30 09:48:14 2008 +0200
+
+ Configure DSP POST; add watchdog reset to diag command
+
+ Signed-off-by: Sascha Laue <sascha.laue@liebherr.com>
+
+commit f13526517859bf6b573e23ff47199e107d1009b5
+Author: Tor Krill <tor@excito.com>
+Date: Thu May 29 10:40:17 2008 +0200
+
+ Add sata sil3114 support
+
+ Signed-off-by: Tor Krill <tor@excito.com>
+
+commit e093a247628228100f405b6d7f6b1bfc16141938
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sat Jun 28 23:34:37 2008 +0200
+
+ Coding Style Cleanup
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 01db232dd7a0ceb81208a9f2545720c80e5bfd83
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sat Jun 28 23:16:01 2008 +0200
+
+ Update CHANGELOG
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit c7f879ec2b389c4f2bf726b293bd516f4c692e03
+Author: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
+Date: Wed May 21 13:58:41 2008 -0400
+
+ ARM: Add support for Lyrtech SFF-SDR board (ARM926EJS)
+
+ This patch adds support for the Lyrtech SFF-SDR board,
+ based on the TI DaVinci architecture (ARM926EJS).
+
+ Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
+ Signed-off-by: Philip Balister <philip@balister.org>
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 341188b9ccaa8d4462d772cc067aca8d7618633a
+Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+Date: Thu May 22 11:09:59 2008 +0200
+
+ MMC: Consolidate MMC/SD command definitions
+
+ This moves the MMC and SD Card command definitions from
+ include/asm/arch/mmc.h into include/mmc.h. These definitions are
+ given by the MMC and SD Card standards, not by any particular
+ architecture.
+
+ There's a lot more room for consolidation in the MMC drivers which
+ I'm hoping to get done eventually, but this patch is a start.
+
+ Compile-tested for all avr32 boards as well as lpc2292sodimm and
+ lubbock. This should cover all three mmc drivers in the tree.
+
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
+commit fa60edfc4c952626e048c0e065f654b3c1822fa5
+Author: Kyungmin Park <kmpark@infradead.org>
+Date: Wed May 21 14:38:08 2008 +0900
+
+ Use better Ethernet timings for apollon board
+
+ Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
+
+commit 41c5eaa7253ed82bbae1eda5667755872c615164
+Author: Andy Fleming <afleming@freescale.com>
+Date: Mon Jun 16 13:58:56 2008 -0500
+
+ Resize device tree to allow space for board changes and the chosen node
+
+ Current code requires that a compiled device tree have space added to the end to
+ leave room for extra nodes added by board code (and the chosen node). This
+ requires that device tree creators anticipate how much space U-Boot will add to
+ the tree, which is absurd. Ideally, the code would resize and/or relocate the
+ tree when it needed more space, but this would require a systemic change to the
+ fdt code, which is non-trivial. Instead, we resize the tree inside
+ boot_relocate_fdt, reserving either the remainder of the bootmap (in the case
+ where the fdt is inside the bootmap), or adding CFG_FDT_PAD bytes to the size.
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit 7570a9941fc565922078679a72d246fe208d696d
+Author: Andy Fleming <afleming@freescale.com>
+Date: Mon Jun 16 13:58:55 2008 -0500
+
+ Fix an underflow bug in __lmb_alloc_base
+
+ __lmb_alloc_base can underflow if it fails to find free space. This was fixed
+ in linux with commit d9024df02ffe74d723d97d552f86de3b34beb8cc. This patch
+ merely updates __lmb_alloc_base to resemble the current version in Linux.
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit 63796c4e61b207d2e635729d41b7a7f7d188b03c
+Author: Andy Fleming <afleming@freescale.com>
+Date: Mon Jun 16 13:58:54 2008 -0500
+
+ Add lmb_free
+
+ lmb_free allows us to unreserve some memory so we can use lmb_alloc_base or
+ lmb_reserve to temporarily reserve some memory.
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit 4b03ac8b5102ad95f9fede7d13fa236977593e7d
+Author: Andy Fleming <afleming@freescale.com>
+Date: Mon Jun 16 13:58:53 2008 -0500
+
+ Add ALIGN() macro
+
+ ALIGN() returns the smallest aligned value greater than the passed
+ in address or size. Taken from Linux.
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit 28eab0d77352b84885f938759bf2612b7bf0bc44
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date: Mon May 19 12:26:38 2008 +0200
+
+ Conditionally add -fno-stack-protector to CFLAGS
+
+ When compile-testing on powerpc, I get errors like this:
+
+ net/nfs.c:422: undefined reference to `__stack_chk_fail_local'
+
+ This seems to be because -fstack-protector is on by default, so
+ let's explicitly disable it on all architectures that support the
+ option.
+
+ The Ubuntu toolchain is affected by this problem, and according to
+ Mike Frysinger, Gentoo has been running with SSP enabled for years.
+ More and more distros are turning SSP on by default, so this problem
+ is likely to get worse in the future.
+
+ Also, powerpc just happens to be one of the arches I do
+ compile-testing on. There may be other arches affected by this too.
+
+ Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit dfd3be881c03a26e31f0dea4a42e76061fa610ac
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Sun May 18 19:09:52 2008 +0200
+
+ pcmcia/ti_pci1410a: Move compile condition to the Makefile
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 72d5d5f7b5c74a188df238ec6dd824d80c74857a
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Sun May 18 19:09:51 2008 +0200
+
+ pxa_pcmcia: Move compile condition to the Makefile
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit c9eff32881fb429101c937cf8c268f1d42e5c2a9
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Sun May 18 19:09:50 2008 +0200
+
+ marabun_pcmcia: Move compile condition to the Makefile
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit b4fe1a71090c73efc6e4188eed188b2ff67fc02a
+Author: Wolfgang Grandegger <wg@grandegger.com>
+Date: Thu Jun 5 13:02:30 2008 +0200
+
+ MPC8360ERDK: adapt NAND interface for the re-written FSL NAND UPM driver
+
+ This patch is based on the following patch sent a few minutes ago:
+ "NAND FSL UPM: driver re-write using the hwcontrol callback"
+ It is untested, of course. Anton, could you please give it a try.
+
+ Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
+ Acked-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+
+commit 96026d42fa4e646d28318c0a1438aac4b2017909
+Author: Anatolij Gustschin <agust@denx.de>
+Date: Thu Jun 12 12:40:11 2008 +0200
+
+ Fix 4xx build issue
+
+ Building for 4xx doesn't work since commit 4dbdb768:
+
+ In file included from 4xx_pcie.c:28:
+ include/asm/processor.h:971: error: expected ')' before 'ver'
+ make[1]: *** [4xx_pcie.o] Error 1
+
+ This patch fixes the problem.
+
+ Signed-off-by: Anatolij Gustschin <agust@denx.de>
+ Acked-by: Stefan Roese <sr@denx.de>
+ Acked-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit fb8c061ea05fc68d37e2a8b9f8c949d76c8d71a8
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Jun 16 10:40:02 2008 +0200
+
+ cfi-flash: Fix problem in flash_toggle(), busy was not detected reliably
+
+ This patch simplifies flash_toggle() (AMD commandset), which is used to
+ detect if a FLASH device is still busy with erase/program operations. On
+ 800MHz Canyonlands/Glacier boards (460EX/GT) the current implementation
+ did not detect the busy state reliably, resulting in non erased sectors
+ etc. This patch now simplifies this function by "just" comparing the
+ complete data-word instead of ANDing it with the command-word (0x40)
+ before the compatison. It is done the same way in the Linux implementation
+ chip_ready() in cfi_cmdset_0002.c.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 9e4006bca3d9fb4a2d061996771036cb01e539d3
+Author: Philip Balister <philip@balister.org>
+Date: Mon Jun 16 08:58:07 2008 -0400
+
+ NAND: Add missing declaration to non-redundant saveenv().
+
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 2cdb7f50ac59594540fffdf8dbd7b12beac79c52
+Author: Wolfgang Grandegger <wg@grandegger.com>
+Date: Mon Jun 2 15:09:55 2008 +0200
+
+ MPC8360ERDK: adapt NAND interface for the re-written FSL NAND UPM driver
+
+ Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
+ Acked-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 212ed90615c3d20fa6bd73d70d5153bd0d124e5f
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Jun 10 15:34:11 2008 +0200
+
+ ppc4xx: Canyonlands: Disable the RTC M41T62 square wave output
+
+ This patch disables the square wave output of the M41T62 RTC used on
+ Canyonlands & Glacier. Here the explanation:
+
+ The serial real-time clock part used in the design is an
+ STMicro M41T62. This part has a full-time 32KHz square wave
+ output that is connected to the TmrClk input to the
+ processor. The default state for this square wave output is
+ enabled so the output runs continuously when the board is
+ powered normally and also from the battery. The TmrClk input
+ to the processor goes to ground when the power is removed
+ from the board/processor, and therefore the running square
+ wave output is driving ground which drains the battery quickly.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit a94f22f08f280905926219e568568964cb9eeb9d
+Author: Andy Fleming <afleming@freescale.com>
+Date: Wed Jun 11 18:10:20 2008 -0500
+
+ Fix build issue with string.h and linux/string.h
+
+ This commit:
+ commit 338cc038461a6c7709c5b86fd9a240209338a1ae
+ Author: Wolfgang Denk <wd@denx.de>
+ Date: Fri Jun 6 14:28:14 2008 +0200
+
+ tools/mkimage: fix compiler warnings on some systems.
+
+ Broke building on some systems, because the host's string.h was interfering
+ with u-boot's linux/string.h. It doesn't look like we need the u-boot one if
+ we're building for the host, so now we only include when building inside
+ u-boot.
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit 9973e3c614721bbf169882ffc3be266a6611cd60
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date: Mon Jun 9 16:03:40 2008 -0500
+
+ Change initdram() return type to phys_size_t
+
+ This patch changes the return type of initdram() from long int to phys_size_t.
+ This is required for a couple of reasons: long int limits the amount of dram
+ to 2GB, and u-boot in general is moving over to phys_size_t to represent the
+ size of physical memory. phys_size_t is defined as an unsigned long on almost
+ all current platforms.
+
+ This patch *only* changes the return type of the initdram function (in
+ include/common.h, as well as in each board's implementation of initdram). It
+ does not actually modify the code inside the function on any of the platforms;
+ platforms which wish to support more than 2GB of DRAM will need to modify
+ their initdram() function code.
+
+ Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc
+ MPC8641HPCN.
+
+ Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit 391fd93ab23e15ab3dd58a54f5b609024009c378
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date: Mon Jun 9 20:37:18 2008 -0500
+
+ Change lmb to use phys_size_t/phys_addr_t
+
+ This updates the lmb code to use phys_size_t
+ and phys_addr_t instead of unsigned long. Other code
+ which interacts with this code, like getenv_bootm_size()
+ is also updated.
+
+ Booted on MPC8641HPCN, build-tested ppc, arm, mips.
+
+ Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit 61b09fc2952dc636017df4e7970e3de132276ba1
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date: Mon Jun 9 20:37:17 2008 -0500
+
+ Change print_size to take phys_size_t
+
+ Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit b57ca3e128cc10a133ba79bc7ec3e7b50e7c8fbe
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date: Mon Jun 9 20:37:16 2008 -0500
+
+ Change bd/gd memsize/ram_size to be phys_size_t.
+
+ Currently, both are defined as an unsigned long, but
+ should be phys_size_t. This should result in no real change,
+ since phys_size_t is currently an unsigned long for all the
+ default configs. Also add print_lnum to cmd_bdinfo to deal
+ with the potentially wider memsize.
+
+ Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit ba04f7010958e88a8910f2a123fee53fdc72e013
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Jun 10 16:16:02 2008 -0500
+
+ FSL LAW: Add new interface to use the last free LAW
+
+ LAWs have the concept of priority so its useful to be able to allocate
+ the lowest (highest number) priority. We will end up using this with the
+ new DDR code.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 859a86a25c569d3665ff413d1d923394b8a961f3
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Wed Jun 11 00:51:45 2008 -0500
+
+ 85xx/86xx: Move to dynamic mgmt of LAWs
+
+ With the new LAW interface (set_next_law) we can move to letting the
+ system allocate which LAWs are used for what purpose. This makes life
+ a bit easier going forward with the new DDR code.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+ Acked-by: Jon Loeliger <jdl@freescale.com>
+ Acked-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit f060054dadbbe7027ca088eed806a3ef1f82fdb7
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Wed Jun 11 00:44:10 2008 -0500
+
+ FSL LAW: Keep track of LAW allocations
+
+ Make it so we keep track of which LAWs have allocated and provide
+ a function (set_next_law) which can allocate a LAW for us if one is
+ free.
+
+ In the future we will move to doing more "dynamic" LAW allocation
+ since the majority of users dont really care about what LAW number
+ they are at.
+
+ Also, add CONFIG_MPC8540 or CONFIG_MPC8560 to those boards which needed them
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit ddde74a159caa6e18b481fec01d40b885aebb566
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Mon Jun 9 22:31:57 2008 -0500
+
+ 85xx: remove dummy board_early_init_f
+
+ A number of board ports have empty version of board_early_init_f
+ for no reason since we control its via CONFIG_BOARD_EARLY_INIT_F.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 81e56e9af0d43712db8efb843606a8d62eab454f
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Mon Jun 9 18:55:38 2008 -0500
+
+ MPC8544DS: Update config.h
+
+ * Enable flash progress
+ * remove CLEAR_LAW0 since we dont really use it
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 978e81604c1b28526ed580df0fbe64eb8384e94f
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Mon Jun 9 13:37:24 2008 -0500
+
+ 85xx: Remove unused and unconfigured memory test code.
+
+ Remove unused and unconfigured DDR test code from FSL 85xx boards.
+ Besides, other common code exists.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit a23cddde1a95f987e3fe2a720a7ec9375b7264d7
+Author: Sergei Poselenov <sposelenov@emcraft.com>
+Date: Fri Jun 6 15:42:45 2008 +0200
+
+ Socrates: Added FPGA base address update in FDT.
+
+ Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
+
+commit fd51b0e0e620b8bc9fd4f6daa3a4fa6f5e1316f4
+Author: Sergei Poselenov <sposelenov@emcraft.com>
+Date: Fri Jun 6 15:42:44 2008 +0200
+
+ Socrates: NAND support added. Changed the U-Boot base address and
+
+ Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
+
+commit 248ae5cfc8bf69074d1da099dc495d8e06070547
+Author: Sergei Poselenov <sposelenov@emcraft.com>
+Date: Fri Jun 6 15:42:43 2008 +0200
+
+ NAND: Added support for 128-bit OOB, adapted
+
+ Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
+
+commit 31ca0208612f2eb57690110d7c2815953650e47b
+Author: Sergei Poselenov <sposelenov@emcraft.com>
+Date: Fri Jun 6 15:42:42 2008 +0200
+
+ Socrates: added missed file with UPMA configuration data.
+
+ Signed-of-by: Sergei Poselenov <sposelenov@emcraft.com>
+
+commit 59abd15b43cab7a4d19de4ba0943837d9555f7ba
+Author: Sergei Poselenov <sposelenov@emcraft.com>
+Date: Fri Jun 6 15:42:41 2008 +0200
+
+ Socrates: Added FPGA mapping. LAWs and TLBs cleanup.
+
+ Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
+
+commit 740280e68ccc0b971e613face7eaaa8bd1382b8c
+Author: Sergei Poselenov <sposelenov@emcraft.com>
+Date: Fri Jun 6 15:42:40 2008 +0200
+
+ Added the upmconfig() function for 85xx.
+
+ Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit d39e68514ff943930ee692cff3fde03532eb7fec
+Author: Sergei Poselenov <sposelenov@emcraft.com>
+Date: Fri Jun 6 15:42:39 2008 +0200
+
+ Socrates: config file cleanup.
+
+ Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
+
+commit e8cc3f04b124f757af4528206e60d8eb715ae083
+Author: Wolfgang Grandegger <wg@grandegger.com>
+Date: Thu Jun 5 13:12:10 2008 +0200
+
+ TQM85xx: Change memory map to support Flash memory > 128 MiB
+
+ Some TQM85xx boards could be equipped with up to 1 GiB (NOR) Flash
+ memory. The current memory map only supports up to 128 MiB Flash.
+ This patch adds the configuration option CONFIG_TQM_BIGFLASH. If
+ set, up to 1 GiB flash is supported. To achieve this, the memory
+ map has to be adjusted in great parts (for example the CCSRBAR is
+ moved from 0xE0000000 to 0xA0000000).
+
+ If you want to boot Linux with CONFIG_TQM_BIGFLASH set, the new
+ memory map also has to be considered in the kernel (changed
+ CCSRBAR address, changed PCI IO base address, ...). Please use
+ an appropriate Flat Device Tree blob (tqm8548.dtb).
+
+ Signed-off-by: Martin Krause <martin.krause@tqs.de>
+ Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
+
+commit 1c2deff22cd6e2bf0e618fd6e09ca3eec5a8d051
+Author: Wolfgang Grandegger <wg@grandegger.com>
+Date: Thu Jun 5 13:12:09 2008 +0200
+
+ TQM85xx: NAND support via local bus UPMB
+
+ This patch adds support for NAND FLASH on the TQM8548. It is disabled by
+ default and can be enabled for the TQM8548 modules. It is now based on
+ the re-written FSL NAND UPM driver. A patch has been posted earlier today
+ with the subject:
+
+ "NAND FSL UPM: driver re-write using the hwcontrol callback"
+
+ Note that the R/B pin is not supported by that module requiring to use
+ the specified maximum delay time.
+
+ Note: With NAND support enabled the size of the U-Boot image exceeds
+ 256 KB and TEXT_BASE must therefore be set to 0xfff80000 in config.mk,
+ doubling the image size :-(.
+
+ Signed-off-by: Thomas Waehner <thomas.waehner@tqs.de>
+ Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
+
+commit b9e8078bb3f3c48111a7081e27279938c3a445e1
+Author: Wolfgang Grandegger <wg@grandegger.com>
+Date: Thu Jun 5 13:12:08 2008 +0200
+
+ TQM8548: PCI express support
+
+ This patch adds support for PCI express cards. The board support
+ now uses common FSL PCI init code, for both, PCI and PCIe on all
+ TQM85xx modules.
+
+ Signed-off-by: Thomas Waehner <thomas.waehner@tqs.de>
+ Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
+
+commit 1287e0c55a2ee2c575ac9ce8e4302cd4085be876
+Author: Wolfgang Grandegger <wg@grandegger.com>
+Date: Thu Jun 5 13:12:07 2008 +0200
+
+ TQM8548: Basic support for the TQM8548 modules
+
+ This patch adds basic support for the TQM8548 module from TQ-Components
+ (http://www.tqc.de/) including DDR2 SDRAM initialisation and support for
+ eTSEC 3 and 4
+
+ Furthermore Flash buffer write has been enabled to speed up output to
+ the Flash by approx. a factor of 10.
+
+ Signed-off-by: Thomas Waehner <thomas.waehner@tqs.de>
+ Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
+
+commit 25991353204c78b094c3c1fec90182dcd607ab8f
+Author: Wolfgang Grandegger <wg@grandegger.com>
+Date: Thu Jun 5 13:12:06 2008 +0200
+
+ TQM85xx: Support for Flat Device Tree
+
+ This patch adds support for Linux kernels using the Flat Device Tree.
+ It also re-defines the default environment settings for booting Linux
+ with the FDT blob.
+
+ Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
+
+commit d9ee843d54c54776e1fdb86336ce554906a87331
+Author: Wolfgang Grandegger <wg@grandegger.com>
+Date: Thu Jun 5 13:12:05 2008 +0200
+
+ TQM85xx: Support for Intel 82527 compatible CAN controller
+
+ This patch adds initialization of the UPMC RAM to support up to two
+ Intel 82527 compatible CAN controller on the TQM85xx modules.
+
+ Signed-off-by: Thomas Waehner <thomas.waehner@tqs.de>
+ Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
+
+commit 518d5cfe72916323c746af1647764459914f555f
+Author: Wolfgang Grandegger <wg@grandegger.com>
+Date: Thu Jun 5 13:12:04 2008 +0200
+
+ TQM85xx: Bugfix in the SDRAM initialisation
+
+ The CS0_BNDS register is now set according to the detected
+ memory size.
+
+ Signed-off-by Martin Krause <martin.krause@tqs.de>
+
+commit 45dee2e620ccec6ac7b3548fe8979a34fd030e5d
+Author: Wolfgang Grandegger <wg@grandegger.com>
+Date: Thu Jun 5 13:12:03 2008 +0200
+
+ TQM85xx: Fix chip select configuration for second FLASH bank
+
+ This patch fixes the re-calculation of the automatic chip select
+ configuration for boards with two populated FLASH banks.
+
+ Signed-off-by: Martin Krause <martin.krause@tqs.de>
+
+commit 46346f27cda6fd025a496bde8f2d4aeee04aca5f
+Author: Wolfgang Grandegger <wg@grandegger.com>
+Date: Thu Jun 5 13:12:02 2008 +0200
+
+ TQM85xx: Support for Spansion 'N' type flashes added
+
+ The 'N' type Spansion flashes (S29GLxxxN series) have bigger sectors,
+ than the formerly used 'M' types (S29GLxxxM series), so the flash layout
+ needs to be changed -> new start address of the environment. The macro
+ definition CONFIG_TQM_FLASH_N_TYPE is undefined by default and must be
+ defined for boards with 'N' type flashes.
+
+ Signed-off-by: Martin Krause <martin.krause@tqs.de>
+ Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
+
+commit 5d5bd838f76eade22c0ea40a500389f924d0da36
+Author: Wolfgang Grandegger <wg@grandegger.com>
+Date: Thu Jun 5 13:12:01 2008 +0200
+
+ TQM85xx: Fix CPM port pin configuration
+
+ Do not configure port pins PD30/PD31 as SCC1 TxD/RxD except for the TQM8560
+ board. On the other TQM85xx boards (TQM8541 and TQM8555) SCC1 is not used
+ as serial interface anyway. Worse, on some board variants configuring the
+ pins for SCC1 leads to short circuits (for example on the TQM8541-BG).
+
+ Signed-off-by: Martin Krause <martin.krause@tqs.de>
+
+commit b99ba1679e8cd51b023e67098c89e606e47137d2
+Author: Wolfgang Grandegger <wg@grandegger.com>
+Date: Thu Jun 5 13:12:00 2008 +0200
+
+ TQM85xx: Various coding style fixes
+
+ Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
+
+commit ae9e97fa96f643c8ba2b666b06a026cc8717eb00
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date: Tue Jun 10 22:15:58 2008 -0400
+
+ libfdt: Move the working_fdt pointer to cmd_fdt.c
+
+ The working_fdt pointer was declared in common/fdt_support.c but was
+ not used there. Move it to common/cmd_fdt.c where it is used (it is
+ also used in lib_ppc/bootm.c).
+
+ Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
+
+commit e489b9c078e22b0d9e75f002cd2a1bd967e88f5e
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Tue Jun 10 11:06:17 2008 -0500
+
+ fdt: unshadow global working fdt variable
+
+ differentiate with local variables of the same name by renaming the
+ global 'fdt' variable 'working_fdt'.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit e1eb0e25d9d8fd8efdfb93f670a417663f386022
+Author: Andy Fleming <afleming@freescale.com>
+Date: Tue Jun 10 18:49:34 2008 -0500
+
+ socrates: Fix PCI clk fix patch
+
+ The submitted patch seems to have been more up-to-date, but an older patch was
+ already in the repository. This patch encompasses the differences
+
+ Taken entirely from Sergei Poselenov <sposelenov@emcraft.com>
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit a75a57ef6e4b613c81434971e96ed70cf9ec9ba0
+Author: Wolfgang Grandegger <wg@grandegger.com>
+Date: Thu Jun 5 13:02:29 2008 +0200
+
+ NAND FSL UPM: driver re-write using the hwcontrol callback
+
+ This is a re-write of the NAND FSL UPM driver using the more universal
+ hwcontrol callback (instead of the cmdfunc callback). Here is a brief
+ list of furher modifications:
+
+ - For the time being, the UPM setup writing the UPM array has been
+ removed from the driver and must now be done by the board specific
+ code.
+
+ - The bus width definition in "struct fsl_upm_nand" is now in bits to
+ comply with the corresponding Linux driver and 8, 16 and 32 bit
+ accesses are supported.
+
+ - chip->dev_read is only set if fun->dev_ready != NULL, which is
+ required for boards not connecting the R/B pin.
+
+ - A few issue have been fixed with MxMR bit manipulation like in the
+ corresponding Linux driver.
+
+ Note: I think the "io_addr" field of "struct fsl_upm" could be removed
+ as well, because the address is already determined by
+ "nand->IO_ADDR_[RW]", but I'm not 100% sure.
+
+ This patch has been tested on a TQM8548 modules with the NAND chip
+ Micron MT29F8G08FABWP.
+
+ This patch is based on the following patches posted to this list a few
+ minutes ago:
+
+ PPC: add accessor macros to clear and set bits in one shot
+ 83xx/85xx/86xx: add more MxMR local bus definitions
+
+ Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
+ Acked-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+
+commit 6beecfbb542992eede5831240cd58678274683a9
+Author: Wolfgang Grandegger <wg@grandegger.com>
+Date: Thu Jun 5 13:11:59 2008 +0200
+
+ MPC85xx: Beautify boot output of L2 cache configuration
+
+ The boot output is now aligned poperly with other boot output
+ lines, e.g.:
+
+ FLASH: 128 MB
+ L2: 512 KB enabled
+
+ Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
+
+commit 398415114f0a705163a14543e9fef03f734b1ffa
+Author: Wolfgang Grandegger <wg@grandegger.com>
+Date: Wed Jun 4 12:45:22 2008 +0200
+
+ PPC: add accessor macros to clear and set bits in one shot
+
+ PPC: add accessor macros to clear and set bits in one shot
+
+ This patch adds macros from linux/include/asm-powerpc/io.h to clear and
+ set bits in one shot using the in_be32, out_be32, etc. accessor functions.
+ They are very handy to manipulate bits it I/O registers.
+
+ This patch is required for my forthcoming FSL NAND UPM driver re-write and
+ the support for the TQM8548 module.
+
+ Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
+
+commit 4677988c7edc070c3786d3db7994abeca3ab82a0
+Author: Wolfgang Grandegger <wg@grandegger.com>
+Date: Wed Jun 4 13:52:17 2008 +0200
+
+ TQM: move TQM boards to board/tqc
+
+ Move all TQM board directories to the vendor specific directory "tqc"
+ for modules from TQ-Components GmbH (http://www.tqc.de).
+
+ Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
+
+commit 6fab2fe72ca5bf95280cd52cdf378af3e506eb50
+Author: Wolfgang Grandegger <wg@grandegger.com>
+Date: Mon Jun 2 12:09:30 2008 +0200
+
+ 83xx/85xx/86xx: add more MxMR local bus definitions
+
+ 83xx/85xx/86xx: add more MxMR local bus definitions
+
+ This patch adds more macro definitions for the UPM Machine Mode Registers
+ They are copied from "include/mpc82xx.h" to simplify the merge of all 8xxx
+ common local bus definitions into include/asm-ppc/fsl_lbc.h. They are
+ required for my forthcoming FSL NAND UPM driver re-write and the support
+ for the TQM8548 module.
+
+ This patch is based on the following two patches from Anton Vorontsov:
+
+ http://www.mail-archive.com/u-boot-users@lists.sourceforge.net/msg06511.html
+ http://www.mail-archive.com/u-boot-users@lists.sourceforge.net/msg06587.html
+
+ I leave coding style violation fixes, code beautification and name
+ corrections to somebody else ;-(.
+
+ Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
+
+commit c8c5fc266e4499e283c293ccb972863156aa4134
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date: Thu May 29 18:14:56 2008 +0400
+
+ 83xx/85xx: further localbus cleanups
+
+ Merge mpc85xx.h's LBC defines to fsl_lbc.h. Also, adopt ACS names
+ from mpc85xx.h, so ACS_0b10 renamed to ACS_DIV4, ACS_0b11 to ACS_DIV2.
+
+ Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+
+commit 42dbd667c88d496882d53e22656e89b654205492
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date: Wed May 28 18:20:15 2008 +0400
+
+ 83xx/85xx/86xx: factor out Freescale Localbus defines out of mpc83xx.h
+
+ This patch moves Freescale Localbus defines out of mpc83xx.h, so we could
+ use it on MPC85xx and MPC86xx processors.
+
+ Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+
+commit 730b2fcf6fcd9eec3ea86fbb087c3f98aa23a769
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Thu May 29 11:22:06 2008 -0500
+
+ 85xx: Add setting of cache props in the device tree.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 4dbdb7681e243431530df0725627192a0c4aefda
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Jun 10 16:53:46 2008 -0500
+
+ 85xx: expose cpu identification
+
+ The current cpu identification code is used just to return the name
+ of the processor at boot. There are some other locations that the name
+ is useful (device tree setup). Expose the functionality to other bits
+ of code.
+
+ Also, drop the 'E' suffix and add it on by looking at the SVR version
+ when we print this out. This is mainly to allow the most flexible use
+ of the name. The device tree code tends to not care about the 'E' suffix.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 2329fe113d847e43cca8e4a0e4edd613b50b8492
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Tue Jun 10 13:25:24 2008 -0500
+
+ mpc83xx: MVBLM7: minor build fixups
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit a1293e549b56da135ef32ffca5b9d35a16aa6802
+Author: Andre Schwarz <andre.schwarz@matrix-vision.de>
+Date: Tue Jun 10 09:14:05 2008 +0200
+
+ add MPC8343 based board mvBlueLYNX-M7 (board+make files)
+
+ Add MPC8343 based board mvBlueLYNX-M7.
+ It's a single board stereo camera system.
+ Please read doc/README.mvblm7 for details.
+
+ Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit c005b93925ba49f07da2aa748527996d927e172f
+Author: Andre Schwarz <andre.schwarz@matrix-vision.de>
+Date: Tue Jun 10 09:13:16 2008 +0200
+
+ add MPC8343 based board mvBlueLYNX-M7 (doc+config)
+
+ Add MPC8343 based board mvBlueLYNX-M7.
+ It's a single board stereo camera system.
+ Please read doc/README.mvblm7 for details.
+
+ Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit f9023afbdfd9f27e7c38f3cce965746e56d62dd3
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date: Thu May 29 18:14:56 2008 +0400
+
+ 83xx/85xx: further localbus cleanups
+
+ move the BRx_* and ORx_* left behind in mpc85xx.h
+
+ The same is needed for mpc8xx.h and mpc8260.h (defines are almost
+ the same, just few differences which needs some attention though).
+
+ But the bad news for mpc8xx and mpc8260 is that there are a lot of users
+ of these defines. So this cleanup I'll leave for the "better times".
+
+ Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit bf30bb1f7c954d7855d9b23624b33b00c50b4697
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date: Wed May 28 18:20:15 2008 +0400
+
+ 83xx/85xx/86xx: factor out Freescale Localbus defines out of mpc83xx.h
+
+ This patch moves Freescale Localbus defines out of mpc83xx.h, so we could
+ use it on MPC85xx and MPC86xx processors.
+
+ Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit d82b4fc0ce8cca95e857fc51022e841cb2dbee6a
+Author: Tor Krill <tor@excito.com>
+Date: Mon Jun 2 15:09:30 2008 +0200
+
+ Add missing CSCONFIG_BANK_BIT_3 define to mpc83xx.h
+
+ Signed-off-by: Tor Krill <tor@excito.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 3b904ccb93c3196727e2e9870cb1df903cab19ad
+Author: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+Date: Mon Jun 9 23:37:44 2008 +0900
+
+ net: Conditional COBJS inclusion of network drivers
+
+ Replace COBJS-y with appropriate driver config names.
+
+ Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 2fb698bf50f4aff2485581a12fa634a07c040e4a
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date: Mon Jun 9 21:02:17 2008 -0400
+
+ Use strncmp() for the fdt command
+
+ Cleaner than doing multiple conditionals on characters.
+
+ Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
+
+commit 47abe8ab290d2721a8eeadff65b939e6af8c01b0
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date: Sat Jun 7 12:25:05 2008 -0400
+
+ The fdt boardsetup command criteria was not unique
+
+ It was checking just for "b", which is not unique with respect to the
+ "boot" command. Change to check for "boa"[rdsetup].
+
+ Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
+
+commit 2f08bfa9526bae4f461e043530cfb903fec0d273
+Author: David Gibson <david@gibson.dropbear.id.au>
+Date: Tue May 20 17:19:11 2008 +1000
+
+ libfdt: Several cleanups to parameter checking
+
+ This patch makes a couple of small cleanups to parameter checking of
+ libfdt functions.
+
+ - In several functions which take a node offset, we use an
+ idiom involving fdt_next_tag() first to check that we have indeed been
+ given a node offset. This patch adds a helper function
+ _fdt_check_node_offset() to encapsulate this usage of fdt_next_tag().
+
+ - In fdt_rw.c in several places we have the expanded version
+ of the RW_CHECK_HEADER() macro for no particular reason. This patch
+ replaces those instances with an invocation of the macro; that's what
+ it's for.
+
+ - In fdt_sw.c we rename the check_header_sw() function to
+ sw_check_header() to match the analgous function in fdt_rw.c, and we
+ provide an SW_CHECK_HEADER() wrapper macro as RW_CHECK_HEADER()
+ functions in fdt_rw.c
+
+ Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
+
+commit fec6d9ee7c10443f65ce1788ef818919167bbf2e
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date: Tue Jun 3 20:34:45 2008 -0400
+
+ Remove the deprecated CONFIG_OF_FLAT_TREE
+
+ Use CONFIG_OF_LIBFDT instead to support flattened device trees. It is
+ cleaner, has better functionality, and is better supported.
+
+ Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
+
+commit 62bcdda293efa752f8281fbd9da03822b27ce82f
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date: Tue Jun 3 20:26:29 2008 -0400
+
+ Change the stxxst to CONFIG_OF_LIBFDT
+
+ This was configured to use the deprecated CONFIG_OF_FLAT_TREE, change
+ to CONFIG_OF_LIBFDT.
+
+ WARNING: It appears that this board lost its ability to boot via a
+ flattened device tree prior to this changeset.
+
+ WARNING: This conversion was untested because I do not have a board to
+ test it on.
+
+ Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
+
+commit 589c04271d129729a8b01391453851ab9cc4069c
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date: Tue Jun 3 20:24:58 2008 -0400
+
+ Convert mpc7448hpc2 to CONFIG_OF_LIBFDT
+
+ This was configured to use the deprecated CONFIG_OF_FLAT_TREE, change
+ to CONFIG_OF_LIBFDT.
+
+ WARNING: This conversion is untested because I do not have a board to
+ test it on.
+
+ NOTE: The FDT blob (DTS) must have an /aliases/ethernet0 and (optionally)
+ /aliases/ethernet1 property for the ethernet to work.
+
+ Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
+
+commit ee1e35bede91debc8bff9b02f75574486033b652
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Thu May 29 01:21:24 2008 -0500
+
+ 85xx: Only use PORPLLSR[DDR_Ratio] on platforms that define it
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 3b9519fc50802436e417c839e69df7b2016cade5
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date: Wed May 14 13:10:04 2008 -0500
+
+ MPC85xx: Change traps.c to not reference non-addressable memory
+
+ Currently, END_OF_RAM is used by the trap code to determine if
+ we should attempt to access the stack pointer or not. However,
+ on systems with a lot of RAM, only a subset of the RAM is
+ guaranteed to be mapped in and accessible. Change END_OF_RAM
+ to use get_effective_memsize() instead of using the raw ram
+ size out of the bd.
+
+ Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit 7faddaecea52f585f538fdf9c2e61f85a789b19c
+Author: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+Date: Mon Jun 9 13:39:57 2008 +0900
+
+ sh: Renesas Solutions SH7763RDP board support
+
+ SH7763RDP has SCIF, NOR Flash, Ethernet, USB host, LCDC and MMC.
+ In this patch, support SCIF, NOR Flash, and Ethernet.
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 60179098a95eaa972007d7ec58e4c1588029720f
+Author: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+Date: Fri Jun 6 16:24:13 2008 +0900
+
+ sh: Add support Renesas SH7763
+
+ Renesas SH7763 has 3 SCIF, MMC, LCDC, Ethernet and other.
+ This patch supprts CPU register's header file.
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 08c5fabe181d663eec0feba5ecd02c0b78934a52
+Author: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+Date: Fri Jun 6 16:16:08 2008 +0900
+
+ sh: SH7763 SCIF support
+
+ SH7763 has 3 SCIF channels. SCIF0 and 1 are same register constitution,
+ but only SCIF2 is different. This patch work all SCIF channel.
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 79b51ff8205f0354d5300570614c1d2db499679c
+Author: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+Date: Sat Jun 7 20:51:59 2008 +0900
+
+ [MIPS] cpu/mips/Makefile: Split [CS]OBJS onto separate lines
+
+ Also get rid of some #ifdefs in *.c files.
+
+ Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+
+commit 8bde63eb3f79d68f693201528dafc8ae7aa087de
+Author: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+Date: Sat Jun 7 20:51:56 2008 +0900
+
+ [MIPS] Rename Alchemy processor configs into CONFIG_SOC_*
+
+ CONFIG_SOC_AU1X00
+
+ Common Alchemy Au1x00 stuff. All Alchemy processor based machines
+ need to have this config as a system type specifier.
+
+ CONFIG_SOC_AU1000, CONFIG_SOC_AU1100, CONFIG_SOC_AU1200,
+ CONFIG_SOC_AU1500, CONFIG_SOC_AU1550
+
+ Machine type specifiers. Each port should have one of aboves.
+
+ Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+
+commit cc49cadeeb8bb2f0ae3fdc13af7051ae59f083bc
+Author: Stuart Wood <stuart.wood@labxtechnologies.com>
+Date: Fri May 30 16:05:28 2008 -0400
+
+ env_nand.c: Added bad block management for environment variables
+
+ Modified to check for bad blocks and to skipping over them when
+ CFG_ENV_RANGE has been defined.
+ CFG_ENV_RANGE must be larger than CFG_ENV_SIZE and aligned to the NAND
+ flash block size.
+
+ Signed-off-by: Stuart Wood <stuart.wood@labxtechnologies.com>
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 279726bd00558e80263d44581c44167625b7fb9a
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date: Wed May 14 13:09:58 2008 -0500
+
+ MPC86xx: Change traps.c to not reference non-addressable memory
+
+ Currently, END_OF_RAM is used by the trap code to determine if
+ we should attempt to access the stack pointer or not. However,
+ on systems with a lot of RAM, only a subset of the RAM is
+ guaranteed to be mapped in and accessible. Change END_OF_RAM
+ to use get_effective_memsize() instead of using the raw ram
+ size out of the bd to prevent us from trying to access
+ non-mapped memory.
+
+ Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit 338cc038461a6c7709c5b86fd9a240209338a1ae
+Author: Wolfgang Denk <wd@denx.de>
+Date: Fri Jun 6 14:28:14 2008 +0200
+
+ tools/mkimage: fix compiler warnings on some systems.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit b2815f79288d4da7a3ba18bdbd05120ce09d5622
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jun 6 16:10:41 2008 +0200
+
+ ppc4xx: Fix misspelled CONFIG_440SPE/440EPX/GRX config options
+
+ We use upper case letters for the AMCC processor defines (like
+ CONFIG_440SPE) in U-Boot. So the 440SPe is labeled CONFIG_440SPE and
+ not CONFIG_440SPe. This patch fixes the last misspelled config options.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 72675dc6c06a48846d180106161d49dd714383cc
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jun 6 15:55:21 2008 +0200
+
+ ppc4xx: Unify AMCC's board config files (part 3/3)
+
+ This patch series unifies the AMCC eval board ports by introducing
+ a common include header for all AMCC eval boards:
+
+ include/configs/amcc-common.h
+
+ This header now includes all common configuration options/defines which
+ are removed from the board specific headers.
+
+ The reason for this is ease of maintenance and unified look and feel
+ of all AMCC boards.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 490f204096d6e2c9940f67816f154a8125bab116
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jun 6 15:55:03 2008 +0200
+
+ ppc4xx: Unify AMCC's board config files (part 2/3)
+
+ This patch series unifies the AMCC eval board ports by introducing
+ a common include header for all AMCC eval boards:
+
+ include/configs/amcc-common.h
+
+ This header now includes all common configuration options/defines which
+ are removed from the board specific headers.
+
+ The reason for this is ease of maintenance and unified look and feel
+ of all AMCC boards.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit a8a11a9ed046b480a16e47a158f8f5300028dfa6
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jun 6 15:54:31 2008 +0200
+
+ ppc4xx: Unify AMCC's board config files (part 1/3)
+
+ This patch series unifies the AMCC eval board ports by introducing
+ a common include header for all AMCC eval boards:
+
+ include/configs/amcc-common.h
+
+ This header now includes all common configuration options/defines which
+ are removed from the board specific headers.
+
+ The reason for this is ease of maintenance and unified look and feel
+ of all AMCC boards.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 0e38c938ed4bcadb4f4fc1419a541431e94fc202
+Author: Remy Bohmer <linux@bohmer.net>
+Date: Thu Jun 5 13:03:36 2008 +0200
+
+ DM9000 fix status check fail 0x6d error for trizeps board
+
+ According to the Application Notes of the DM9000, only the 2 bits 0:1 of
+ the status byte need to be checked to identify a valid packet in the fifo
+
+ But, The several different Application Notes do not all speak the same
+ language on these bits. They do not disagree, but only 1 Application Note
+ noted explicitly that only these 2 bits need to be checked.
+ Even the datasheets do not mention anything about these 2 bits.
+
+ Because the old code, and the kernel check the whole byte, I left this piece
+ untouched.
+
+ However, I tested all board/DM9000[A|E|EP] devices with this 2 bit check, so
+ it should work.
+
+ Notice, that the 2nd iteration through this receive loop (when a 2nd packet is
+ in the fifo) is much shorter now, compared to the older U-boot driver code,
+ so that we can maybe run into a hardware condition now that was never seen
+ before, or maybe was seen very unfrequently.
+
+ Additionaly added a cleanup of a stack variable.
+
+ Signed-off-by: Remy Bohmer <linux@bohmer.net>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 7daf2ebe9196dd67131a06d85049c3a8a08ca413
+Author: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+Date: Thu Jun 5 22:29:00 2008 +0900
+
+ [MIPS] Update <asm/addrspace.h> header
+
+ - Fix traditional KSEG names
+ - Replace PHYSADDR with CPHYSADDR
+
+ Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+
+commit f0d5a6f060d00358b85c62a921a423ea8df71184
+Author: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+Date: Thu Jun 5 22:29:00 2008 +0900
+
+ [MIPS] mips_config.mk: Misc fixes
+
+ - Kill redundant `-pipe' (this will be added by $(TOPDIR)/config.mk)
+ - Modify comments
+
+ Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+
+commit 5f64d21c9a2998794f255b469165b91f092dfc2d
+Author: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+Date: Thu Jun 5 22:29:00 2008 +0900
+
+ [MIPS] Kill unused <version.h> inclusions
+
+ Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+
+commit a55d48174cfd1a5bc184159513f48dcbbe409c83
+Author: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+Date: Thu Jun 5 22:29:00 2008 +0900
+
+ [MIPS] lib_mips/time.c: Fix CP0 count register usage and timer routines
+
+ MIPS port has two problems in timer routines. One is now we assume CFG_HZ
+ equals to CP0 counter frequency, but this is wrong. CFG_HZ has to be 1000
+ in the U-Boot system.
+
+ The other is we don't have a proper time management counter like timestamp
+ other ARCHs have. We need the 32-bit millisecond clock counter.
+
+ This patch introduces timestamp and CYCLES_PER_JIFFY. timestamp is a
+ 32-bit non-overflowing CFG_HZ counter, and CYCLES_PER_JIFFY is the number
+ of calculated CP0 counter cycles in a CFG_HZ.
+
+ STRATEGY:
+
+ * Fix improper CFG_HZ value to have 1000
+
+ * Use CFG_MIPS_TIMER_FREQ for timer counter frequency, instead.
+
+ * timer_init: initialize timestamp and set up the first timer expiration.
+ Note that we don't need to initialize CP0 count/compare registers here
+ as they have been already zeroed out on the system reset. Leave them as
+ they are.
+
+ * get_timer: calculate how many timestamps have been passed, then return
+ base-relative timestamp. Make sure we can easily count missed timestamps
+ regardless of CP0 count/compare value.
+
+ * get_ticks: return the current timestamp, that is get_timer(0).
+
+ Most parts are from good old Linux v2.6.16 kernel.
+
+ v2:
+ - Remove FIXME comments as they turned out to be trivial.
+ - Use CP0 compare register as a global variable for expirelo.
+ - Kill a global variable 'cycles_per_jiffy'. Use #define CYCLES_PER_JIFFY
+ instead.
+
+ Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+
+commit 199e4f657c8af42efe3fb3ba1d1104eb6bb28c25
+Author: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+Date: Thu Jun 5 22:29:00 2008 +0900
+
+ [MIPS] lib_mips/time.c: Fix udelay
+
+ What we have to do is just to wait for given micro-seconds. No need to
+ take into account current time, get_timer and CFG_HZ.
+
+ Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+
+commit c7e38e413ae69120d3e51f132c7cb1d6b3514d03
+Author: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+Date: Thu Jun 5 22:28:59 2008 +0900
+
+ [MIPS] lib_mips/time.c: Replace CP0 access functions with existing macros
+
+ We already have many pre-defined CP0 access macros in <asm/mipsregs.h>.
+ This patch replaces mips_{compare,count}_set and mips_count_get with
+ existing macros.
+
+ Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+
+commit 6b52cfe16cd539935e32bd8cf19146522e462a4d
+Author: Remy Bohmer <linux@bohmer.net>
+Date: Tue Jun 3 15:48:17 2008 +0200
+
+ Get rid of annoying/superfluous bad-checksum warning message
+
+ U-boot can complain a lot about 'checksum bad' when it is attached to the network.
+ It is annoying for ordinary users who start to doubt the network connection
+ in general when they see messages like this.
+
+ This is caused by the routine NetCksumOk() which cannot handle IP-headers longer
+ than 20 bytes. Those packages can be ignored anyway by U-boot, so we trash them
+ now before checking the checksum.
+
+ Signed-off-by: Remy Bohmer <linux@bohmer.net>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit d6ee5fa40c26970d39990c6fc4a2f20a97822650
+Author: Remy Bohmer <linux@bohmer.net>
+Date: Wed Jun 4 10:47:25 2008 +0200
+
+ Fix order for reading rx-status registers in 32bit mode of DM9000
+
+ A last minute cleanup before submitting the DM9000A patch series yesterday introduced
+ a bug in reading the rx-status registers in 32bit mode only.
+ This patch repairs this.
+
+ Signed-off-by: Remy Bohmer <linux@bohmer.net>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 98291e2e689096420465074cce926b226d2e71b4
+Author: Remy Bohmer <linux@bohmer.net>
+Date: Tue Jun 3 15:26:26 2008 +0200
+
+ DM9000: Some minor code cleanups
+
+ Some lines of the U-boot DM9000x driver are longer than 80 characters, or
+ need some other minor cleanup.
+
+ Signed-off-by: Remy Bohmer <linux@bohmer.net>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 850ba7555dbd4ca8d14fc475b864d534797adab3
+Author: Remy Bohmer <linux@bohmer.net>
+Date: Tue Jun 3 15:26:25 2008 +0200
+
+ DM9000: Make driver work properly for DM9000A
+
+ The DM9000A network controller does not work with the U-boot DM9000x driver.
+ Analysis showed that many incoming packets are lost.
+
+ The DM9000A Application Notes V1.20 (section 5.6.1) recommend that the poll to
+ check for a valid rx packet be done on the interrupt status register, not
+ directly by performing the dummy read and the rx status check as is currently
+ the case in the u-boot driver.
+
+ When the recommended poll is done as suggested the driver starts working
+ correctly on 10Mbit/HD, but on 100MBit/FD packets come in faster so that there
+ can be more than 1 package in the fifo at the same time.
+
+ The driver must perform the rx-status check in a loop and read and handle all
+ packages until there is no more left _after_ the interrupt RX flag is set.
+
+ This change has been tested with DM9000A, DM9000E, DM9000EP.
+
+ Signed-off-by: Remy Bohmer <linux@bohmer.net>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit fbcb7ece0ea1e364180f1cf963e0fa0ce7f6560d
+Author: Remy Bohmer <linux@bohmer.net>
+Date: Tue Jun 3 15:26:24 2008 +0200
+
+ DM9000: Improve eth_reset() routine
+
+ According to the application notes of the DM9000 v1.22 chapter 5.2 bullet 2, the
+ reset procedure must be done twice to properly reset the DM9000 by means of software.
+ This errata is not needed anymore for the DM9000A, but it does not bother it.
+
+ This change has been tested with DM9000A, DM9000E, DM9000EP.
+
+ Signed-off-by: Remy Bohmer <linux@bohmer.net>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit acba31847fad9ae40708cc2c9f3a634ec35f3416
+Author: Remy Bohmer <linux@bohmer.net>
+Date: Tue Jun 3 15:26:23 2008 +0200
+
+ DM9000: improve eth_send() routine
+
+ The eth_send routine of the U-boot DM9000x driver does not match the
+ DM9000 or DM9000A application notes/programming guides.
+
+ This change improves the stability of the DM9000A network controller.
+
+ This change has been tested with DM9000A, DM9000E, DM9000EP.
+
+ Signed-off-by: Remy Bohmer <linux@bohmer.net>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 134e266253c02a7832560da59d394989c4f64453
+Author: Remy Bohmer <linux@bohmer.net>
+Date: Tue Jun 3 15:26:22 2008 +0200
+
+ DM9000: repair debug logging
+
+ It seems that the debugging code of the DM9000x driver in U-boot has not been
+ compiled for a long time, because it cannot compile...
+
+ Also rearranged some loglines to get more useful info while debugging.
+
+ Signed-off-by: Remy Bohmer <linux@bohmer.net>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit a101361bfe23c120321e45d114c0603b8e0763e9
+Author: Remy Bohmer <linux@bohmer.net>
+Date: Tue Jun 3 15:26:21 2008 +0200
+
+ DM9000: Add data bus-width auto detection.
+
+ The U-boot DM9000x driver contains a compile time bus-width definition for
+ the databus connected to the network controller.
+
+ This compile check makes the code unclear, inflexible and is unneccessary.
+ It can be asked to the network controller what its bus-width is by reading bits
+ 6 and 7 of the interrupt status register.
+
+ The linux kernel already uses a runtime mechanism to determine this bus-width,
+ so the implementation below looks somewhat like that implementation.
+
+ This change has been tested with DM9000A, DM9000E, DM9000EP.
+
+ Signed-off-by: Remy Bohmer <linux@bohmer.net>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 63a0afa0c32e5f4ea98a9439542870072437404d
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Jun 4 19:19:20 2008 +0200
+
+ ppc4xx: Fix problem with SDRAM init in bamboo NAND booting port
+
+ This patch fixes a problem spotted by Eugene O'Brian (thanks Eugene)
+ introduced by the commit:
+
+ ppc4xx/NAND_SPL: Consolidate 405 and 440 NAND booting code in start.S
+
+ With this patch SDRAM will get initialized again and booting from NAND
+ is working again.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+ Acked-by: Eugene O'Brien <eugene.obrien@advantechamt.com>
+
+commit 9ef1cbef1a649e3779298b0e663be4865cbbbfbc
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue May 27 14:19:30 2008 +0200
+
+ Socrates: Fix PCI bus frequency report
+
+ Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
+
+commit 8ec6e332eace0ee78c71ee5f645d12b06813b86f
+Author: Tor Krill <tor@excito.com>
+Date: Thu May 29 11:10:30 2008 +0200
+
+ Fix incorrect switch for IF_TYPE in part.c
+
+ Use correct field in block_dev_desc_t when writing interface type in
+ dev_print. Error introduced in 574b3195.
+
+ Also added fix from Martin Krause
+
+ Signed-off-by: Tor Krill <tor@excito.com>
+
+commit b64b8a0bd310935b70af69ac970952f2b364ae56
+Author: Andre Schwarz <andre.schwarz@matrix-vision.de>
+Date: Tue May 27 10:25:39 2008 +0200
+
+ Add size #defines for Altera Cyclone-II EP2C8 and EP2C20.
+
+ Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
+
+commit 35ef877f0a8f6232cdef748f442fed5accb2b641
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Thu May 22 18:56:52 2008 -0500
+
+ Additional fix to readline_into_buffer() with CONFIG_CMDLINE_EDITING before relocating
+
+ Removed unneeded command line history initialization. Also, the original
+ code would access the 'initted' variable before relocation to SDRAM
+ which resulted in erratic behavior since the bss is not initialized when
+ executing from flash.
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit 22f371b63038a4ecab04068877c1089e51a01ba1
+Author: Grant Erickson <gerickson@nuovations.com>
+Date: Wed May 21 13:28:30 2008 -0700
+
+ PPC4xx: Simplified post_word_{load, store}
+
+ This patch simplifies post_word_{load,store} by using the preprocessor
+ to eliminate redundant, copy-and-pasted code.
+
+ Signed-off-by: Grant Erickson <gerickson@nuovations.com>
+
+commit 9c048b523413ae5f3ff34e00cf57569c3368ab51
+Author: Vasiliy Leoenenko <vasiliy.leonenko@mail.ru>
+Date: Wed May 7 21:25:33 2008 +0400
+
+ cfi_flash: enable M18 flash chips family support.
+
+ Added new command set ID. Buffered write command processing is changed
+ in order to support M18 flash chips family.
+
+ Signed-off-by: Alexey Korolev <akorolev@infradead.org>
+ Signed-off-by: Vasiliy Leonenko <vasiliy.leonenko@mail.ru>
+
+commit 93c56f212ccdadc182018f0769cb284426b88f1d
+Author: Vasiliy Leoenenko <vasiliy.leonenko@mail.ru>
+Date: Wed May 7 21:24:44 2008 +0400
+
+ cfi_flash: support of long cmd in U-boot.
+
+ Some NOR flash chips needs support of commands with length grether than max
+ value size of uchar. For example all M18 family chips use 0x1ff command in
+ buffered write mode as value of program loops count.
+
+ Signed-off-by: Alexey Korolev <akorolev@infradead.org>
+ Signed-off-by: Vasiliy Leonenko <vasiliy.leonenko@mail.ru>
+
+commit 4d91d1df2f16b511ab80dec50c80e050ba0d841e
+Author: Stefan Roese <sr@denx.de>
+Date: Fri May 16 11:06:06 2008 +0200
+
+ DTT: Issue one-shot command on AD7414 (LM75 code) to read temp
+
+ On AD7414 the first value upon bootup is not read correctly.
+ This is most likely because of the 800ms update time of the
+ temp register in normal update mode. To get current values
+ each time we issue the "dtt" command including upon powerup
+ we switch into one-short mode.
+
+ This patch fixes the problem on AD7414 equipped boards (Sequoia,
+ Canyonlands etc), that temp value printed in the bootup log was
+ incorrect.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit de5bfcf7b0425e032be12698252dbaa6b65a28c0
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Fri May 30 16:55:06 2008 +0200
+
+ ppc4xx: Cleanup CPCI405 variant's config file
+
+ This patch removes some dead code from CPCI405 board's
+ config files. JFFS2 support is also removed. It's not used and
+ CPCI4052 does not build anymore without some size reduction.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+
+commit 2918eb9d42bc705fcbd18c9fcc39d15ff2843c65
+Author: Kenneth Johansson <kenneth@southpole.se>
+Date: Thu May 29 16:32:33 2008 +0200
+
+ Remove shell variable UNDEF_SYM.
+
+ UNDEF_SYM is a shell variable in the main Makefile used to force the
+ linker to add all u-boot commands to the final image. It has no use here.
+
+ Signed-off-by: Kenneth Johansson <kenneth@southpole.se>
+
+commit 8c66497e06bf803489c589df58ee591d71033274
+Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+Date: Fri May 16 11:10:35 2008 +0200
+
+ Add support for environment in SPI flash
+
+ This is pretty incomplete...it doesn't handle reading the environment
+ before relocation, it doesn't support redundant environment, and it
+ doesn't support embedded environment. But apart from that, it does
+ seem to work.
+
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
+commit b6368467e6a97f225e0a5fd7bfc5c7598ef5ddc4
+Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+Date: Fri May 16 11:10:34 2008 +0200
+
+ SPI Flash: Add "sf" command
+
+ This adds a new command, "sf" which can be used to manipulate SPI
+ flash. Currently, initialization, reading, writing and erasing is
+ supported.
+
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
+commit d25ce7d24cc0f93881559f4009175ea305af65e8
+Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+Date: Fri May 16 11:10:33 2008 +0200
+
+ SPI Flash subsystem
+
+ This adds a new SPI flash subsystem.
+
+ Currently, only AT45 DataFlash in non-power-of-two mode is supported,
+ but some preliminary support for other flash types is in place as
+ well.
+
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
+commit 60445cb5c3eb77ed1a07f2d908eef09174483698
+Author: Hans-Christian Egtvedt <hcegtvedt@atmel.com>
+Date: Fri May 16 11:10:32 2008 +0200
+
+ atmel_spi: Driver for the Atmel SPI controller
+
+ This adds a driver for the SPI controller found on most AT91 and AVR32
+ chips, implementing the new SPI API.
+
+ Changed in v4:
+ - Update to new API
+ - Handle zero-length transfers appropriately. The user may send a
+ zero-length SPI transfer with SPI_XFER_END set in order to
+ deactivate the chip select after a series of transfers with chip
+ select active. This is useful e.g. when polling the status
+ register of DataFlash.
+
+ Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit d255bb0e78d1cac5b7c8c98cb77a095f5f16de0d
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date: Fri May 16 11:10:31 2008 +0200
+
+ SPI API improvements
+
+ This patch gets rid of the spi_chipsel table and adds a handful of new
+ functions that makes the SPI layer cleaner and more flexible.
+
+ Instead of the spi_chipsel table, each board that wants to use SPI
+ gets to implement three hooks:
+ * spi_cs_activate(): Activates the chipselect for a given slave
+ * spi_cs_deactivate(): Deactivates the chipselect for a given slave
+ * spi_cs_is_valid(): Determines if the given bus/chipselect
+ combination can be activated.
+
+ Not all drivers may need those extra functions however. If that's the
+ case, the board code may just leave them out (assuming they know what
+ the driver needs) or rely on the linker to strip them out (assuming
+ --gc-sections is being used.)
+
+ To set up communication parameters for a given slave, the driver needs
+ to call spi_setup_slave(). This returns a pointer to an opaque
+ spi_slave struct which must be passed as a parameter to subsequent SPI
+ calls. This struct can be freed by calling spi_free_slave(), but most
+ driver probably don't want to do this.
+
+ Before starting one or more SPI transfers, the driver must call
+ spi_claim_bus() to gain exclusive access to the SPI bus and initialize
+ the hardware. When all transfers are done, the driver must call
+ spi_release_bus() to make the bus available to others, and possibly
+ shut down the SPI controller hardware.
+
+ spi_xfer() behaves mostly the same as before, but it now takes a
+ spi_slave parameter instead of a spi_chipsel function pointer. It also
+ got a new parameter, flags, which is used to specify chip select
+ behaviour. This may be extended with other flags in the future.
+
+ This patch has been build-tested on all powerpc and arm boards
+ involved. I have not tested NIOS since I don't have a toolchain for it
+ installed, so I expect some breakage there even though I've tried
+ fixing up everything I could find by visual inspection.
+
+ I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and
+ DataFlash drivers posted as a follow-up. I'd like some help testing
+ other boards that use the existing SPI API.
+
+ But most of all, I'd like some comments on the new API. Is this stuff
+ usable for everyone? If not, why?
+
+ Changed in v4:
+ - Build fixes for various boards, drivers and commands
+ - Provide common struct spi_slave definition that can be extended by
+ drivers
+ - Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate
+ - Make default bus and mode build-time configurable
+ - Override default SPI bus ID and mode on mx32ads and imx31_litekit.
+
+ Changed in v3:
+ - Add opaque struct spi_slave for controller-specific data associated
+ with a slave.
+ - Add spi_claim_bus() and spi_release_bus()
+ - Add spi_free_slave()
+ - spi_setup() is now called spi_setup_slave() and returns a
+ struct spi_slave
+ - soft_spi now supports four SPI modes (CPOL|CPHA)
+ - Add bus parameter to spi_setup_slave()
+ - Convert the new i.MX32 SPI driver
+ - Convert the new MC13783 RTC driver
+
+ Changed in v2:
+ - Convert the mpc8xxx_spi driver and the mpc8349emds board to the
+ new API.
+
+ Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+ Tested-by: Guennadi Liakhovetski <lg@denx.de>
+
+commit 289011207d999b2e4085150d2aa30d547ad9b800
+Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+Date: Fri May 16 11:10:30 2008 +0200
+
+ Move definition of container_of() to common.h
+
+ AVR32 and AT91SAM9 both have their own identical definitions of
+ container_of() taken from the Linux kernel. Move it to common.h so
+ that all architectures can use it.
+
+ container_of() is already used by some drivers, and will be used
+ extensively by the new and improved SPI API.
+
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
+commit 110e006fe67fb4a6e1719ae6956c79b7ffc0148b
+Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+Date: Fri May 16 11:08:11 2008 +0200
+
+ soft_i2c: Pull SDA high before reading
+
+ Spotted by Dean Capindale.
+
+ Systems that support open-drain GPIO properly are allowed provide an
+ empty I2C_TRISTATE define. However, this means that we need to be
+ careful not to drive SDA low when the slave is expected to respond.
+
+ This patch adds a missing I2C_SDA(1) to read_byte() required to
+ tristate the SDA line on systems that support open-drain GPIO.
+
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
+commit 3c1de1a6d36be9eee284a6c596a86e94f19cc5b2
+Author: Stefan Roese <sr@denx.de>
+Date: Mon May 19 11:34:53 2008 +0200
+
+ ppc4xx: Remove implementations of testdram()
+
+ This patch removes the used testdram() implementations of the board
+ that are maintained by myself.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit bbeff30cbd1c5d551eb0ad1c2239ec01844c0b0a
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Jun 2 17:37:28 2008 +0200
+
+ ppc4xx: Remove superfluous dram_init() call or replace it by initdram()
+
+ Historically the 405 U-Boot port had a dram_init() call in early init
+ stage. This function was still called from start.S and most of the time
+ coded in assembler. This is not needed anymore (since a long time) and
+ boards should implement the common initdram() function in C instead.
+
+ This patch now removed the dram_init() call from start.S and removes the
+ empty implementations that are scattered through most of the 405 board
+ ports. Some older board ports really implement this dram_init() though.
+ These are:
+
+ csb272
+ csb472
+ ERIC
+ EXBITGEN
+ W7OLMC
+ W7OLMG
+
+ I changed those boards to call this assembler dram_init() function now
+ from their board specific initdram() instead. This *should* work, but please
+ test again on those platforms. And it is perhaps a good idea that those
+ boards use some common 405 SDRAM initialization code from cpu/ppc4xx at
+ some time. So further patches welcome here.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 192f90e272b3989ee7b4a666d1fdab831f20f8d2
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Jun 2 17:22:11 2008 +0200
+
+ ppc4xx: Use new 4xx SDRAM controller enable defines in common ECC code
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 39b32be18cd33b53a84065edcd4e465165cc5564
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Jun 2 17:20:03 2008 +0200
+
+ ppc4xx: Fix common ECC generation code for 440GP style platforms
+
+ This patch makes the common 4xx ECC code really usable on 440GP style
+ platforms.
+
+ Since the IBM DDR controller used on 440GP/GX/EP/GR is not register
+ compatible to the IBM DDR/2 controller used on 405EX/440SP/SPe/460EX/GT
+ we need to make some processor dependant defines used later on by the
+ driver.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit ec724f883ee3f3925e6c55027e8ffa70ada83303
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Jun 2 17:13:55 2008 +0200
+
+ ppc4xx: Change Kilauea to use the common DDR2 init function
+
+ This patch changes the kilauea and kilauea_nand (for NAND booting)
+ board port to not use a board specific DDR2 init routine anymore. Now
+ the common code from cpu/ppc4xx is used.
+
+ Thanks to Grant Erickson for all his basic work on this 405EX early
+ bootup.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 17ceb069b85fbb9269c4dc09b2c237f88334c5ba
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Jun 2 14:59:21 2008 +0200
+
+ ppc4xx: Consolidate PPC4xx SDRAM/DDR/DDR2 defines, part2
+
+ This patch now adds a new header file (asm-ppc/ppc4xx-sdram.h) for all
+ ppc4xx related SDRAM/DDR/DDR2 controller defines.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 36ea16f6a066ccb046e91ebce4f326b69f4c0569
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Jun 2 14:57:41 2008 +0200
+
+ ppc4xx: Consolidate PPC4xx SDRAM/DDR/DDR2 defines, part1
+
+ This patch removes all SDRAM related defines from the PPC4xx headers
+ ppc405.h and ppc440.h. This is needed since now some 405 PPC's use
+ the same SDRAM controller as 440 systems do (like 405EX and 440SP).
+
+ It also introduces new defines for the equipped SDRAM controller based on
+ which PPC variant is used. There new defines are:
+
+ used on 405GR/CR/EP and some Xilinx Virtex boards.
+
+ used on 440GP/GX/EP/GR.
+
+ used on 440EPx/GRx.
+
+ used on 405EX/r/440SP/SPe/460EX/GT.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 64852d09e06dd6db2b2db2a3c59bc2db176a54d6
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Jun 2 14:35:44 2008 +0200
+
+ ppc4xx/NAND_SPL: Consolidate 405 and 440 NAND booting code in start.S
+
+ This patch consolidates the 405 and 440 parts of the NAND booting code
+ selected via CONFIG_NAND_SPL. Now common code is used to initialize the
+ SDRAM by calling initdram() and to "copy/relocate" to SDRAM/OCM/etc.
+ Only *after* running from this location, nand_boot() is called.
+
+ Please note that the initsdram() call is now moved from nand_boot.c
+ to start.S. I experienced problems with some boards like Kilauea
+ (405EX), which don't have internal SRAM (OCM) and relocation needs to
+ be done to SDRAM before the NAND controller can get accessed. When
+ initdram() is called later on in nand_boot(), this can lead to problems
+ with variables in the bss sections like nand_ecc_pos[].
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+ Acked-by: Scott Wood <scottwood@freescale.com>
+
+commit 8a24c07ba5da2c72ad1f05e3eb8a463750200c98
+Author: Grant Erickson <gerickson@nuovations.com>
+Date: Thu May 22 14:44:24 2008 -0700
+
+ ppc4xx: Enable Primordial Stack for 40x and Unify ECC Handling
+
+ This patch (Part 2 of 2):
+
+ * Rolls up a suite of changes to enable correct primordial stack and
+ global data handling when the data cache is used for such a purpose
+ for PPC40x-variants (i.e. CFG_INIT_DCACHE_CS).
+
+ * Related to the first, unifies DDR2 SDRAM and ECC initialization by
+ eliminating redundant ECC initialization implementations and moving
+ redundant SDRAM initialization out of board code into shared 4xx
+ code.
+
+ * Enables MCSR visibility on the 405EX(r).
+
+ * Enables the use of the data cache for initial RAM on
+ both AMCC's Kilauea and Makalu and removes a redundant
+ CFG_POST_MEMORY flag from each board's CONFIG_POST value.
+
+ - Removed, per Stefan Roese's request, defunct memory.c file for
+ Makalu and rolled sdram_init from it into makalu.c.
+
+ With respect to the 4xx DDR initialization and ECC unification, there
+ is certainly more work that can and should be done (file renaming,
+ etc.). However, that can be handled at a later date on a second or
+ third pass. As it stands, this patch moves things forward in an
+ incremental yet positive way for those platforms that utilize this
+ code and the features associated with it.
+
+ Signed-off-by: Grant Erickson <gerickson@nuovations.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit c821b5f120bedf73867513466412587c6912a8f8
+Author: Grant Erickson <gerickson@nuovations.com>
+Date: Thu May 22 14:44:14 2008 -0700
+
+ ppc4xx: Enable Primordial Stack for 40x and Unify ECC Handling
+
+ This patch (Part 1 of 2):
+
+ * Rolls up a suite of changes to enable correct primordial stack and
+ global data handling when the data cache is used for such a purpose
+ for PPC40x-variants (i.e. CFG_INIT_DCACHE_CS).
+
+ * Related to the first, unifies DDR2 SDRAM and ECC initialization by
+ eliminating redundant ECC initialization implementations and moving
+ redundant SDRAM initialization out of board code into shared 4xx
+ code.
+
+ * Enables MCSR visibility on the 405EX(r).
+
+ * Enables the use of the data cache for initial RAM on
+ both AMCC's Kilauea and Makalu and removes a redundant
+ CFG_POST_MEMORY flag from each board's CONFIG_POST value.
+
+ - Removed, per Stefan Roese's request, defunct memory.c file for
+ Makalu and rolled sdram_init from it into makalu.c.
+
+ With respect to the 4xx DDR initialization and ECC unification, there
+ is certainly more work that can and should be done (file renaming,
+ etc.). However, that can be handled at a later date on a second or
+ third pass. As it stands, this patch moves things forward in an
+ incremental yet positive way for those platforms that utilize this
+ code and the features associated with it.
+
+ Signed-off-by: Grant Erickson <gerickson@nuovations.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit a439680019e06171d4a5694b7992accce87f590e
+Author: Grant Erickson <gerickson@nuovations.com>
+Date: Wed May 21 13:28:30 2008 -0700
+
+ PPC4xx: Simplified post_word_{load, store}
+
+ This patch simplifies post_word_{load,store} by using the preprocessor
+ to eliminate redundant, copy-and-pasted code.
+
+ Signed-off-by: Grant Erickson <gerickson@nuovations.com>
+
+commit f979690ee337450b2030aba128f95b7a8d9881c0
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Thu May 15 15:13:08 2008 -0500
+
+ Fix warnings from gcc-4.3.0 build on a ppc host
+
+ * The cfi_flash.c memset fix actual allows the board to boot so there is
+ a bit more going on here than just resolving warnings associated with
+ uninitialized variables.
+
+ * include/asm/bitops.h:302: warning: '__swab32p' is static but used in
+ inline function 'ext2_find_next_zero_bit' which is not static
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 9b124a68346ce9605b6e1fcf79e1021541cdba9e
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date: Wed May 14 13:09:51 2008 -0500
+
+ MPC512x: Change traps.c to not reference non-addressable memory
+
+ Currently, END_OF_RAM is used by the trap code to determine if
+ we should attempt to access the stack pointer or not. However,
+ on systems with a lot of RAM, only a subset of the RAM is
+ guaranteed to be mapped in and accessible. Change END_OF_RAM
+ to use get_effective_memsize() instead of using the raw ram
+ size out of the bd.
+
+ Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit 81673e9ae14b771cd13faf19947192599cae3959
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue May 13 19:01:54 2008 -0500
+
+ Make sure common.h is the first include.
+
+ If common.h isn't first we can get CONFIG_ options defined in the
+ board config file ignored. This can cause an issue if any of those
+ config options impact the size of types of data structures
+ (eg CONFIG_PHYS_64BIT).
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 95d449ad4de79dd32b1705b8a4d3550f1e9081e3
+Author: Marian Balakowicz <m8@semihalf.com>
+Date: Tue May 13 15:53:29 2008 +0200
+
+ Avoid initrd and logbuffer area overlaps
+
+ Add logbuffer to reserved LMB areas to prevent initrd allocation
+ from overlaping with it.
+
+ Make sure to use correct logbuffer base address.
+
+ Signed-off-by: Marian Balakowicz <m8@semihalf.com>
+
+commit 6956d53d9934862507f83f0e3255dfd4662e7482
+Author: Sascha Laue <sascha.laue@liebherr.com>
+Date: Tue May 13 13:29:54 2008 +0200
+
+ lwmon5: add memory-pattern-test to FPGA POST.
+
+commit e34a0e911b6a1568d0ca864234fbd0ee060d9b35
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date: Thu May 8 19:02:51 2008 -0500
+
+ PPC: 86xx Add bat registers to reginfo command
+
+ Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit d5b9b8cdb8b6eb3a8b0f5d9909d69ccc9c703ed9
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date: Fri May 9 15:41:35 2008 -0500
+
+ PPC: Add print_bats() to lib_ppc/bat_rw.c
+
+ This function prints the values of all the BAT register
+ pairs - I needed this for debug earlier this week; adding it to
+ lib_ppc so others can use it (and add it to reginfo commands
+ if so desired).
+
+ Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit c148f24c15743a02e855636e6bed013bd121f7f2
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date: Thu May 15 21:29:04 2008 -0500
+
+ PPC: Change lib_ppc/bat_rw.c to use high bats
+
+ Currently, this code only deals with BATs 0-3, which makes
+ it useless on systems that support BATs 4-7. Add the
+ support for these registers.
+
+ Signed-off-by: Becky Bruce <Becky.bruce@freescale.com>
+
+commit 31d826722434931e1152a09d140187dcf72f8aac
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date: Thu May 8 19:02:12 2008 -0500
+
+ PPC: Create and use CONFIG_HIGH_BATS
+
+ Change all code that conditionally operates on high bat
+ registers (that is, BATs 4-7) to look at CONFIG_HIGH_BATS
+ instead of the myriad ways this is done now. Define the option
+ for every config for which high bats are supported (and
+ enabled by early boot, on parts where they're not always
+ enabled)
+
+ Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit aa3b8bf9c30065bb2ea852799d32db5020598495
+Author: Wolfgang Grandegger <wg@grandegger.com>
+Date: Wed May 28 19:55:19 2008 +0200
+
+ E1000: Add support for the 82541GI LF Intel Pro 1000 GT Desktop Adapter
+
+ Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit ff36fbb2e7583fb808eef773f511489c7a9c2df3
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Wed May 28 13:06:25 2008 -0500
+
+ ColdFire: Add 10 base ethernet support for mcf5445x
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 1a9fcc4b765599db24fa9c32293599f24c7a19ba
+Author: Jason McMullan <mcmullan@netapp.com>
+Date: Fri May 30 00:53:38 2008 +0900
+
+ mips: Add an 'include/asm/errno.h', like all other architectures
+
+ All other u-boot architectures have an include/asm/errno.h, so
+ this change adds it to the mips include/asm-mips headers also.
+
+ Stolen from Linux 2.6.25.
+
+ Signed-off-by: Jason McMullan <mcmullan@netapp.com>
+
+commit e2ad8426624bac457acc6925b6ff408e9bf20466
+Author: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+Date: Fri May 30 00:53:38 2008 +0900
+
+ [MIPS] <asm/mipsregs.h>: Update coprocessor register access macros
+
+ Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+
+commit 1a3adac81c292f2ee76e43cdeb2fbe8f915fe194
+Author: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+Date: Fri May 30 00:53:38 2008 +0900
+
+ [MIPS] <asm/mipsregs.h>: Update register / bit field definitions
+
+ Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+
+commit bf462ae450a7f2eeeddc699ed345b391e3263540
+Author: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+Date: Fri May 30 00:53:37 2008 +0900
+
+ [MIPS] <asm/mipsregs.h>: CodinygStyle cleanups
+
+ No functional changes.
+
+ Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+
+commit 89a1550ec6b74452274a7a23127936e2c7eec711
+Author: Jason McMullan <mcmullan@netapp.com>
+Date: Fri May 30 00:53:37 2008 +0900
+
+ mips: If CONFIG_CMD_SPI is defined, call spi_init()
+
+ The mips architecture currently does not call 'spi_init()' in the generic
+ board initialization routine is CONFIG_CMD_SPI is defined.
+
+ This patch rectifies that problem.
+
+ Signed-off-by: Jason McMullan <mcmullan@netapp.com>
+ Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+
+commit e996bc339b0f39f6c0b29b1455ba7eb318b023d3
+Author: Jason McMullan <mcmullan@netapp.com>
+Date: Fri May 30 00:53:37 2008 +0900
+
+ [MIPS] lib_mips/board.c: Add nand_init
+
+ This patch adds the standard 'nand_init()' call to the mips generic
+ 'board_init_r()' call, bringing MIPS in line with the other architectures.
+
+ Signed-off-by: Jason McMullan <mcmullan@netapp.com>
+ Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+
+commit d6ac2ed893c2168738aee01579d6283af8d37045
+Author: Scott Wood <scottwood@freescale.com>
+Date: Thu May 22 10:49:46 2008 -0500
+
+ Remove prototypes of nand_init() in favor of including nand.h.
+
+ Likewise with onenand_init().
+
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 229c56f07a82eacda8c8720cb146fc9be0f6db54
+Author: Scott Wood <scottwood@freescale.com>
+Date: Thu May 22 10:49:00 2008 -0500
+
+ Make onenand_uboot.h self-sufficient.
+
+ Don't assume types are provided by previously included headers.
+
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 9723bbb46abb7b2ca24eead5114a3faa58060c20
+Author: Dirk Behme <dirk.behme@gmail.com>
+Date: Wed Jan 16 14:26:59 2008 +0100
+
+ nand: Correct NAND erase percentage output
+
+ For NAND erase sizes smaller than one NAND erase block, erase
+ percentage output becomes grater than 100% e.g.
+
+ -- cut --
+ > nand info
+ Device 0: NAND 64MiB 1,8V 8-bit, sector size 16 KiB
+ > nand erase 0x100000 0x2000
+ NAND erase: device 0 offset 0x100000, size 0x2000
+ Erasing at 0x100000 -- 200% complete.
+ OK
+ >
+ -- cut --
+
+ Correct this and give user a warning that more is erased than specified:
+
+ -- cut --
+ > nand erase 0x100000 0x2000
+ NAND erase: device 0 offset 0x100000, size 0x2000
+ Warning: Erase size 0x00002000 smaller than one erase block 0x00004000
+ Erasing 0x00004000 instead
+ Erasing at 0x100000 -- 100% complete.
+ OK
+ >
+ -- cut --
+
+ Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
+
+commit 5922db6c0948506be91e0de44e7a6863a18a417f
+Author: Stelian Pop <stelian@popies.net>
+Date: Tue May 13 17:31:24 2008 +0200
+
+ Cleanup nand_info[] declaration.
+
+ The nand_info array is declared as extern in several .c files.
+ Those days, nand.h contains a reference to the array, so there is
+ no need to declare it elsewhere.
+
+ Signed-off-by: Stelian Pop <stelian@popies.net>
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 135f0a7488af2947adbe4b40b79280bdfe5e9886
+Author: Scott Wood <scottwood@freescale.com>
+Date: Mon May 19 09:30:43 2008 -0500
+
+ NAND: Provide a sane default for NAND_MAX_CHIPS.
+
+ This allows the header to be included regardless of whether a board's
+ config file provides NAND-related defininitions.
+
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit a8092c021d27f27f4b323b7d49979ca01b3fc19d
+Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+Date: Mon May 26 12:19:10 2008 +0200
+
+ avr32: Fix theoretical race in udelay()
+
+ If the specified delay is very short, the cycle counter may go past the
+ "end" time we are waiting for before we get around to reading it.
+
+ Fix it by checking the different between the cycle count "now" and the
+ cycle count at the beginning. This will work as long as the delay
+ measured in number of cycles is below 2^31.
+
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
+commit 48ea623eae8674793372e3e7c95e72e5a44d7a95
+Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+Date: Wed May 21 13:01:09 2008 +0200
+
+ avr32: Compile atmel_mci.o conditionally
+
+ Remove #ifdef CONFIG_MMC from the source file and use conditional
+ compilation in the Makefile instead.
+
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
+commit e92a5bf8330654e33ac13f6b3058634e58f5d1c0
+Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+Date: Thu May 22 12:28:25 2008 +0200
+
+ avr32: Fix wrong error flags in atmel_mci driver
+
+ Make sure we check for CRC errors when sending commands that use CRC
+ checking.
+
+ Reported-by: Gururaja Hebbar K R <gururajakr@sanyo.co.in>
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
+commit 7a96ddadd13e6ac9a829affce9b6f8823f580e49
+Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+Date: Wed May 21 11:10:59 2008 +0200
+
+ avr32: Fix two warnings in atmel_mci.c
+
+ The warnings are harmless but annoying. Let's fix them.
+
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
+commit a23e277c4a3a2bbc42d237aae29da3a8971e757f
+Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+Date: Mon May 19 11:36:28 2008 +0200
+
+ avr32: Rework SDRAM initialization code
+
+ This cleans up the SDRAM initialization and related code a bit, and
+ allows faster booting.
+
+ * Add definitions for EBI and internal SRAM to asm/arch/memory-map.h
+ * Remove memory test from sdram_init() and make caller responsible
+ for verifying the SDRAM and determining its size.
+ * Remove base_address member from struct sdram_config (was sdram_info)
+ * Add data_bits member to struct sdram_config and kill CFG_SDRAM_16BIT
+ * Add support for a common STK1000 hack: 16MB SDRAM instead of 8.
+
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
+commit 95107b7c028806919630bf02c653aa8f4f867c94
+Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+Date: Mon May 19 11:27:37 2008 +0200
+
+ avr32: Do stricter stack checking in the exception handler
+
+ Don't do a stack dump if the stack pointer is outside the memory area
+ reserved for stack.
+
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
+commit caf83ea888a0220f41747d0b7748fa43b4a4bd49
+Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+Date: Fri May 2 15:32:57 2008 +0200
+
+ avr32: Use the same entry point for reset and exception handling
+
+ Since the reset vector is always aligned to a very large boundary, we
+ can save a couple of KB worth of alignment padding by placing the
+ exception vectors at the same address.
+
+ Deciding which one it is is easy: If we're handling an exception, the
+ CPU is in Exception mode. If we're starting up after reset, the CPU is
+ in Supervisor mode. So this adds a very minimal overhead to the reset
+ path (only executed once) and the exception handling path (normally
+ never executed at all.)
+
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
+commit 0c16eed2189a190bd5655b33c029f809a9b31128
+Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+Date: Fri May 2 15:24:22 2008 +0200
+
+ avr32: Put memset in its own section
+
+ All C code is compiled with -ffunction-sections -fdata-sections.
+ Assembly functions should get their own sections as well so that
+ everything looks consistent.
+
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
+commit 3ace2527ba80bd2fe1bceaab50d0b3c4fb5dd020
+Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+Date: Fri May 2 15:21:40 2008 +0200
+
+ avr32: Rename pm_init() as clk_init() and make SoC-specific
+
+ pm_init() was always more about clock initialization than anything
+ else. Dealing with PLLs, clock gating and such is also inherently
+ SoC-specific, so move it into a SoC-specific directory.
+
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
+commit 4f5972c3b2454c22957f2842cfe64ec8118e015b
+Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+Date: Wed Apr 30 16:15:57 2008 +0200
+
+ avr32: Use new-style Makefile for the at32ap platform
+
+ This makes it easier to avoid compiling certain files later.
+
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
+commit a9b2bb78a1bd8ebdb633509bdd1c8134d527b213
+Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+Date: Wed Apr 30 14:36:47 2008 +0200
+
+ avr32: Remove unused file cpu/at32ap/pm.c
+
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
+commit 44453b25b06426eef0b7b2fa7c026fdf19ce34f2
+Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+Date: Wed Apr 30 14:19:28 2008 +0200
+
+ avr32: Clean up the HMATRIX code
+
+ Rework the HMATRIX configuration interface so that it becomes easier
+ to configure the HMATRIX for boards with special needs, and add new
+ parts.
+
+ The HMATRIX header file has been split into a general,
+ chip-independent part with register definitions, etc. and a
+ chip-specific part with SFR bitfield definitions and master/slave
+ identifiers.
+
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
+commit 0a2e48792dd372c90b80059f3235e67a567e16fc
+Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+Date: Thu Nov 22 12:14:11 2007 +0100
+
+ avr32: Add support for the ATSTK1006 board
+
+ This is a replacement for ATSTK1002 with 64MB SDRAM and NAND flash on
+ board. It's currently in production and will be available soon.
+
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
+commit 781eb9a1e4af4bd34c138e6126ec5cc6dd4b5440
+Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+Date: Tue Apr 29 12:53:05 2008 +0200
+
+ avr32: Get rid of the .flashprog section
+
+ The .flashprog section was only needed back when we were running
+ directly from flash, and it's even more useless on NGW100 since it
+ uses the CFI flash driver which never used this workaround in the
+ first place.
+
+ Remove it on STK1000 as well, and get rid of all the associated code and
+ annotations.
+
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
+commit cdd42c0c7a5205fc380912d83229069a71ea3abf
+Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+Date: Wed Apr 30 13:09:56 2008 +0200
+
+ avr32: Use correct condition around macb clock accessors
+
+ get_macb_pclk_rate() and get_macb_hclk_rate() should be available when
+ the chip has a MACB controller, not when it has a USART.
+
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
+commit f793a3581901ff39c2abb94012d9bbc8573ccf02
+Author: David Brownell <david-b@pacbell.net>
+Date: Wed Apr 16 22:57:58 2008 -0700
+
+ avr32: Disable the AP7000 internal watchdog on startup
+
+ This patch forces the watchdog off in all cases. That will at least
+ get rid of the constant reboot cycle, though it won't let the watchdog
+ actually run in the new kernels: its probe() comes up with a polite
+ warning.
+
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
+commit 55ac7a7490b55da56659f95d82a0c83b9756df27
+Author: David Brownell <david-b@pacbell.net>
+Date: Fri Feb 22 12:54:39 2008 -0800
+
+ avr32: stk1002 and ngw100 convergence
+
+ Make STK1002 and NGW100 boards act more alike:
+ - STK boards can use as many arguments as NGW
+ - STK boards don't need to manage FPGAs either
+ - NGW commands should match STK ones
+
+ Also spell U-Boot right in prompts for STK1002 and NGW100.
+
+ Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
+ [haavard.skinnemoen@atmel.com: update STK100[34] as well]
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
+commit 5e1882df6a3efc7de5524d28cea4ecde7d163d54
+Author: Sergei Poselenov <sposelenov@emcraft.com>
+Date: Tue May 27 13:47:00 2008 +0200
+
+ Socrates: Fix PCI bus frequency report
+
+ Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
+
+commit 791e1dba8de76ad8e762a7badb869f224a1f8b82
+Author: Sergei Poselenov <sposelenov@emcraft.com>
+Date: Tue May 27 11:49:13 2008 +0200
+
+ Socrates: Added USB support.
+
+ Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
+
+commit 5a904e5637cff1d708dc67098004f83ba9e84c54
+Author: Sergei Poselenov <sposelenov@emcraft.com>
+Date: Tue May 27 11:35:02 2008 +0200
+
+ USB: add new configuration variable CONFIG_PCI_OHCI_DEVNO
+
+ In case of several PCI USB controllers on a board this variable
+ specifys which controller to use.
+ See doc/README.generic_usb_ohci for details.
+
+ Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
+
+commit 2f7468aeba60e1288030a8d007c4e63bd3f13221
+Author: Sergei Poselenov <sposelenov@emcraft.com>
+Date: Tue May 27 10:36:07 2008 +0200
+
+ Socrates: add support for DS75 Digital Thermo Sensor on I2C bus.
+
+ Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
+
+commit 83e9d7a2614d4006b92690afa3390c291734267e
+Author: Sergei Poselenov <sposelenov@emcraft.com>
+Date: Mon May 26 18:16:04 2008 +0200
+
+ Socrates: Config file cleanup.
+
+ Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
+
+commit 602cac1389b755b223272f2328a47e6f8c240848
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Sat May 24 12:47:46 2008 +0200
+
+ MAKEALL: add at91 list
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 290ef6436838b1cc013bd67e0e0495c9eb3e23c0
+Author: Ron Madrid <ron_madrid@sbcglobal.net>
+Date: Fri May 23 15:37:05 2008 -0700
+
+ Add Marvell 88E1118 support for TSEC
+
+ Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 557b377d8bfc8b833b6e749457bcdfa298331a24
+Author: Jens Gehrlein <sew_s@tqs.de>
+Date: Mon May 5 14:06:11 2008 +0200
+
+ smc911x: add 16 bit support
+
+ Signed-off-by: Jens Gehrlein <sew_s@tqs.de>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit c918261c6d9f265f88baf70f8a73dfe6f0cb9596
+Author: Christian Eggers <ceggers@gmx.de>
+Date: Wed May 21 22:12:00 2008 +0200
+
+ USB: replace old swap_ with proper endianess conversion macros
+
+ Signed-off-by: Christian Eggers <ceggers@gmx.de>
+ Signed-off-by: Markus Klotzbuecher <mk@denx.de>
+
+commit fb63939b4fe140849cdba69f9e64a3e0e2f3ce1c
+Author: Christian Eggers <ceggers@gmx.de>
+Date: Wed May 21 21:29:10 2008 +0200
+
+ Fix endianess conversion in usb_ohci.c
+
+ Signed-off-by: Christian Eggers <ceggers@gmx.de>
+ Signed-off-by: Markus Klotzbuecher <mk@denx.de>
+
+commit 477434c63c2ea5baa5c6c4e43500786f436511ff
+Author: Sergei Poselenov <sposelenov@emcraft.com>
+Date: Thu May 22 01:15:53 2008 +0200
+
+ USB: add support for multiple PCI OHCI controllers
+
+ Add new configuration variable CONFIG_PCI_OHCI_DEVNO.
+ In case of several PCI USB controllers on a board this variable
+ specifys which controller to use.
+
+ Also add USB support for sokrates board.
+
+ See doc/README.generic_usb_ohci for details.
+
+ Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
+ Signed-off-by: Markus Klotzbuecher <mk@denx.de>
+
+commit ce6754df61cbe23b5b73d095a00ac9a8504b3d77
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed May 21 16:56:08 2008 +0200
+
+ Fix some whitespace issues
+
+ introduced by 53677ef18 "Big white-space cleanup."
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 4416603aeb06861b468b06a981e52c3ff805db7b
+Author: York Sun <yorksun@freescale.com>
+Date: Mon May 12 14:36:39 2008 -0500
+
+ Make ads5121 out-of-tree compiling safe
+
+ Reuse the existing DIU driver in board/freescale/common.
+
+ Signed-off-by: York Sun <yorksun@freescale.com>
+
+commit 0e1bad47cd345c76c91a64caf41011e431b62599
+Author: York Sun <yorksun@freescale.com>
+Date: Mon May 5 10:20:01 2008 -0500
+
+ Adding DIU support for Freescale 5121ADS
+
+ Add DIU and cfb console support to FSL 5121ADS board.
+
+ Use #define CONFIG_VIDEO in config file to enable fb console.
+
+ Signed-off-by: York Sun <yorksun@freescale.com>
+
+commit a48ff68d235e671176f6b496c44246dbe5e0a93f
+Author: York Sun <yorksun@freescale.com>
+Date: Mon May 5 10:20:00 2008 -0500
+
+ Replace DPRINTF with debug
+
+ Remove DPRINTF macro and replace it with generic debug macro.
+
+ Signed-off-by: York Sun <yorksun@freescale.com>
+
+commit 3b80c5f574ad7f6e1c55a68f42752b427fdf778d
+Author: York Sun <yorksun@freescale.com>
+Date: Mon May 5 10:19:59 2008 -0500
+
+ Move pixel clock setting to board file
+
+ The clock divider has different format in 5121 and 8610. This patch moves it to
+ board specific code.
+
+ Signed-off-by: York Sun <yorksun@freescale.com>
+
+commit 53677ef18e25c97ac613349087c5cb33ae5a2741
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue May 20 16:00:29 2008 +0200
+
+ Big white-space cleanup.
+
+ This commit gets rid of a huge amount of silly white-space issues.
+ Especially, all sequences of SPACEs followed by TAB characters get
+ removed (unless they appear in print statements).
+
+ Also remove all embedded "vim:" and "vi:" statements which hide
+ indentation problems.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 2f845dc2bdf461bfee9fa25823f769f5db9eba0b
+Author: Sergei Poselenov <sposelenov@emcraft.com>
+Date: Thu May 8 17:46:23 2008 +0200
+
+ socrates: fix second TSEC configuration (it is actually TSEC3)
+
+ Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
+
+commit 793670c3c0f0f72caead62f0be9fc3d9fbc6060f
+Author: Sergei Poselenov <sposelenov@emcraft.com>
+Date: Thu May 8 14:17:08 2008 +0200
+
+ Fixed reset for socrates
+
+ Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
+
+commit e18575d5f589a62e19c70d471d4b4e27cad3af56
+Author: Sergei Poselenov <sposelenov@emcraft.com>
+Date: Wed May 7 15:10:49 2008 +0200
+
+ socrates: changes to support FDT
+
+ Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 5d108ac8f435924c624cd6aaacd44f35f5cf94c0
+Author: Sergei Poselenov <sposelenov@emcraft.com>
+Date: Wed Apr 30 11:42:50 2008 +0200
+
+ Initial support for "Socrates" board
+
+ Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
+
+commit 0e15ddd11f1a84c465e434eb051d2ef08ef02b9b
+Author: Yuri Tikhonov <yur@emcraft.com>
+Date: Thu May 8 15:46:42 2008 +0200
+
+ POST: replace the LOGBUFF_INITIALIZED flag in gd->post_log_word (1 << 31) with the GD_FLG_LOGINIT flag in gd->flags.
+
+ This way we become able to utilize the full post_log_word for POST
+ activities (overwise, POST ECC, which has 0x8000 ID, could be
+ erroneously treated as started in post_output_backlog() even if there
+ was actually no POST ECC run (because of OCM POST failure, for
+ example).
+
+ Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
+
+commit 7845d49094c81321021b50a4dbb8864d2f3777e4
+Author: Yuri Tikhonov <yur@emcraft.com>
+Date: Thu May 8 15:46:02 2008 +0200
+
+ POST: mark OCM test as POST_STOP
+
+ Signed-off-by: Ilya Yanok <yanok@emcraft.com>
+
+commit 28a385065882d6cb6ac5f443311ff87887ed7c13
+Author: Yuri Tikhonov <yur@emcraft.com>
+Date: Thu May 8 15:45:26 2008 +0200
+
+ POST: add POST_STOP flag
+
+ Don't run futher tests in case of a test fails that is marked as
+ POST_STOP.
+
+ Signed-off-by: Ilya Yanok <yanok@emcraft.com>
+ Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
+
+commit a525145d8110d15b4389d23c3ea8a78f22509d3f
+Author: Yuri Tikhonov <yur@emcraft.com>
+Date: Thu May 8 15:44:16 2008 +0200
+
+ POST: switch CFG_POST_OCM with CFG_POST_CODEC (workaround)
+
+ Switch the OCM testid with the codec one. The reason is that current
+ implementation requires the POST_ROM testid to fit into lower 16
+ bits, and the codec test will never run with POST_ROM hopefully.
+
+ Signed-off-by: Ilya Yanok <yanok@emcraft.com>
+
+commit 8b96c788d58f7cb85a89ee3f19c9b335d22443cd
+Author: Yuri Tikhonov <yur@emcraft.com>
+Date: Thu May 8 15:43:28 2008 +0200
+
+ lwmon5: enable OCM post test on lwmon5 board
+
+ Signed-off-by: Ilya Yanok <yanok@emcraft.com>
+
+commit 6e8ec682268493b8d098f99e17b1ce71b4448977
+Author: Yuri Tikhonov <yur@emcraft.com>
+Date: Thu May 8 15:42:47 2008 +0200
+
+ POST: OCM test added.
+
+ Added OCM test to POST layer. This version runs before all other tests
+ but doesn't yet interrupt post sequence on failure.
+
+ Signed-off-by: Ilya Yanok <yanok@emcraft.com>
+ Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
+
+commit 6891260bdd935a382c95d9fa333922b0dfded68a
+Author: Yuri Tikhonov <yur@emcraft.com>
+Date: Thu May 8 15:40:39 2008 +0200
+
+ POST: typo fix
+
+ Signed-off-by: Ilya Yanok <yanok@emcraft.com>
+
+commit 727f63334676e760877d43bfb8f0e9331ac8b101
+Author: Hebbar <gururajakr@sanyo.co.in>
+Date: Tue May 20 02:16:36 2008 -0700
+
+ common/usb.c: fix incorrect escape sequence
+
+ Signed off by: Gururaja Hebbar <gururajakr@sanyo.co.in>
+
+commit 4ce1e23b5e12283579828b3d23e8fd6e1328a7aa
+Author: York Sun <yorksun@freescale.com>
+Date: Thu May 15 15:26:27 2008 -0500
+
+ Fix 8313ERDB board configuration
+
+ Change LCRR clock ratio from 2 to 4 to commodate VSC7385.
+ Correct TSEC1 vs TSEC2 assignment.
+ Define ETHADDR and ETH1ADDR always.
+
+ Signed-off-by: York Sun <yorksun@freescale.com>
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+
+commit 2c289e320dcfb3760e99cf1d765cb067194a1202
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Mon May 19 09:47:25 2008 -0500
+
+ mpc86xx: Removed unused and unconfigured memory test code.
+
+ Besides, other common code exists.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 180a90abdae72587c0f679edf8991455e559440d
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon May 19 12:47:11 2008 +0200
+
+ Release v1.3.3
+
+ Update CHANGELOG for release.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
commit 16bedc661de0dae767b1377d8413373a3fbcfa79
Author: Stefan Roese <sr@denx.de>
Date: Mon May 19 07:14:38 2008 +0200
Signed-off-by: Wolfgang Denk <wd@denx.de>
+commit 0c11935cd62ca1f65eeb228ff4c848440d4553bf
+Author: Gary Jennejohn <garyj@denx.de>
+Date: Wed May 14 13:39:22 2008 +0200
+
+ ppc4xx: QUAD100HD: Allow the environment to be put into flash.
+
+ After moving TEXT_BASE the value for CFG_ENV_ADDR was incorrect. Also
+ use a redundant environment.
+
+ Signed-off-by: Gary Jennejohn <garyj@denx.de>
+
commit cda2a4a9961fd4341b7db305cb22fc05957e8b77
Author: Wolfgang Denk <wd@denx.de>
Date: Wed May 14 13:55:30 2008 +0200
Signed-off-by: Wolfgang Denk <wd@denx.de>
+commit 54694a91428f6c3280fe1ee0923488a1e7e8dbc4
+Author: Stelian Pop <stelian@popies.net>
+Date: Tue May 13 17:31:24 2008 +0200
+
+ Cleanup nand_info[] declaration.
+
+ The nand_info array is declared as extern in several .c files.
+ Those days, nand.h contains a reference to the array, so there is
+ no need to declare it elsewhere.
+
+ Signed-off-by: Stelian Pop <stelian@popies.net>
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
commit 70fab1908fc1734a403711eaabbef546bc4b77dc
Author: Stefan Roese <sr@denx.de>
Date: Tue May 13 20:22:01 2008 +0200
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+commit 67e3beb52c320b0a31cf030716c99392cde2d532
+Author: Stelian Pop <stelian@popies.net>
+Date: Fri May 9 21:46:51 2008 +0200
+
+ AT91: Cleanup unused config header file definitions.
+
+ CONFIG_ENV_OVERWRITE is commented out in the config header files,
+ so let's cleanup the files by removing the whole definition.
+
+ Signed-off-by: Stelian Pop <stelian@popies.net>
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 19883aede2ac0a522493bfb2b35a7dbb200071b1
+Author: Stelian Pop <stelian@popies.net>
+Date: Thu May 8 14:52:34 2008 +0200
+
+ Support AT91CAP9 revC CPUs
+
+ The AT91CAP9 revC CPU has a few differences over the previous,
+ revB CPU which was distributed in small quantities only (revA was
+ an internal Atmel product only).
+
+ The revC silicon needs a special initialisation sequence to
+ switch from the internal (imprecise) RC oscillator to the
+ external 32k clock.
+
+ Signed-off-by: Stelian Pop <stelian@popies.net>
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 098b7b4b441b12c2a64dd517930f43c793542759
+Author: Stelian Pop <stelian@popies.net>
+Date: Thu May 8 14:52:33 2008 +0200
+
+ Use custom logo for Atmel boards
+
+ This patch adds a custom vendor logo for the Atmel AT91 boards.
+
+ Signed-off-by: Stelian Pop <stelian@popies.net>
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 761c70b80cdd3bead40146b96a8e713d6ae01632
+Author: Stelian Pop <stelian@popies.net>
+Date: Thu May 8 14:52:32 2008 +0200
+
+ AT91SAM9RLEK: hook up the ATMEL LCD driver
+
+ This patch makes the necessary adaptations (PIO configurations and
+ defines in config header file) to hook up the Atmel LCD driver to the
+ AT91SAM9RLEK board.
+
+ Signed-off-by: Stelian Pop <stelian@popies.net>
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 56a2479cd7fecabdd91348a775b2801dd2e65c7f
+Author: Stelian Pop <stelian@popies.net>
+Date: Thu May 8 14:52:31 2008 +0200
+
+ AT91SAM9263EK: hook up the ATMEL LCD driver
+
+ This patch makes the necessary adaptations (PIO configurations and
+ defines in config header file) to hook up the Atmel LCD driver to the
+ AT91SAM9263EK board.
+
+ Signed-off-by: Stelian Pop <stelian@popies.net>
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 820f2a958325061a446115f3035e48e4726b3390
+Author: Stelian Pop <stelian@popies.net>
+Date: Thu May 8 14:52:30 2008 +0200
+
+ AT91SAM9261EK: hook up the ATMEL LCD driver
+
+ This patch makes the necessary adaptations (PIO configurations and
+ defines in config header file) to hook up the Atmel LCD driver to the
+ AT91SAM9261EK board.
+
+ Signed-off-by: Stelian Pop <stelian@popies.net>
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit c139b17d20c8371c1e0a8d7fb27c11050cf86304
+Author: Stelian Pop <stelian@popies.net>
+Date: Thu May 8 14:52:29 2008 +0200
+
+ AT91CAP9ADK: hook up the ATMEL LCD driver
+
+ This patch makes the necessary adaptations (PIO configurations and
+ defines in config header file) to hook up the Atmel LCD driver to the
+ AT91CAP9ADK board.
+
+ Signed-off-by: Stelian Pop <stelian@popies.net>
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 39cf480484fcce5c04a590ee1c30be0c17b02c34
+Author: Stelian Pop <stelian@popies.net>
+Date: Fri May 9 21:57:18 2008 +0200
+
+ Add ATMEL LCD driver
+
+ This patch adds support for the ATMEL LCDC driver which is used on some
+ AT91 and AVR platforms.
+
+ Is has been tested with the AT91CAP9ADK, AT91SAM9261EK, AT91SAM9263EK and
+ AT91SAM9RLEK boards. Adaptation for AVR32 should probably be easy.
+
+ Signed-off-by: Stelian Pop <stelian@popies.net>
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 2118ebb44dc40f8117c94950fd95799a9ef821b2
+Author: Stelian Pop <stelian@popies.net>
+Date: Thu May 8 18:52:25 2008 +0200
+
+ AT91SAM9RLEK support
+
+ This patch adds support for the AT91SAM9RL chip and the AT91SAM9RLEK
+ board.
+
+ Signed-off-by: Stelian Pop <stelian@popies.net>
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 8e429b3eee23927c1222679f6b6f53667b21595c
+Author: Stelian Pop <stelian@popies.net>
+Date: Thu May 8 18:52:23 2008 +0200
+
+ AT91SAM9263EK support
+
+ This patch adds support for the AT91SAM9263 chip and the AT91SAM9263EK
+ board.
+
+ Signed-off-by: Stelian Pop <stelian@popies.net>
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit d99a8ff66d8ae87e5c87590ed2e4ead629540607
+Author: Stelian Pop <stelian@popies.net>
+Date: Thu May 8 20:52:22 2008 +0200
+
+ AT91SAM9261EK support
+
+ This patch adds support for the AT91SAM9261 chip and the AT91SAM9261EK
+ board.
+
+ Signed-off-by: Stelian Pop <stelian@popies.net>
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 86c8c8a414988c50104a3b02c29f50af2be738c0
+Author: Stelian Pop <stelian@popies.net>
+Date: Thu May 8 20:52:21 2008 +0200
+
+ AT91SAM9260EK: Fix dataflash offsets in CONFIG_BOOTCOMMAND
+
+ This patch fixes the dataflash offsets used in CONFIG_BOOTCOMMAND
+ in order to cope with the changes in DataFlash partitionning scheme
+ (cset c3a60cb3).
+
+ Signed-off-by: Stelian Pop <stelian@popies.net>
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 96996ac25d5222611a8888968db6e53a6d3726da
+Author: Stelian Pop <stelian@popies.net>
+Date: Thu May 8 20:52:20 2008 +0200
+
+ AT91SAM9260EK: Normalize BOOTARGS
+
+ This patch adapts CONFIG_BOOTARGS to the chosen boot method (boot from
+ DataFlash or from NAND), and gives to Linux a fully specified mtdparts
+ variable.
+
+ Signed-off-by: Stelian Pop <stelian@popies.net>
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 79f0cb6e9c54d31a1d9e3f5e226a9bebc3c3a47a
+Author: Stelian Pop <stelian@popies.net>
+Date: Thu May 8 20:52:19 2008 +0200
+
+ AT91SAM9260EK: Normalize SPI timings
+
+ This patch changes the SPI timings to closely match the ones
+ used by the Linux kernel and the Atmel's own bootstrap project.
+
+ Signed-off-by: Stelian Pop <stelian@popies.net>
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit c1212b2f5c5ed440bf8e9ebc8e4fd7488858b935
+Author: Stelian Pop <stelian@popies.net>
+Date: Thu May 8 20:52:18 2008 +0200
+
+ AT91SAM9260EK: Handle 8 or 16 bit NAND
+
+ The Atmel boards can handle 8 or 16 bit NAND memories. This patch
+ makes the support configurable in the board config header file
+ (CFG_NAND_DBW_8 or CFG_NAND_DBW_16).
+
+ Signed-off-by: Stelian Pop <stelian@popies.net>
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit ab52640fc01624e208424e527af0b7b3a5a65a12
+Author: Stelian Pop <stelian@popies.net>
+Date: Thu May 8 20:52:17 2008 +0200
+
+ AT91CAP9ADK: Fix dataflash offsets in CONFIG_BOOTCOMMAND
+
+ This patch fixes the dataflash offsets used in CONFIG_BOOTCOMMAND
+ in order to cope with the changes in DataFlash partitionning scheme
+ (cset c3a60cb3).
+
+ Signed-off-by: Stelian Pop <stelian@popies.net>
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 3267508ec4c9e74c39ee41c9ae6951ad185fe270
+Author: Stelian Pop <stelian@popies.net>
+Date: Thu May 8 20:52:16 2008 +0200
+
+ AT91CAP9ADK: Normalize BOOTARGS
+
+ This patch adapts CONFIG_BOOTARGS to the chosen boot method (boot from
+ DataFlash or from NAND), and gives to Linux a fully specified mtdparts
+ variable.
+
+ Signed-off-by: Stelian Pop <stelian@popies.net>
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 93da48b910511911ce110656e17ed733c8ac4c45
+Author: Stelian Pop <stelian@popies.net>
+Date: Thu May 8 20:52:15 2008 +0200
+
+ AT91CAP9ADK: Normalize SPI timings
+
+ This patch changes the SPI timings to closely match the ones
+ used by the Linux kernel and the Atmel's own bootstrap project.
+
+ Signed-off-by: Stelian Pop <stelian@popies.net>
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 1c90df3e148ce0a3e2c86c63b38b19d47772f2a0
+Author: Stelian Pop <stelian@popies.net>
+Date: Thu May 8 20:52:14 2008 +0200
+
+ AT91CAP9ADK: Handle 8 or 16 bit NAND
+
+ The Atmel boards can handle 8 or 16 bit NAND memories. This patch
+ makes the support configurable in the board config header file
+ (CFG_NAND_DBW_8 or CFG_NAND_DBW_16).
+
+ Signed-off-by: Stelian Pop <stelian@popies.net>
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 11b162bae058e96c7929e358d4adff2bee6c2cc4
+Author: Stelian Pop <stelian@popies.net>
+Date: Thu May 8 20:52:13 2008 +0200
+
+ Use a common u-boot.lds file across all AT91CAP9/AT91SAM9 platforms
+
+ All the AT91CAP9/AT91SAM9 boards have the same linker script. The patch
+ below avoids the duplication of u-boot.lds by putting the file in the
+ cpu directory instead of the board one.
+
+ Signed-off-by: Stelian Pop <stelian@popies.net>
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit d48abea4b89adaf5e45ea75b5e38c0d8de179ece
+Author: Stelian Pop <stelian@popies.net>
+Date: Thu May 8 20:52:12 2008 +0200
+
+ Add proper copyright notices in Atmel boards Makefiles
+
+ The Makefiles for the AT91CAP9/AT91SAM9 boards have an incomplete
+ copyright notice. This patch adds the missing pieces.
+
+ Signed-off-by: Stelian Pop <stelian@popies.net>
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit e817a042cef6164bf26fee86f90326f2ec9e6745
+Author: Stelian Pop <stelian@popies.net>
+Date: Thu May 8 20:52:11 2008 +0200
+
+ Add copyright information in Atmel boards partition.c
+
+ When Ulf did the dataflash.c cleanup, he didn't add his copyright on
+ the new created files. This patch fixes the problem.
+
+ Signed-off-by: Stelian Pop <stelian@popies.net>
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 4f6c810106f4f76d83cfc57d98f4540cd45f9a19
+Author: Stelian Pop <stelian@popies.net>
+Date: Thu May 8 20:52:10 2008 +0200
+
+ Update origin and copyright information in arch-at91sam9 header files
+
+ When doing the AT91CAP9/AT91SAM9 port, a number of header files were
+ copied from the Linux kernel sources. This patch explicitly specifies
+ this origin for all the copied headers, and for those missing copyright
+ information, adds it.
+
+ Additionaly, the header file 'at91sam926x_mc.h' has been superceeded
+ in the latest kernel sources by 'at91sam9_smc.h'.
+
+ The copyright information has been confirmed by the AT91 Linux kernel
+ maintainer, Andrew Victor <avictor.za@gmail.com>.
+
+ Signed-off-by: Stelian Pop <stelian@popies.net>
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
commit 79dd1712689d6a5031d7cbff54957049680751c7
Author: Markus Klotzbücher <mk@denx.de>
Date: Thu May 8 16:00:55 2008 +0200
Signed-off-by: Wolfgang Denk <wd@denx.de>
+commit 567fb852178dbf59529d7301620a3f3732a4b02d
+Author: Stelian Pop <stelian@popies.net>
+Date: Thu May 8 22:52:09 2008 +0200
+
+ Fix @ -> <at> substitution
+
+ When applying the AT91CAP9 patches upstream, something transformed
+ the '@' character into the ' <at> ' sequence.
+
+ The patch below restores the original form in all the places where
+ it has been modified (the AT91CAP9 files, the AT91SAM9260 files which
+ were copied from AT91CAP9, and a couple of other files where the
+ ' <at> ' sequence was present).
+
+ Signed-off-by: Stelian Pop <stelian@popies.net>
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 73ccb3410a0785593cda7aee455dfc51f790e281
+Author: Gary Jennejohn <gary.jennejohn@freenet.de>
+Date: Mon Apr 28 14:04:32 2008 +0200
+
+ ppc4xx: Add the Harris QUAD100HD AMCC 405EP-based board
+
+ Signed-off-by: Gary Jennejohn <garyj@denx.de>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
commit ef2642625cbfb1c3695e3478d08ae515052a4950
Author: Stefan Roese <sr@denx.de>
Date: Thu May 8 11:10:46 2008 +0200
Originally pointed out by Laurent Pinchart <laurent.pinchart@tbox.biz>,
see http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/22846
- Signed-off-by: Bernhard Nemec <bnemec@ganssloser.com>
+ Signed-off-by: Bernhard Nemec <bnemec <at> ganssloser.com>
commit 84d0c2f1e39caff58bf765a7ab7c72da23c25ec8
Author: Kim B. Heino <Kim.Heino@bluegiga.com>
86xx: Convert sbc8641d to use libfdt.
This is the proper fix for a missing closing brace in the function
- ft_cpu_setup() noticed by joe.hamman@embeddedspecialties.com.
+ ft_cpu_setup() noticed by joe.hamman <at> embeddedspecialties.com.
The ft_cpu_setup() function in mpc8641hpcn.c should have been
removed earlier as it was under the obsolete CONFIG_OF_FLAT_TREE,
but was missed. Only, the sbc8641d was nominally still using it.
We already have a vendor subdir for Atmel, so we should use it.
- Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+ Signed-off-by: Haavard Skinnemoen <hskinnemoen <at> atmel.com>
commit 6d0943a6be99977d6d853d51749e9963d68eb192
Author: Andreas Engel <andreas.engel@ericsson.com>
AT91CAP9 support : MACB changes
- Signed-off-by: Stelian Pop <stelian@popies.net>
- Acked-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+ Signed-off-by: Stelian Pop <stelian <at> popies.net>
+ Acked-by: Haavard Skinnemoen <hskinnemoen <at> atmel.com>
commit 6afcabf11d7321850f4feaadfee841488ace54c5
Author: Stelian Pop <stelian@popies.net>
AT91CAP9 support : cpu/ files
- Signed-off-by: Stelian Pop <stelian@popies.net>
+ Signed-off-by: Stelian Pop <stelian <at> popies.net>
commit fa506a926cec348805143576c941f8e61b333cc0
Author: Stelian Pop <stelian@popies.net>
voiceblue \
davinci_dvevm \
davinci_schmoogie \
+ davinci_sffsdr \
davinci_sonata \
"
LIST_sh4=" \
ms7750se \
ms7722se \
- Migo-R \
+ MigoR \
r7780mp \
r2dplus \
sh7763rdp \
davinci_schmoogie_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs schmoogie davinci davinci
+davinci_sffsdr_config : unconfig
+ @$(MKCONFIG) $(@:_config=) arm arm926ejs sffsdr davinci davinci
+
davinci_sonata_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs sonata davinci davinci
## sh3 (Renesas SuperH)
#########################################################################
mpr2_config: unconfig
- @ >include/config.h
- @echo "#define CONFIG_MPR2 1" >> include/config.h
+ @mkdir -p $(obj)include
+ @echo "#define CONFIG_MPR2 1" > $(obj)include/config.h
@$(MKCONFIG) -a $(@:_config=) sh sh3 mpr2
ms7720se_config: unconfig
- @echo "#define CONFIG_MS7720SE 1" > include/config.h
+ @mkdir -p $(obj)include
+ @echo "#define CONFIG_MS7720SE 1" > $(obj)include/config.h
@$(MKCONFIG) -a $(@:_config=) sh sh3 ms7720se
#########################################################################
## sh4 (Renesas SuperH)
#########################################################################
ms7750se_config: unconfig
+ @mkdir -p $(obj)include
@echo "#define CONFIG_MS7750SE 1" > $(obj)include/config.h
@$(MKCONFIG) -a $(@:_config=) sh sh4 ms7750se
ms7722se_config : unconfig
+ @mkdir -p $(obj)include
@echo "#define CONFIG_MS7722SE 1" > $(obj)include/config.h
@$(MKCONFIG) -a $(@:_config=) sh sh4 ms7722se
MigoR_config : unconfig
- @ >include/config.h
- @echo "#define CONFIG_MIGO_R 1" >> include/config.h
+ @mkdir -p $(obj)include
+ @echo "#define CONFIG_MIGO_R 1" > $(obj)include/config.h
@./mkconfig -a $(@:_config=) sh sh4 MigoR
r7780mp_config: unconfig
- @ >include/config.h
- @echo "#define CONFIG_R7780MP 1" >> include/config.h
+ @mkdir -p $(obj)include
+ @echo "#define CONFIG_R7780MP 1" > $(obj)include/config.h
@./mkconfig -a $(@:_config=) sh sh4 r7780mp
r2dplus_config : unconfig
- @ >include/config.h
- @echo "#define CONFIG_R2DPLUS 1" >> include/config.h
+ @mkdir -p $(obj)include
+ @echo "#define CONFIG_R2DPLUS 1" > $(obj)include/config.h
@./mkconfig -a $(@:_config=) sh sh4 r2dplus
sh7763rdp_config : unconfig
- @ >include/config.h
- @echo "#define CONFIG_SH7763RDP 1" >> include/config.h
+ @mkdir -p $(obj)include
+ @echo "#define CONFIG_SH7763RDP 1" > $(obj)include/config.h
@./mkconfig -a $(@:_config=) sh sh4 sh7763rdp
#========================================================================
include $(TOPDIR)/config.mk
-LIB = lib$(BOARD).a
+LIB = $(obj)lib$(BOARD).a
-OBJS := migo_r.o
+COBJS := migo_r.o
SOBJS := lowlevel_init.o
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
--include .depend
+sinclude $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend *~
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend *~
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend *~
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend *~
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend *~
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend *~
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
*
*/
+#include <common.h>
#include <asm/u-boot.h>
#include <asm/processor.h>
-#include <common.h>
#include <command.h>
#include <config.h>
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
# define APOLLON_24XX_GPMC_CONFIG7_0 (0x00000e40|(APOLLON_CS0_BASE >> 24))
/* CS1: Ethernet */
-# define APOLLON_24XX_GPMC_CONFIG1_1 0x00011200
+# define APOLLON_24XX_GPMC_CONFIG1_1 0x00011203
# define APOLLON_24XX_GPMC_CONFIG2_1 0x001F1F01
# define APOLLON_24XX_GPMC_CONFIG3_1 0x00080803
# define APOLLON_24XX_GPMC_CONFIG4_1 0x1C0b1C0a
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
/* Need to reset PHY -> 500ms reset */
at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
- AT91_RSTC_ERSTL | (0x0D << 8) |
+ (AT91_RSTC_ERSTL & (0x0D << 8)) |
AT91_RSTC_URSTEN);
at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST);
/* Wait for end hardware reset */
while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL));
+ /* Restore NRST value */
+ at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
+ (AT91_RSTC_ERSTL & (0x0 << 8)) |
+ AT91_RSTC_URSTEN);
+
/* Re-enable pull-up */
writel(pin_to_mask(AT91_PIN_PB22) |
pin_to_mask(AT91_PIN_PB25) |
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
/* Configure SMC CS3 for NAND/SmartMedia */
at91_sys_write(AT91_SMC_SETUP(3),
- AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) |
- AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
+ AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) |
+ AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
at91_sys_write(AT91_SMC_PULSE(3),
AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) |
AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
/* Need to reset PHY -> 500ms reset */
at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
- AT91_RSTC_ERSTL | (0x0D << 8) |
+ (AT91_RSTC_ERSTL & (0x0D << 8)) |
AT91_RSTC_URSTEN);
at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST);
/* Restore NRST value */
at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
- AT91_RSTC_ERSTL | (0x0 << 8) |
+ (AT91_RSTC_ERSTL & (0x0 << 8)) |
AT91_RSTC_URSTEN);
/* Re-enable pull-up */
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
/* Configure SMC CS3 for NAND/SmartMedia */
at91_sys_write(AT91_SMC_SETUP(3),
- AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) |
- AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
+ AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) |
+ AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
at91_sys_write(AT91_SMC_PULSE(3),
- AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5) |
- AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5));
+ AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) |
+ AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
at91_sys_write(AT91_SMC_CYCLE(3),
- AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
+ AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
at91_sys_write(AT91_SMC_MODE(3),
AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
AT91_SMC_EXNWMODE_DISABLE |
#else /* CFG_NAND_DBW_8 */
AT91_SMC_DBW_8 |
#endif
- AT91_SMC_TDF_(1));
+ AT91_SMC_TDF_(2));
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_PIOC);
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
/* Configure SMC CS3 for NAND/SmartMedia */
at91_sys_write(AT91_SMC_SETUP(3),
- AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) |
- AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
+ AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) |
+ AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
at91_sys_write(AT91_SMC_PULSE(3),
AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) |
AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
/* Need to reset PHY -> 500ms reset */
at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
- AT91_RSTC_ERSTL | (0x0D << 8) |
+ (AT91_RSTC_ERSTL & (0x0D << 8)) |
AT91_RSTC_URSTEN);
at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST);
/* Wait for end hardware reset */
while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL));
+ /* Restore NRST value */
+ at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
+ (AT91_RSTC_ERSTL & (0x0 << 8)) |
+ AT91_RSTC_URSTEN);
+
/* Re-enable pull-up */
writel(pin_to_mask(AT91_PIN_PC25),
pin_to_controller(AT91_PIN_PC0) + PIO_PUER);
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
/* Configure SMC CS3 for NAND/SmartMedia */
at91_sys_write(AT91_SMC_SETUP(3),
- AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) |
- AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
+ AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) |
+ AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
at91_sys_write(AT91_SMC_PULSE(3),
- AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5) |
- AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5));
+ AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) |
+ AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
at91_sys_write(AT91_SMC_CYCLE(3),
- AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
+ AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
at91_sys_write(AT91_SMC_MODE(3),
AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
AT91_SMC_EXNWMODE_DISABLE |
#else /* CFG_NAND_DBW_8 */
AT91_SMC_DBW_8 |
#endif
- AT91_SMC_TDF_(1));
+ AT91_SMC_TDF_(2));
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_PIOD);
#if defined(CONFIG_MMC)
gpio_enable_mmci();
#endif
+#if defined(CONFIG_ATMEL_SPI)
+ gpio_enable_spi0(1 << 0);
+#endif
return 0;
}
gd->bd->bi_phy_id[0] = 0x01;
gd->bd->bi_phy_id[1] = 0x03;
}
+
+/* SPI chip select control */
+#ifdef CONFIG_ATMEL_SPI
+#include <spi.h>
+
+#define ATNGW100_DATAFLASH_CS_PIN GPIO_PIN_PA3
+
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+ return bus == 0 && cs == 0;
+}
+
+void spi_cs_activate(struct spi_slave *slave)
+{
+ gpio_set_value(ATNGW100_DATAFLASH_CS_PIN, 0);
+}
+
+void spi_cs_deactivate(struct spi_slave *slave)
+{
+ gpio_set_value(ATNGW100_DATAFLASH_CS_PIN, 1);
+}
+#endif /* CONFIG_ATMEL_SPI */
rm -f $(OBJS) $(SOBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
$(obj)bootscript.image $(obj)bootscript.o
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
$(obj)$(BOARD).o : $(src)$(BOARD).c $(obj)bootscript.o
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak *~ .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
# This is for $(obj).depend target
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak *~ .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
# This is for $(obj).depend target
--- /dev/null
+#
+# (C) Copyright 2000, 2001, 2002
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS := dv_board.o
+SOBJS := board_init.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+# This is for $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
--- /dev/null
+/*
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * Board-specific low level initialization code. Called at the very end
+ * of cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no
+ * initialization required.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+
+.globl dv_board_init
+dv_board_init:
+
+ mov pc, lr
--- /dev/null
+#
+# (C) Copyright 2002
+# Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+# David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
+#
+# Lyrtech SFF SDR board (ARM926EJS) cpu
+# see http://www.lyrtech.com/ for more information on Lyrtech
+#
+# SFF SDR board has 1 bank of 128 MB DDR RAM
+# Physical Address:
+# 8000'0000 to 87FF'FFFF
+#
+# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000
+# (mem base + reserved)
+#
+# Integrity kernel is expected to be at 8000'0000, entry 8000'00D0,
+# up to 81FF'FFFF (uses up to 32 MB of memory for text, heap, etc).
+#
+# we load ourself to 8400'0000
+#
+#
+
+# Provide at least 32MB spacing between us and the Integrity kernel image
+TEXT_BASE = 0x84000000
--- /dev/null
+/*
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * Parts are shamelessly stolen from various TI sources, original copyright
+ * follows:
+ * -----------------------------------------------------------------
+ *
+ * Copyright (C) 2004 Texas Instruments.
+ *
+ * ----------------------------------------------------------------------------
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ * ----------------------------------------------------------------------------
+ */
+
+#include <common.h>
+#include <i2c.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/emac_defs.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+extern void timer_init(void);
+extern int eth_hw_init(void);
+extern phy_t phy;
+
+
+/* Works on Always On power domain only (no PD argument) */
+void lpsc_on(unsigned int id)
+{
+ dv_reg_p mdstat, mdctl;
+
+ if (id >= DAVINCI_LPSC_GEM)
+ return; /* Don't work on DSP Power Domain */
+
+ mdstat = REG_P(PSC_MDSTAT_BASE + (id * 4));
+ mdctl = REG_P(PSC_MDCTL_BASE + (id * 4));
+
+ while (REG(PSC_PTSTAT) & 0x01);
+
+ if ((*mdstat & 0x1f) == 0x03)
+ return; /* Already on and enabled */
+
+ *mdctl |= 0x03;
+
+ /* Special treatment for some modules as for sprue14 p.7.4.2 */
+ if ((id == DAVINCI_LPSC_VPSSSLV) ||
+ (id == DAVINCI_LPSC_EMAC) ||
+ (id == DAVINCI_LPSC_EMAC_WRAPPER) ||
+ (id == DAVINCI_LPSC_MDIO) ||
+ (id == DAVINCI_LPSC_USB) ||
+ (id == DAVINCI_LPSC_ATA) ||
+ (id == DAVINCI_LPSC_VLYNQ) ||
+ (id == DAVINCI_LPSC_UHPI) ||
+ (id == DAVINCI_LPSC_DDR_EMIF) ||
+ (id == DAVINCI_LPSC_AEMIF) ||
+ (id == DAVINCI_LPSC_MMC_SD) ||
+ (id == DAVINCI_LPSC_MEMSTICK) ||
+ (id == DAVINCI_LPSC_McBSP) ||
+ (id == DAVINCI_LPSC_GPIO))
+ * mdctl |= 0x200;
+
+ REG(PSC_PTCMD) = 0x01;
+
+ while (REG(PSC_PTSTAT) & 0x03);
+ while ((*mdstat & 0x1f) != 0x03); /* Probably an overkill... */
+}
+
+void dsp_on(void)
+{
+ int i;
+
+ if (REG(PSC_PDSTAT1) & 0x1f)
+ return; /* Already on */
+
+ REG(PSC_GBLCTL) |= 0x01;
+ REG(PSC_PDCTL1) |= 0x01;
+ REG(PSC_PDCTL1) &= ~0x100;
+ REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) |= 0x03;
+ REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) &= 0xfffffeff;
+ REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) |= 0x03;
+ REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) &= 0xfffffeff;
+ REG(PSC_PTCMD) = 0x02;
+
+ for (i = 0; i < 100; i++) {
+ if (REG(PSC_EPCPR) & 0x02)
+ break;
+ }
+
+ REG(PSC_CHP_SHRTSW) = 0x01;
+ REG(PSC_PDCTL1) |= 0x100;
+ REG(PSC_EPCCR) = 0x02;
+
+ for (i = 0; i < 100; i++) {
+ if (!(REG(PSC_PTSTAT) & 0x02))
+ break;
+ }
+
+ REG(PSC_GBLCTL) &= ~0x1f;
+}
+
+
+int board_init(void)
+{
+ /* arch number of the board */
+ gd->bd->bi_arch_number = MACH_TYPE_SFFSDR;
+
+ /* address of boot parameters */
+ gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
+
+ /* Workaround for TMS320DM6446 errata 1.3.22 */
+ REG(PSC_SILVER_BULLET) = 0;
+
+ /* Power on required peripherals */
+ lpsc_on(DAVINCI_LPSC_EMAC);
+ lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER);
+ lpsc_on(DAVINCI_LPSC_MDIO);
+ lpsc_on(DAVINCI_LPSC_I2C);
+ lpsc_on(DAVINCI_LPSC_UART0);
+ lpsc_on(DAVINCI_LPSC_TIMER1);
+ lpsc_on(DAVINCI_LPSC_GPIO);
+
+ /* Powerup the DSP */
+ dsp_on();
+
+ /* Bringup UART0 out of reset */
+ REG(UART0_PWREMU_MGMT) = 0x0000e003;
+
+ /* Enable GIO3.3V cells used for EMAC */
+ REG(VDD3P3V_PWDN) = 0;
+
+ /* Enable UART0 MUX lines */
+ REG(PINMUX1) |= 1;
+
+ /* Enable EMAC and AEMIF pins */
+ REG(PINMUX0) = 0x80000c1f;
+
+ /* Enable I2C pin Mux */
+ REG(PINMUX1) |= (1 << 7);
+
+ /* Set the Bus Priority Register to appropriate value */
+ REG(VBPR) = 0x20;
+
+ timer_init();
+
+ return(0);
+}
+
+int misc_init_r(void)
+{
+ u_int8_t tmp[20], buf[10];
+ int i = 0;
+ int clk = 0;
+
+ clk = ((REG(PLL2_PLLM) + 1) * 27) / ((REG(PLL2_DIV2) & 0x1f) + 1);
+
+ printf("ARM Clock: %dMHz\n", ((REG(PLL1_PLLM) + 1) * 27) / 2);
+ printf("DDR Clock: %dMHz\n", (clk / 2));
+
+ /* Configure I2C switch (PCA9543) to enable channel 0. */
+ tmp[0] = CFG_I2C_PCA9543_ENABLE_CH0;
+ if (i2c_write(CFG_I2C_PCA9543_ADDR, 0,
+ CFG_I2C_PCA9543_ADDR_LEN, tmp, 1))
+ printf("Write to MUX @ 0x%02x failed\n", CFG_I2C_PCA9543_ADDR);
+
+ /* Set Ethernet MAC address from EEPROM.
+ * We must read 8 bytes because data is stored in little-endian. */
+ if (i2c_read(CFG_I2C_EEPROM_ADDR, 0x05A8,
+ CFG_I2C_EEPROM_ADDR_LEN, buf, 8)) {
+ printf("Read from EEPROM @ 0x%02x failed\n",
+ CFG_I2C_EEPROM_ADDR);
+ } else {
+ tmp[0] = 0xff;
+ for (i = 0; i < 6; i++)
+ tmp[0] &= buf[i];
+
+ if ((tmp[0] != 0xff) && (getenv("ethaddr") == NULL)) {
+ sprintf((char *)&tmp[0],
+ "%02x:%02x:%02x:%02x:%02x:%02x",
+ buf[3], buf[2], buf[1], buf[0],
+ buf[7], buf[6]);
+ setenv("ethaddr", (char *)&tmp[0]);
+ }
+ }
+
+ if (!eth_hw_init()) {
+ printf("Ethernet init failed\n");
+ } else {
+ printf("ETH PHY: %s\n", phy.name);
+ }
+
+ return(0);
+}
+
+int dram_init(void)
+{
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+
+ return(0);
+}
--- /dev/null
+/*
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+ . = 0x00000000;
+ . = ALIGN(4);
+ .text :
+ {
+ cpu/arm926ejs/start.o (.text)
+ *(.text)
+ }
+ . = ALIGN(4);
+ .rodata : { *(.rodata) }
+ . = ALIGN(4);
+ .data : { *(.data) }
+ . = ALIGN(4);
+ .got : { *(.got) }
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+ . = ALIGN(4);
+ __bss_start = .;
+ .bss (NOLOAD) : { *(.bss) }
+ _end = .;
+}
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak *~ .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
# This is for $(obj).depend target
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend *~
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
+#include <common.h>
#include <asm/u-boot.h>
#include <asm/processor.h>
-#include <common.h>
#include "exbitgen.h"
void sdram_init(void);
* Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
*/
+#include <common.h>
#include <asm/u-boot.h>
#include <asm/processor.h>
#include <ppc4xx.h>
-#include <common.h>
flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
include $(TOPDIR)/config.mk
-LIB = lib$(BOARD).a
+LIB = $(obj)lib$(BOARD).a
OBJS = $(BOARD).o mii.o
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
#########################################################################
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
-sinclude .depend
+sinclude $(obj).depend
#########################################################################
.PHONY: distclean
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
/*
* The following are used to control the SPI chip selects for the SPI command.
*/
-#ifdef CONFIG_HARD_SPI
+#ifdef CONFIG_MPC8XXX_SPI
#define SPI_CS_MASK 0x80000000
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(OBJS) $(SOBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(OBJS) $(SOBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(OBJS) $(SOBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(OBJS) $(SOBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(OBJS) $(SOBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(OBJS) $(SOBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(OBJS) $(SOBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
.PHONY: distclean
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
.PHONY: distclean
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
REG 0x43FAC26C, 0 /* SDCLK */
REG 0x43FAC270, 0 /* CAS */
REG 0x43FAC274, 0 /* RAS */
- REG 0x43FAC27C, 0x1000 /* CS2 CSD0) */
+ REG 0x43FAC27C, 0x1000 /* CS2 (CSD0) */
REG 0x43FAC284, 0 /* DQM3 */
- REG 0x43FAC288, 0 /* DQM2, DQM1, DQM0, SD31-SD0, A25-A0, MA10 0x288..0x2DC) */
+ REG 0x43FAC288, 0 /* DQM2, DQM1, DQM0, SD31-SD0, A25-A0, MA10 (0x288..0x2DC) */
REG 0x43FAC28C, 0
REG 0x43FAC290, 0
REG 0x43FAC294, 0
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
REG 0x43FAC26C, 0 /* SDCLK */
REG 0x43FAC270, 0 /* CAS */
REG 0x43FAC274, 0 /* RAS */
- REG 0x43FAC27C, 0x1000 /* CS2 CSD0) */
+ REG 0x43FAC27C, 0x1000 /* CS2 (CSD0) */
REG 0x43FAC284, 0 /* DQM3 */
- REG 0x43FAC288, 0 /* DQM2, DQM1, DQM0, SD31-SD0, A25-A0, MA10 0x288..0x2DC) */
+ REG 0x43FAC288, 0 /* DQM2, DQM1, DQM0, SD31-SD0, A25-A0, MA10 (0x288..0x2DC) */
REG 0x43FAC28C, 0
REG 0x43FAC290, 0
REG 0x43FAC294, 0
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
OBJS := $(addprefix $(obj),$(OBJS))
$(LIB): $(obj).depend $(OBJS)
- $(AR) crv $@ $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
SOBJS := $(addprefix $(obj),$(SOBJTS))
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
*
*/
+#include <common.h>
#include <asm/u-boot.h>
#include <asm/processor.h>
-#include <common.h>
#include <command.h>
#include <configs/ML2.h>
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(OBJS) $(SOBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
include $(TOPDIR)/config.mk
-LIB = lib$(BOARD).a
+LIB = $(obj)lib$(BOARD).a
-OBJS := mpr2.o
+COBJS := mpr2.o
SOBJS := lowlevel_init.o
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
--include .depend
+sinclude $(obj).depend
#########################################################################
include $(TOPDIR)/config.mk
-LIB = lib$(BOARD).a
+LIB = $(obj)lib$(BOARD).a
-OBJS := ms7720se.o
+COBJS := ms7720se.o
SOBJS := lowlevel_init.o
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
--include .depend
+sinclude $(obj).depend
#########################################################################
int board_init(void)
{
-
return 0;
}
include $(TOPDIR)/config.mk
-LIB = lib$(BOARD).a
+LIB = $(obj)lib$(BOARD).a
-OBJS := ms7722se.o
+COBJS := ms7722se.o
SOBJS := lowlevel_init.o
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
--include .depend
+sinclude $(obj).depend
#########################################################################
/*
- * Copyright (C) 2007
+ * Copyright (C) 2007,2008
* Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
*
* Copyright (C) 2007
return 0;
}
-int dram_init (void)
+int dram_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
return 0;
}
-void led_set_state (unsigned short value)
+void led_set_state(unsigned short value)
{
- *((volatile unsigned short *) LED_BASE) = (value & 0xFF);
+ writew(value & 0xFF, LED_BASE);
}
#
include $(TOPDIR)/config.mk
-LIB = lib$(BOARD).a
+LIB = $(obj)lib$(BOARD).a
-OBJS := ms7750se.o
+COBJS := ms7750se.o
SOBJS := lowlevel_init.o
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
-#################################################################
+#########################################################################
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
--include .depend
+sinclude $(obj).depend
-#################################################################
+#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
msize = CFG_DDR_SIZE;
for (ddr_size = msize << 20, ddr_size_log2 = 0;
- (ddr_size > 1);
- ddr_size = ddr_size >> 1, ddr_size_log2++) {
+ (ddr_size > 1);
+ ddr_size = ddr_size >> 1, ddr_size_log2++) {
if (ddr_size & 1)
return -1;
}
int checkboard(void)
{
- puts("Board: Matrix Vision mvBlueLYNX-M7 " MV_VERSION "\n");
+ puts("Board: Matrix Vision mvBlueLYNX-M7\n");
return 0;
}
#ifdef CONFIG_HARD_SPI
int spi_cs_is_valid(unsigned int bus, unsigned int cs)
{
- return bus == 0 && cs == 0;
+ return bus == 0 && cs == 0;
}
void spi_cs_activate(struct spi_slave *slave)
{
- volatile gpio83xx_t *iopd = &((immap_t *)CFG_IMMR)->gpio[0];
+ volatile gpio83xx_t *iopd = &((immap_t *)CFG_IMMR)->gpio[0];
- iopd->dat &= ~MVBLM7_MMC_CS;
+ iopd->dat &= ~MVBLM7_MMC_CS;
}
void spi_cs_deactivate(struct spi_slave *slave)
{
- volatile gpio83xx_t *iopd = &((immap_t *)CFG_IMMR)->gpio[0];
+ volatile gpio83xx_t *iopd = &((immap_t *)CFG_IMMR)->gpio[0];
- iopd->dat |= ~MVBLM7_MMC_CS;
+ iopd->dat |= ~MVBLM7_MMC_CS;
}
#endif
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
$(obj)crcek.bin
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(OBJS) $(SOBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(OBJS) $(SOBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend *~
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend *~
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
#
include $(TOPDIR)/config.mk
-LIB = lib$(BOARD).a
+LIB = $(obj)lib$(BOARD).a
-OBJS := r2dplus.o
+COBJS := r2dplus.o
SOBJS := lowlevel_init.o
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
-#################################################################
+#########################################################################
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
--include .depend
+sinclude $(obj).depend
-#################################################################
+#########################################################################
#include <common.h>
#include <ide.h>
#include <asm/processor.h>
+#include <asm/io.h>
#include <asm/pci.h>
int checkboard(void)
return 0;
}
-int dram_init (void)
+int dram_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
return 0;
}
-#define FPGA_BASE 0xA4000000
-#define FPGA_CFCTL (FPGA_BASE + 0x04)
-#define FPGA_CFPOW (FPGA_BASE + 0x06)
-#define FPGA_CFCDINTCLR (FPGA_BASE + 0x2A)
+#define FPGA_BASE 0xA4000000
+#define FPGA_CFCTL (FPGA_BASE + 0x04)
+#define CFCTL_EN (0x432)
+#define FPGA_CFPOW (FPGA_BASE + 0x06)
+#define CFPOW_ON (0x02)
+#define FPGA_CFCDINTCLR (FPGA_BASE + 0x2A)
+#define CFCDINTCLR_EN (0x01)
-void ide_set_reset (int idereset)
+void ide_set_reset(int idereset)
{
/* if reset = 1 IDE reset will be asserted */
- if (idereset){
- (*(vu_short *)FPGA_CFCTL) = 0x432;
- (*(vu_short *)FPGA_CFPOW) |= 0x02;
- (*(vu_short *)FPGA_CFCDINTCLR) = 0x01;
+ if (idereset) {
+ outw(CFCTL_EN, FPGA_CFCTL); /* CF enable */
+ outw(inw(FPGA_CFPOW)|CFPOW_ON, FPGA_CFPOW); /* Power OM */
+ outw(CFCDINTCLR_EN, FPGA_CFCDINTCLR); /* Int clear */
}
}
-#if defined(CONFIG_PCI)
static struct pci_controller hose;
void pci_init_board(void)
{
- pci_sh7751_init( &hose );
+ pci_sh7751_init(&hose);
}
-#endif /* CONFIG_PCI */
include $(TOPDIR)/config.mk
-LIB = lib$(BOARD).a
+LIB = $(obj)lib$(BOARD).a
-OBJS := r7780mp.o
+COBJS := r7780mp.o
SOBJS := lowlevel_init.o
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
--include .depend
+sinclude $(obj).depend
#########################################################################
int board_init(void)
{
/* SCIF Enable */
- *(vu_short*)PHCR = 0x0000;
+ writew(0x0, PHCR);
return 0;
}
-int dram_init (void)
+int dram_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
return 0;
}
-void led_set_state (unsigned short value)
+void led_set_state(unsigned short value)
{
}
-void ide_set_reset (int idereset)
+void ide_set_reset(int idereset)
{
/* if reset = 1 IDE reset will be asserted */
- if (idereset){
- (*(vu_short *)FPGA_CFCTL) = 0x432;
+ if (idereset) {
+ writew(0x432, FPGA_CFCTL);
#if defined(CONFIG_R7780MP)
- (*(vu_short *)FPGA_CFPOW) |= 0x01;
+ writew(inw(FPGA_CFPOW)|0x01, FPGA_CFPOW);
#else
- (*(vu_short *)FPGA_CFPOW) |= 0x02;
+ writew(inw(FPGA_CFPOW)|0x02, FPGA_CFPOW);
#endif
- (*(vu_short *)FPGA_CFCDINTCLR) = 0x01;
+ writew(0x01, FPGA_CFCDINTCLR);
}
}
-#if defined(CONFIG_PCI)
static struct pci_controller hose;
void pci_init_board(void)
{
- pci_sh7780_init( &hose );
+ pci_sh7780_init(&hose);
}
-#endif
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
* MA 02111-1307 USA
*/
-#include <asm/u-boot.h>
#include <common.h>
+#include <asm/u-boot.h>
#include <ioports.h>
#include <mpc8260.h>
#include <i2c.h>
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend *~
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend *~
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(OBJS) $(SOBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(OBJS) $(SOBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
.PHONY: distclean
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
include $(TOPDIR)/config.mk
-LIB = lib$(BOARD).a
+LIB = $(obj)lib$(BOARD).a
-OBJS := sh7763rdp.o
+COBJS := sh7763rdp.o
SOBJS := lowlevel_init.o
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
--include .depend
+sinclude $(obj).depend
#########################################################################
WDTST_D: .long 0x5A000FFF
WDTCSR_D: .long 0xA5000000
WDTBST_D: .long 0x55000000
-
{
vu_short dat;
- *(vu_short *)(CPU_CMDREG) |= 0x0001;
+ /* Enable mode */
+ writew(inw(CPU_CMDREG)|0x0001, CPU_CMDREG);
/* GPIO Setting (eth1) */
- dat = *(vu_short *)(PSEL1);
- *(vu_short *)PSEL1 = ((dat & ~0xff00) | 0x2400);
- *(vu_short *)PFCR = 0;
- *(vu_short *)PGCR = 0;
- *(vu_short *)PHCR = 0;
+ dat = inw(PSEL1);
+ writew(((dat & ~0xff00) | 0x2400), PSEL1);
+ writew(0, PFCR);
+ writew(0, PGCR);
+ writew(0, PHCR);
return 0;
}
-int dram_init (void)
+int dram_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
return 0;
}
-void led_set_state (unsigned short value)
+void led_set_state(unsigned short value)
{
}
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
#
include $(TOPDIR)/config.mk
+
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
-$(shell mkdir -p $(obj)../../tqm8xx)
+$(shell mkdir -p $(obj)../../tqc/tqm8xx)
endif
LIB = $(obj)lib$(BOARD).a
COBJS = ccm.o flash.o fpga_ccm.o ../common/fpga.o \
- ../../tqm8xx/load_sernum_ethaddr.o
+ ../../tqc/tqm8xx/load_sernum_ethaddr.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
-$(LIB): $(obj).depend $(OBJS)
+$(LIB): $(OBJS)
$(AR) $(ARFLAGS) $@ $(OBJS)
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
#########################################################################
# defines $(obj).depend target
-
#include <common.h>
#include <mpc8xx.h>
#include <commproc.h>
#include <linux/stddef.h>
#define SYNC __asm__("sync")
-#define ALIGN(p, a) ((char *)(((uint32)(p)+(a)-1) & ~((uint32)(a)-1)))
+#define MY_ALIGN(p, a) ((char *)(((uint32)(p)+(a)-1) & ~((uint32)(a)-1)))
#define FALSE 1
#define TRUE 0
g_atm.csram = &csram[0];
memset(&(g_atm.csram), 0x00, g_atm.csram_size);
- g_atm.int_reload_ptr = (uint32 *)ALIGN(g_atm.csram, 4);
+ g_atm.int_reload_ptr = (uint32 *)MY_ALIGN(g_atm.csram, 4);
g_atm.rbd_base_ptr = (struct atm_bd_t *)(g_atm.int_reload_ptr + NUM_INT_ENTRIES);
g_atm.tbd_base_ptr = (struct atm_bd_t *)(g_atm.rbd_base_ptr + total_num_rbd);
#
include $(TOPDIR)/config.mk
+
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
-$(shell mkdir -p $(obj)../../tqm8xx/)
+$(shell mkdir -p $(obj)../../tqc/tqm8xx)
endif
LIB = $(obj)lib$(BOARD).a
COBJS = scm.o flash.o fpga_scm.o ../common/fpga.o \
- ../../tqm8xx/load_sernum_ethaddr.o
+ ../../tqc/tqm8xx/load_sernum_ethaddr.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
-$(LIB): $(obj).depend $(OBJS)
+$(LIB): $(OBJS)
$(AR) $(ARFLAGS) $@ $(OBJS)
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
#########################################################################
# defines $(obj).depend target
SOBJS := $(addprefix $(obj),$(SOBJTS))
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(OBJS) $(SOBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
/* UPM Table Configuration Code for FPGA access */
static const unsigned int UPMTableA[] =
{
- 0x00fcfc00, 0x00fcfc00, 0x00fcfc00, 0x00fcfc00, //Words 0 to 3
- 0x00fcfc00, 0x00fcfc00, 0x00fcfc00, 0x00fcfc05, //Words 4 to 7
- 0x00fcfc00, 0x00fcfc00, 0x00fcfc04, 0x00fcfc04, //Words 8 to 11
- 0x00fcfc04, 0x00fcfc04, 0x00fcfc04, 0x00fcfc04, //Words 12 to 15
- 0x00fcfc04, 0x00fcfc04, 0x00fcfc00, 0xfffffc00, //Words 16 to 19
- 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, //Words 20 to 23
- 0x0ffffc00, 0x0ffffc00, 0x0ffffc00, 0x00f3fc04, //Words 24 to 27
- 0x0ffffc00, 0xfffffc01, 0xfffffc00, 0xfffffc01, //Words 28 to 31
- 0x0ffffc00, 0x00f3fc04, 0x00f3fc04, 0x00f3fc04, //Words 32 to 35
- 0x00f3fc04, 0x00f3fc04, 0x00f3fc04, 0x00f3fc04, //Words 36 to 39
- 0x00f3fc04, 0x0ffffc00, 0xfffffc00, 0xfffffc00, //Words 40 to 43
- 0xfffffc01, 0xfffffc00, 0xfffffc00, 0xfffffc01, //Words 44 to 47
- 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, //Words 48 to 51
- 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, //Words 52 to 55
- 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, //Words 56 to 59
- 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01 //Words 60 to 63
+ 0x00fcfc00, 0x00fcfc00, 0x00fcfc00, 0x00fcfc00, /* Words 0 to 3 */
+ 0x00fcfc00, 0x00fcfc00, 0x00fcfc00, 0x00fcfc05, /* Words 4 to 7 */
+ 0x00fcfc00, 0x00fcfc00, 0x00fcfc04, 0x00fcfc04, /* Words 8 to 11 */
+ 0x00fcfc04, 0x00fcfc04, 0x00fcfc04, 0x00fcfc04, /* Words 12 to 15 */
+ 0x00fcfc04, 0x00fcfc04, 0x00fcfc00, 0xfffffc00, /* Words 16 to 19 */
+ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, /* Words 20 to 23 */
+ 0x0ffffc00, 0x0ffffc00, 0x0ffffc00, 0x00f3fc04, /* Words 24 to 27 */
+ 0x0ffffc00, 0xfffffc01, 0xfffffc00, 0xfffffc01, /* Words 28 to 31 */
+ 0x0ffffc00, 0x00f3fc04, 0x00f3fc04, 0x00f3fc04, /* Words 32 to 35 */
+ 0x00f3fc04, 0x00f3fc04, 0x00f3fc04, 0x00f3fc04, /* Words 36 to 39 */
+ 0x00f3fc04, 0x0ffffc00, 0xfffffc00, 0xfffffc00, /* Words 40 to 43 */
+ 0xfffffc01, 0xfffffc00, 0xfffffc00, 0xfffffc01, /* Words 44 to 47 */
+ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, /* Words 48 to 51 */
+ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, /* Words 52 to 55 */
+ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, /* Words 56 to 59 */
+ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01 /* Words 60 to 63 */
};
#endif
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(OBJS) $(SOBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(OBJS) $(SOBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
cam5200_flash.o: cam5200_flash.c
$(CC) $(CFLAGS) -fno-strict-aliasing -c -o $@ $<
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(OBJS) $(SOBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
/* UPM pattern for bus clock = 25 MHz */
static const u32 upm_patt_25[] = {
- /* Offset *//* UPM Read Single RAM array entry -> NAND Read Data */
+ /* Offset */ /* UPM Read Single RAM array entry -> NAND Read Data */
/* 0x00 */ 0x0ff32000, 0x0fa32000, 0x3fb32005, 0xfffffc00,
/* 0x04 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00,
/* UPM pattern for bus clock = 33.3 MHz */
static const u32 upm_patt_33[] = {
- /* Offset *//* UPM Read Single RAM array entry -> NAND Read Data */
+ /* Offset */ /* UPM Read Single RAM array entry -> NAND Read Data */
/* 0x00 */ 0x0ff32000, 0x0fa32100, 0x3fb32005, 0xfffffc00,
/* 0x04 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00,
/* UPM pattern for bus clock = 41.7 MHz */
static const u32 upm_patt_42[] = {
- /* Offset *//* UPM Read Single RAM array entry -> NAND Read Data */
+ /* Offset */ /* UPM Read Single RAM array entry -> NAND Read Data */
/* 0x00 */ 0x0ff32000, 0x0fa32100, 0x3fb32005, 0xfffffc00,
/* 0x04 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00,
/* UPM pattern for bus clock = 50 MHz */
static const u32 upm_patt_50[] = {
- /* Offset *//* UPM Read Single RAM array entry -> NAND Read Data */
+ /* Offset */ /* UPM Read Single RAM array entry -> NAND Read Data */
/* 0x00 */ 0x0ff33000, 0x0fa33100, 0x0fa33005, 0xfffffc00,
/* 0x04 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00,
/* UPM pattern for bus clock = 66.7 MHz */
static const u32 upm_patt_67[] = {
- /* Offset *//* UPM Read Single RAM array entry -> NAND Read Data */
+ /* Offset */ /* UPM Read Single RAM array entry -> NAND Read Data */
/* 0x00 */ 0x0ff33000, 0x0fe33000, 0x0fa33100, 0x0fa33000,
/* 0x04 */ 0x0fa33005, 0xfffffc00, 0xfffffc00, 0xfffffc00,
/* UPM pattern for bus clock = 83.3 MHz */
static const u32 upm_patt_83[] = {
- /* Offset *//* UPM Read Single RAM array entry -> NAND Read Data */
+ /* Offset */ /* UPM Read Single RAM array entry -> NAND Read Data */
/* 0x00 */ 0x0ff33000, 0x0fe33000, 0x0fa33100, 0x0fa33000,
/* 0x04 */ 0x0fa33005, 0xfffffc00, 0xfffffc00, 0xfffffc00,
/* UPM pattern for bus clock = 100 MHz */
static const u32 upm_patt_100[] = {
- /* Offset *//* UPM Read Single RAM array entry -> NAND Read Data */
+ /* Offset */ /* UPM Read Single RAM array entry -> NAND Read Data */
/* 0x00 */ 0x0ff33100, 0x0fe33000, 0x0fa33200, 0x0fa33000,
/* 0x04 */ 0x0fa33005, 0xfffffc00, 0xfffffc00, 0xfffffc00,
/* UPM pattern for bus clock = 133.3 MHz */
static const u32 upm_patt_133[] = {
- /* Offset *//* UPM Read Single RAM array entry -> NAND Read Data */
+ /* Offset */ /* UPM Read Single RAM array entry -> NAND Read Data */
/* 0x00 */ 0x0ff33100, 0x0fe33000, 0x0fa33300, 0x0fa33000,
/* 0x04 */ 0x0fa33000, 0x0fa33005, 0xfffffc00, 0xfffffc00,
/* UPM pattern for bus clock = 166.7 MHz */
static const u32 upm_patt_167[] = {
- /* Offset *//* UPM Read Single RAM array entry -> NAND Read Data */
+ /* Offset */ /* UPM Read Single RAM array entry -> NAND Read Data */
/* 0x00 */ 0x0ff33200, 0x0fe33000, 0x0fa33300, 0x0fa33300,
/* 0x04 */ 0x0fa33005, 0xfffffc00, 0xfffffc00, 0xfffffc00,
rm -f $(SOBJS) $(OBJS) $(OBJS_FKT)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
*
*/
+#include <common.h>
#include <asm/u-boot.h>
#include <asm/processor.h>
-#include <common.h>
#include <command.h>
#include <config.h>
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
#endif
print_num ("bootflags", bd->bi_bootflags );
#if defined(CONFIG_405GP) || defined(CONFIG_405CR) || \
- defined(CONFIG_405EP) || defined(CONFIG_XILINX_ML300) || \
+ defined(CONFIG_405EP) || defined(CONFIG_XILINX_405) || \
defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
defined(CONFIG_440SP) || defined(CONFIG_440SPE)
print_str ("procfreq", strmhz(buf, bd->bi_procfreq));
print_str ("plb_busfreq", strmhz(buf, bd->bi_plb_busfreq));
-#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || defined(CONFIG_XILINX_ML300) || \
+#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || defined(CONFIG_XILINX_405) || \
defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SPE) || \
defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
print_str ("pci_busfreq", strmhz(buf, bd->bi_pci_busfreq));
#endif
-#else /* ! CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_ML300, CONFIG_440EP CONFIG_440GR */
+#else /* ! CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */
#if defined(CONFIG_CPM2)
print_str ("vco", strmhz(buf, bd->bi_vco));
print_str ("sccfreq", strmhz(buf, bd->bi_sccfreq));
print_str ("cpmfreq", strmhz(buf, bd->bi_cpmfreq));
#endif
print_str ("busfreq", strmhz(buf, bd->bi_busfreq));
-#endif /* CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_ML300, CONFIG_440EP CONFIG_440GR */
+#endif /* CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */
#if defined(CONFIG_MPC8220)
print_str ("inpfreq", strmhz(buf, bd->bi_inpfreq));
print_str ("flbfreq", strmhz(buf, bd->bi_flbfreq));
image_header_t *hdr;
int rcode = 0;
#if defined(CONFIG_FIT)
- const void *fit_hdr;
+ const void *fit_hdr = NULL;
#endif
show_boot_progress (34);
#if defined(CONFIG_FIT)
case IMAGE_FORMAT_FIT:
fit_hdr = (const void *)addr;
- if (!fit_check_format (fit_hdr)) {
- show_boot_progress (-130);
- puts ("** Bad FIT image format\n");
- return 1;
- }
- show_boot_progress (131);
puts ("Fit image detected...\n");
cnt = fit_get_size (fit_hdr);
#if defined(CONFIG_FIT)
/* This cannot be done earlier, we need complete FIT image in RAM first */
- if (genimg_get_format ((void *)addr) == IMAGE_FORMAT_FIT)
- fit_print_contents ((const void *)addr);
+ if (genimg_get_format ((void *)addr) == IMAGE_FORMAT_FIT) {
+ if (!fit_check_format (fit_hdr)) {
+ show_boot_progress (-130);
+ puts ("** Bad FIT image format\n");
+ return 1;
+ }
+ show_boot_progress (131);
+ fit_print_contents (fit_hdr);
+ }
#endif
/* Loading ok, update default load address */
char *ep;
int rcode = 0;
#if defined(CONFIG_FIT)
- const void *fit_hdr;
+ const void *fit_hdr = NULL;
#endif
switch (argc) {
#if defined(CONFIG_FIT)
case IMAGE_FORMAT_FIT:
fit_hdr = (const void *)addr;
- if (!fit_check_format (fit_hdr)) {
- puts ("** Bad FIT image format\n");
- return 1;
- }
puts ("Fit image detected...\n");
imsize = fit_get_size (fit_hdr);
#if defined(CONFIG_FIT)
/* This cannot be done earlier, we need complete FIT image in RAM first */
- if (genimg_get_format ((void *)addr) == IMAGE_FORMAT_FIT)
- fit_print_contents ((const void *)addr);
+ if (genimg_get_format ((void *)addr) == IMAGE_FORMAT_FIT) {
+ if (!fit_check_format (fit_hdr)) {
+ puts ("** Bad FIT image format\n");
+ return 1;
+ }
+ fit_print_contents (fit_hdr);
+ }
#endif
/* Loading ok, update default load address */
image_header_t *hdr;
int rcode = 0;
#if defined(CONFIG_FIT)
- const void *fit_hdr;
+ const void *fit_hdr = NULL;
#endif
show_boot_progress (41);
#if defined(CONFIG_FIT)
case IMAGE_FORMAT_FIT:
fit_hdr = (const void *)addr;
- if (!fit_check_format (fit_hdr)) {
- show_boot_progress (-140);
- puts ("** Bad FIT image format\n");
- return 1;
- }
- show_boot_progress (141);
puts ("Fit image detected...\n");
cnt = fit_get_size (fit_hdr);
#if defined(CONFIG_FIT)
/* This cannot be done earlier, we need complete FIT image in RAM first */
- if (genimg_get_format ((void *)addr) == IMAGE_FORMAT_FIT)
- fit_print_contents ((const void *)addr);
+ if (genimg_get_format ((void *)addr) == IMAGE_FORMAT_FIT) {
+ if (!fit_check_format (fit_hdr)) {
+ show_boot_progress (-140);
+ puts ("** Bad FIT image format\n");
+ return 1;
+ }
+ show_boot_progress (141);
+ fit_print_contents (fit_hdr);
+ }
#endif
/* Loading ok, update default load address */
image_header_t *hdr;
int jffs2 = 0;
#if defined(CONFIG_FIT)
- const void *fit_hdr;
+ const void *fit_hdr = NULL;
#endif
s = strchr(cmd, '.');
#if defined(CONFIG_FIT)
case IMAGE_FORMAT_FIT:
fit_hdr = (const void *)addr;
- if (!fit_check_format (fit_hdr)) {
- show_boot_progress (-150);
- puts ("** Bad FIT image format\n");
- return 1;
- }
- show_boot_progress (151);
puts ("Fit image detected...\n");
cnt = fit_get_size (fit_hdr);
#if defined(CONFIG_FIT)
/* This cannot be done earlier, we need complete FIT image in RAM first */
- if (genimg_get_format ((void *)addr) == IMAGE_FORMAT_FIT)
- fit_print_contents ((const void *)addr);
+ if (genimg_get_format ((void *)addr) == IMAGE_FORMAT_FIT) {
+ if (!fit_check_format (fit_hdr)) {
+ show_boot_progress (-150);
+ puts ("** Bad FIT image format\n");
+ return 1;
+ }
+ show_boot_progress (151);
+ fit_print_contents (fit_hdr);
+ }
#endif
/* Loading ok, update default load address */
image_header_t *hdr;
int rcode = 0;
#if defined(CONFIG_FIT)
- const void *fit_hdr;
+ const void *fit_hdr = NULL;
#endif
show_boot_progress (52);
#if defined(CONFIG_FIT)
case IMAGE_FORMAT_FIT:
fit_hdr = (const void *)addr;
- if (!fit_check_format (fit_hdr)) {
- show_boot_progress (-150);
- puts ("** Bad FIT image format\n");
- return 1;
- }
- show_boot_progress (151);
puts ("Fit image detected...\n");
cnt = fit_get_size (fit_hdr);
#if defined(CONFIG_FIT)
/* This cannot be done earlier, we need complete FIT image in RAM first */
- if (genimg_get_format ((void *)addr) == IMAGE_FORMAT_FIT)
- fit_print_contents ((const void *)addr);
+ if (genimg_get_format ((void *)addr) == IMAGE_FORMAT_FIT) {
+ if (!fit_check_format (fit_hdr)) {
+ show_boot_progress (-150);
+ puts ("** Bad FIT image format\n");
+ return 1;
+ }
+ show_boot_progress (151);
+ fit_print_contents (fit_hdr);
+ }
#endif
/* Loading ok, update default load address */
* Ethernet Address and serial# can be set only once,
* ver is readonly.
*/
+ if (
#ifdef CONFIG_HAS_UID
/* Allow serial# forced overwrite with 0xdeaf4add flag */
- if ( ((strcmp (name, "serial#") == 0) && (flag != 0xdeaf4add)) ||
+ ((strcmp (name, "serial#") == 0) && (flag != 0xdeaf4add)) ||
#else
- if ( (strcmp (name, "serial#") == 0) ||
+ (strcmp (name, "serial#") == 0) ||
#endif
((strcmp (name, "ethaddr") == 0)
#if defined(CONFIG_OVERWRITE_ETHADDR_ONCE) && defined(CONFIG_ETHADDR)
return 0;
}
-void setenv (char *varname, char *varvalue)
+int setenv (char *varname, char *varvalue)
{
char *argv[4] = { "setenv", varname, varvalue, NULL };
if (varvalue == NULL)
- _do_setenv (0, 2, argv);
+ return _do_setenv (0, 2, argv);
else
- _do_setenv (0, 3, argv);
+ return _do_setenv (0, 3, argv);
}
#ifdef CONFIG_HAS_UID
image_header_t *hdr;
int rcode = 0;
#if defined(CONFIG_FIT)
- const void *fit_hdr;
+ const void *fit_hdr = NULL;
#endif
switch (argc) {
#if defined(CONFIG_FIT)
case IMAGE_FORMAT_FIT:
fit_hdr = (const void *)addr;
- if (!fit_check_format (fit_hdr)) {
- puts ("** Bad FIT image format\n");
- return 1;
- }
puts ("Fit image detected...\n");
cnt = fit_get_size (fit_hdr);
#if defined(CONFIG_FIT)
/* This cannot be done earlier, we need complete FIT image in RAM first */
- if (genimg_get_format ((void *)addr) == IMAGE_FORMAT_FIT)
- fit_print_contents ((const void *)addr);
+ if (genimg_get_format ((void *)addr) == IMAGE_FORMAT_FIT) {
+ if (!fit_check_format (fit_hdr)) {
+ puts ("** Bad FIT image format\n");
+ return 1;
+ }
+ fit_print_contents (fit_hdr);
+ }
#endif
/* Loading ok, update default load address */
image_header_t *hdr;
block_dev_desc_t *stor_dev;
#if defined(CONFIG_FIT)
- const void *fit_hdr;
+ const void *fit_hdr = NULL;
#endif
switch (argc) {
#if defined(CONFIG_FIT)
case IMAGE_FORMAT_FIT:
fit_hdr = (const void *)addr;
- if (!fit_check_format (fit_hdr)) {
- puts ("** Bad FIT image format\n");
- return 1;
- }
puts ("Fit image detected...\n");
cnt = fit_get_size (fit_hdr);
#if defined(CONFIG_FIT)
/* This cannot be done earlier, we need complete FIT image in RAM first */
- if (genimg_get_format ((void *)addr) == IMAGE_FORMAT_FIT)
- fit_print_contents ((const void *)addr);
+ if (genimg_get_format ((void *)addr) == IMAGE_FORMAT_FIT) {
+ if (!fit_check_format (fit_hdr)) {
+ puts ("** Bad FIT image format\n");
+ return 1;
+ }
+ fit_print_contents (fit_hdr);
+ }
#endif
/* Loading ok, update default load address */
size_t total;
int ret = 0;
nand_erase_options_t nand_erase_options;
-
+
nand_erase_options.length = CFG_ENV_RANGE;
nand_erase_options.quiet = 0;
nand_erase_options.jffs2 = 0;
}
#ifdef CONFIG_OF_STDOUT_VIA_ALIAS
-static int fdt_fixup_stdout(void *fdt, int choosenoff)
+static int fdt_fixup_stdout(void *fdt, int chosenoff)
{
int err = 0;
#ifdef CONFIG_CONS_INDEX
err = -FDT_ERR_NOSPACE;
if (p) {
memcpy(p, path, len);
- err = fdt_setprop(fdt, choosenoff,
+ err = fdt_setprop(fdt, chosenoff,
"linux,stdout-path", p, len);
free(p);
}
CFLAGS := $(CPPFLAGS) -Wall -Wstrict-prototypes
endif
+CFLAGS += $(call cc-option,-fno-stack-protector)
+
# avoid trigraph warnings while parsing pci.h (produced by NIOS gcc-2.9)
# this option have to be placed behind -Wall -- that's why it is here
ifeq ($(ARCH),nios)
#define URXD_FRMERR (1<<12)
#define URXD_BRK (1<<11)
#define URXD_PRERR (1<<10)
+#define URXD_RX_DATA (0xFF)
#define UCR1_ADEN (1<<15) /* Auto dectect interrupt */
#define UCR1_ADBR (1<<14) /* Auto detect baud rate */
#define UCR1_TRDYEN (1<<13) /* Transmitter ready interrupt enable */
int serial_getc (void)
{
while (__REG(UART_PHYS + UTS) & UTS_RXEMPTY);
- return __REG(UART_PHYS + URXD);
+ return (__REG(UART_PHYS + URXD) & URXD_RX_DATA); /* mask out status from upper word */
}
void serial_putc (const char c)
#ifdef AT32AP700x_CHIP_HAS_SPI
void gpio_enable_spi0(unsigned long cs_mask)
{
- u32 pa_mask = 0;
-
gpio_select_periph_A(GPIO_PIN_PA0, 0); /* MISO */
gpio_select_periph_A(GPIO_PIN_PA1, 0); /* MOSI */
gpio_select_periph_A(GPIO_PIN_PA2, 0); /* SCK */
- if (cs_mask & (1 << 0))
- pa_mask |= 1 << 3; /* NPCS0 */
- if (cs_mask & (1 << 1))
- pa_mask |= 1 << 4; /* NPCS1 */
- if (cs_mask & (1 << 2))
- pa_mask |= 1 << 5; /* NPCS2 */
- if (cs_mask & (1 << 3))
- pa_mask |= 1 << 20; /* NPCS3 */
-
- __raw_writel(pa_mask, PIOA_BASE + 0x00);
- __raw_writel(pa_mask, PIOA_BASE + 0x30);
- __raw_writel(pa_mask, PIOA_BASE + 0x10);
+ /* Set up NPCSx as GPIO outputs, initially high */
+ if (cs_mask & (1 << 0)) {
+ gpio_set_value(GPIO_PIN_PA3, 1);
+ gpio_select_pio(GPIO_PIN_PA3, GPIOF_OUTPUT);
+ }
+ if (cs_mask & (1 << 1)) {
+ gpio_set_value(GPIO_PIN_PA4, 1);
+ gpio_select_pio(GPIO_PIN_PA4, GPIOF_OUTPUT);
+ }
+ if (cs_mask & (1 << 2)) {
+ gpio_set_value(GPIO_PIN_PA5, 1);
+ gpio_select_pio(GPIO_PIN_PA5, GPIOF_OUTPUT);
+ }
+ if (cs_mask & (1 << 3)) {
+ gpio_set_value(GPIO_PIN_PA20, 1);
+ gpio_select_pio(GPIO_PIN_PA20, GPIOF_OUTPUT);
+ }
}
void gpio_enable_spi1(unsigned long cs_mask)
gpio_select_periph_B(GPIO_PIN_PB1, 0); /* MOSI */
gpio_select_periph_B(GPIO_PIN_PB5, 0); /* SCK */
- if (cs_mask & (1 << 0))
- gpio_select_periph_B(GPIO_PIN_PB2, 0); /* NPCS0 */
- if (cs_mask & (1 << 1))
- gpio_select_periph_B(GPIO_PIN_PB3, 0); /* NPCS1 */
- if (cs_mask & (1 << 2))
- gpio_select_periph_B(GPIO_PIN_PB4, 0); /* NPCS2 */
- if (cs_mask & (1 << 3))
- gpio_select_periph_A(GPIO_PIN_PA27, 0); /* NPCS3 */
+ /* Set up NPCSx as GPIO outputs, initially high */
+ if (cs_mask & (1 << 0)) {
+ gpio_set_value(GPIO_PIN_PB2, 1);
+ gpio_select_pio(GPIO_PIN_PB2, GPIOF_OUTPUT);
+ }
+ if (cs_mask & (1 << 1)) {
+ gpio_set_value(GPIO_PIN_PB3, 1);
+ gpio_select_pio(GPIO_PIN_PB3, GPIOF_OUTPUT);
+ }
+ if (cs_mask & (1 << 2)) {
+ gpio_set_value(GPIO_PIN_PB4, 1);
+ gpio_select_pio(GPIO_PIN_PB4, GPIOF_OUTPUT);
+ }
+ if (cs_mask & (1 << 3)) {
+ gpio_set_value(GPIO_PIN_PA27, 1);
+ gpio_select_pio(GPIO_PIN_PA27, GPIOF_OUTPUT);
+ }
}
#endif
mmc_idle_cards();
for (i = 0; i < 1000; i++) {
- ret = mmc_acmd(MMC_ACMD_SD_SEND_OP_COND, CFG_MMC_OP_COND,
+ ret = mmc_acmd(SD_CMD_APP_SEND_OP_COND, CFG_MMC_OP_COND,
resp, R3 | NID);
if (ret || (resp[0] & 0x80000000))
break;
mmc_dump_cid(cid);
/* Get RCA of the card that responded */
- ret = mmc_cmd(MMC_CMD_SD_SEND_RELATIVE_ADDR, 0, resp, R6 | NCR);
+ ret = mmc_cmd(SD_CMD_SEND_RELATIVE_ADDR, 0, resp, R6 | NCR);
if (ret)
return ret;
else
pio2_writel(base, PUDR, mask);
}
+
+void gpio_select_pio(unsigned int pin, unsigned long gpiof_flags)
+{
+ void *base = gpio_pin_to_addr(pin);
+ uint32_t mask = 1 << (pin & 0x1f);
+
+ if (!base)
+ panic("Invalid GPIO pin %u\n", pin);
+
+ if (gpiof_flags & GPIOF_OUTPUT) {
+ if (gpiof_flags & GPIOF_MULTIDRV)
+ pio2_writel(base, MDER, mask);
+ else
+ pio2_writel(base, MDDR, mask);
+ pio2_writel(base, PUDR, mask);
+ pio2_writel(base, OER, mask);
+ } else {
+ if (gpiof_flags & GPIOF_PULLUP)
+ pio2_writel(base, PUER, mask);
+ else
+ pio2_writel(base, PUDR, mask);
+ if (gpiof_flags & GPIOF_DEGLITCH)
+ pio2_writel(base, IFER, mask);
+ else
+ pio2_writel(base, IFDR, mask);
+ pio2_writel(base, ODR, mask);
+ }
+
+ pio2_writel(base, PER, mask);
+}
+
+void gpio_set_value(unsigned int pin, int value)
+{
+ void *base = gpio_pin_to_addr(pin);
+ uint32_t mask = 1 << (pin & 0x1f);
+
+ if (!base)
+ panic("Invalid GPIO pin %u\n", pin);
+
+ if (value)
+ pio2_writel(base, SODR, mask);
+ else
+ pio2_writel(base, CODR, mask);
+}
+
+int gpio_get_value(unsigned int pin)
+{
+ void *base = gpio_pin_to_addr(pin);
+ int value;
+
+ if (!base)
+ panic("Invalid GPIO pin %u\n", pin);
+
+ value = pio2_readl(base, PDSR);
+ return (value >> (pin & 0x1f)) & 1;
+}
{
char * cpu_path = "/cpus/" OF_CPU;
+#if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\
+ defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3)
+ fdt_fixup_ethernet(blob, bd);
+#endif
+
do_fixup_by_path_u32(blob, cpu_path, "bus-frequency", bd->bi_busfreq, 1);
do_fixup_by_path_u32(blob, cpu_path, "timebase-frequency", OF_TBCLK, 1);
do_fixup_by_path_u32(blob, cpu_path, "clock-frequency", bd->bi_intfreq, 1);
char buf[32];
int i;
-#define CPU_TYPE_ENTRY(x) {#x, SPR_##x}
const struct cpu_type {
char name[15];
u32 partid;
/* System General Purpose Register */
#ifdef CFG_SICRH
+#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC8313)
+ /* regarding to MPC34x manual rev.1 bits 28..29 must be preserved */
+ im->sysconf.sicrh = (im->sysconf.sicrh & 0x0000000C) | CFG_SICRH;
+#else
im->sysconf.sicrh = CFG_SICRH;
#endif
+#endif
#ifdef CFG_SICRL
im->sysconf.sicrl = CFG_SICRL;
#endif
/* Find the address for the dummy write transaction */
for (brp = &lbc->br0, orp = &lbc->or0, i = 0; i < 8;
i++, brp += 2, orp += 2) {
-
+
/* Look for a valid BR with selected UPM */
if ((in_be32(brp) & (BR_V | upmmask)) == (BR_V | upmmask)) {
dummy = (volatile u8*)(in_be32(brp) >> BR_BA_SHIFT);
void
cpu_init_f (void)
{
-#if defined(CONFIG_WATCHDOG)
- unsigned long val;
+#if defined(CONFIG_WATCHDOG) || defined(CONFIG_460EX)
+ u32 val;
#endif
reconfigure_pll(CFG_PLL_RECONFIG);
reset_4xx_watchdog();
#endif /* CONFIG_WATCHDOG */
+
+#if defined(CONFIG_460EX)
+ /*
+ * Set SDR0_AHB_CFG[A2P_INCR4] (bit 24) and
+ * clear SDR0_AHB_CFG[A2P_PROT2] (bit 25) for a new 460EX errata
+ * regarding concurrent use of AHB USB OTG, USB 2.0 host and SATA
+ */
+ mfsdr(SDR0_AHB_CFG, val);
+ val |= 0x80;
+ val &= ~0x40;
+ mtsdr(SDR0_AHB_CFG, val);
+ mfsdr(SDR0_USB2HOST_CFG, val);
+ val &= ~0xf00;
+ val |= 0x400;
+ mtsdr(SDR0_USB2HOST_CFG, val);
+#endif /* CONFIG_460EX */
}
/*
/*
- * (C) Copyright 2007
+ * (C) Copyright 2007-2008
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* See file CREDITS for list of people who contributed to this
}
mask = 0x80000000 >> pin;
- mask2 = 0xc0000000 >> (pin2 << 1);
+ mask2 = 0xc0000000 >> pin2;
/* first set TCR to 0 */
out_be32((void *)GPIO0_TCR + offs, in_be32((void *)GPIO0_TCR + offs) & ~mask);
return sys_info.freqOPB;
}
-#elif defined(CONFIG_XILINX_ML300)
+#elif defined(CONFIG_XILINX_405)
extern void get_sys_info (sys_info_t * sysInfo);
extern ulong get_PCI_freq (void);
MMC_RDTO = 0xffff;
MMC_NOB = 1;
MMC_BLKLEN = len;
- mmc_cmd(MMC_CMD_READ_BLOCK, argh, argl,
+ mmc_cmd(MMC_CMD_READ_SINGLE_BLOCK, argh, argl,
MMC_CMDAT_R1 | MMC_CMDAT_READ | MMC_CMDAT_BLOCK |
MMC_CMDAT_DATA_EN);
MMC_SPI = MMC_SPI_DISABLE;
/* reset */
- mmc_cmd(MMC_CMD_RESET, 0, 0, MMC_CMDAT_INIT | MMC_CMDAT_R0);
+ mmc_cmd(MMC_CMD_GO_IDLE_STATE, 0, 0, MMC_CMDAT_INIT | MMC_CMDAT_R0);
udelay(200000);
retries = 3;
while (retries--) {
break;
}
- resp = mmc_cmd(SD_CMD_APP_OP_COND, 0x0020, 0, MMC_CMDAT_R3 | (retries < 2 ? 0 : MMC_CMDAT_INIT)); /* Select 3.2-3.3 and 3.3-3.4V */
+ /* Select 3.2-3.3 and 3.3-3.4V */
+ resp = mmc_cmd(SD_CMD_APP_SEND_OP_COND, 0x0020, 0,
+ MMC_CMDAT_R3 | (retries < 2 ? 0
+ : MMC_CMDAT_INIT));
if (resp[0] & 0x80000000) {
mmc_dev.if_type = IF_TYPE_SD;
debug("Detected SD card\n");
memcpy(cid_resp, resp, sizeof(cid_resp));
/* MMC exists, get CSD too */
- resp = mmc_cmd(MMC_CMD_SET_RCA, 0, 0, MMC_CMDAT_R1);
+ resp = mmc_cmd(MMC_CMD_SET_RELATIVE_ADDR, 0, 0, MMC_CMDAT_R1);
if (IF_TYPE_SD == mmc_dev.if_type)
rca = ((resp[0] & 0xffff0000) >> 16);
resp = mmc_cmd(MMC_CMD_SEND_CSD, rca, 0, MMC_CMDAT_R2);
LIB = $(obj)lib$(CPU).a
-START = start.o
-OBJS = cpu.o interrupts.o watchdog.o time.o cache.o
+SOBJS = start.o
+COBJS = cpu.o interrupts.o watchdog.o time.o cache.o
-all: .depend $(START) $(LIB)
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
-$(LIB): $(OBJS)
- $(AR) crv $@ $(OBJS)
+$(LIB): $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
-.depend: Makefile $(START:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(START:.o=.S) $(OBJS:.o=.c) > $@
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
-sinclude .depend
+sinclude $(obj).depend
#########################################################################
LIB = $(obj)lib$(CPU).a
-START = start.o
-OBJS = cpu.o interrupts.o watchdog.o time.o cache.o
+SOBJS = start.o
+COBJS = cpu.o interrupts.o watchdog.o time.o cache.o
-all: .depend $(START) $(LIB)
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
-$(LIB): $(OBJS)
- $(AR) crv $@ $(OBJS)
+$(LIB): $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
-.depend: Makefile $(START:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(START:.o=.S) $(OBJS:.o=.c) > $@
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
-sinclude .depend
+sinclude $(obj).depend
#########################################################################
2 System Components
-2.1 CPU
+2.1 CPU
Freescale MPC8343VRAGDB CPU running at 400MHz core and 266MHz csb.
512MByte DDR-II memory @ 133MHz.
8 MByte Nor Flash on local bus.
2.2 PCI
A miniPCI Type-III socket is present. PCI clock fixed at 66MHz.
-
+
2.3 FPGA
Altera Cyclone-II EP2C20/35 with PCI DMA engines.
Connects to dual Matrix Vision specific CCD/CMOS sensor interfaces.
2. Initrd - name is stored in "initrd_name"
3. device tree blob - name is stored in "dtb_name"
Fallback files are the flash versions.
-
COBJS-y += ata_piix.o
COBJS-$(CONFIG_FSL_SATA) += fsl_sata.o
COBJS-$(CONFIG_LIBATA) += libata.o
+COBJS-$(CONFIG_SATA_SIL3114) += sata_sil3114.o
COBJS-y += sil680.o
COBJS-y += sym53c8xx.o
COBJS-y += systemace.o
else
printf(" %s ", sata->name);
+ /* Wait PHY RDY signal changed for 500ms */
+ ata_wait_register(®->hstatus, HSTATUS_PHY_RDY,
+ HSTATUS_PHY_RDY, 500);
+
/* Check PHYRDY */
val32 = in_le32(®->hstatus);
if (val32 & HSTATUS_PHY_RDY) {
return -1;
}
+ /* Wait for signature updated, which is 1st D2H */
+ ata_wait_register(®->hstatus, HSTATUS_SIGNATURE,
+ HSTATUS_SIGNATURE, 10000);
+
if (val32 & HSTATUS_SIGNATURE) {
sig = in_le32(®->sig);
debug("Signature updated, the sig =%08x\n\r", sig);
--- /dev/null
+/*
+ * Copyright (C) Excito Elektronik i Skåne AB, All rights reserved.
+ * Author: Tor Krill <tor@excito.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ * This is a driver for Silicon Image sil3114 sata chip modelled on
+ * the ata_piix driver
+ */
+
+#include <common.h>
+#include <pci.h>
+#include <command.h>
+#include <config.h>
+#include <asm/byteorder.h>
+#include <asm/io.h>
+#include <ide.h>
+#include <libata.h>
+#include "sata_sil3114.h"
+
+/* Convert sectorsize to wordsize */
+#define ATA_SECTOR_WORDS (ATA_SECT_SIZE/2)
+
+/* Forwards */
+u8 sil3114_spin_up (int num);
+u8 sil3114_spin_down (int num);
+static int sata_bus_softreset (int num);
+static void sata_identify (int num, int dev);
+static u8 check_power_mode (int num);
+static void sata_port (struct sata_ioports *ioport);
+static void set_Feature_cmd (int num, int dev);
+static u8 sata_busy_wait (struct sata_ioports *ioaddr, int bits,
+ unsigned int max, u8 usealtstatus);
+static u8 sata_chk_status (struct sata_ioports *ioaddr, u8 usealtstatus);
+static void msleep (int count);
+
+static u32 iobase[6] = { 0, 0, 0, 0, 0, 0}; /* PCI BAR registers for device */
+extern block_dev_desc_t sata_dev_desc[CFG_SATA_MAX_DEVICE];
+
+static struct sata_port port[CFG_SATA_MAX_DEVICE];
+
+static void output_data (struct sata_ioports *ioaddr, u16 * sect_buf, int words)
+{
+ while (words--) {
+ __raw_writew (*sect_buf++, (void *)ioaddr->data_addr);
+ }
+}
+
+static int input_data (struct sata_ioports *ioaddr, u16 * sect_buf, int words)
+{
+ while (words--) {
+ *sect_buf++ = __raw_readw ((void *)ioaddr->data_addr);
+ }
+ return 0;
+}
+
+static int sata_bus_softreset (int num)
+{
+ u8 status = 0;
+
+ port[num].dev_mask = 1;
+
+ port[num].ctl_reg = 0x08; /*Default value of control reg */
+ writeb (port[num].ctl_reg, port[num].ioaddr.ctl_addr);
+ udelay (10);
+ writeb (port[num].ctl_reg | ATA_SRST, port[num].ioaddr.ctl_addr);
+ udelay (10);
+ writeb (port[num].ctl_reg, port[num].ioaddr.ctl_addr);
+
+ /* spec mandates ">= 2ms" before checking status.
+ * We wait 150ms, because that was the magic delay used for
+ * ATAPI devices in Hale Landis's ATADRVR, for the period of time
+ * between when the ATA command register is written, and then
+ * status is checked. Because waiting for "a while" before
+ * checking status is fine, post SRST, we perform this magic
+ * delay here as well.
+ */
+ msleep (150);
+ status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 300, 0);
+ while ((status & ATA_BUSY)) {
+ msleep (100);
+ status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 3, 0);
+ }
+
+ if (status & ATA_BUSY) {
+ printf ("ata%u is slow to respond,plz be patient\n", port);
+ }
+
+ while ((status & ATA_BUSY)) {
+ msleep (100);
+ status = sata_chk_status (&port[num].ioaddr, 0);
+ }
+
+ if (status & ATA_BUSY) {
+ printf ("ata%u failed to respond : ", port);
+ printf ("bus reset failed\n");
+ port[num].dev_mask = 0;
+ return 1;
+ }
+ return 0;
+}
+
+static void sata_identify (int num, int dev)
+{
+ u8 cmd = 0, status = 0, devno = num;
+ u16 iobuf[ATA_SECTOR_WORDS];
+ u64 n_sectors = 0;
+
+ memset (iobuf, 0, sizeof (iobuf));
+
+ if (!(port[num].dev_mask & 0x01)) {
+ printf ("dev%d is not present on port#%d\n", dev, num);
+ return;
+ }
+
+ debug ("port=%d dev=%d\n", num, dev);
+
+ status = 0;
+ cmd = ATA_CMD_ID_ATA; /*Device Identify Command */
+ writeb (cmd, port[num].ioaddr.command_addr);
+ readb (port[num].ioaddr.altstatus_addr);
+ udelay (10);
+
+ status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 1000, 0);
+ if (status & ATA_ERR) {
+ printf ("\ndevice not responding\n");
+ port[num].dev_mask &= ~0x01;
+ return;
+ }
+
+ input_data (&port[num].ioaddr, iobuf, ATA_SECTOR_WORDS);
+
+ ata_swap_buf_le16 (iobuf, ATA_SECTOR_WORDS);
+
+ debug ("Specific config: %x\n", iobuf[2]);
+
+ /* we require LBA and DMA support (bits 8 & 9 of word 49) */
+ if (!ata_id_has_dma (iobuf) || !ata_id_has_lba (iobuf)) {
+ debug ("ata%u: no dma/lba\n", num);
+ }
+#ifdef DEBUG
+ ata_dump_id (iobuf);
+#endif
+ n_sectors = ata_id_n_sectors (iobuf);
+
+ if (n_sectors == 0) {
+ port[num].dev_mask &= ~0x01;
+ return;
+ }
+ ata_id_c_string (iobuf, (unsigned char *)sata_dev_desc[devno].revision,
+ ATA_ID_FW_REV, sizeof (sata_dev_desc[devno].revision));
+ ata_id_c_string (iobuf, (unsigned char *)sata_dev_desc[devno].vendor,
+ ATA_ID_PROD, sizeof (sata_dev_desc[devno].vendor));
+ ata_id_c_string (iobuf, (unsigned char *)sata_dev_desc[devno].product,
+ ATA_ID_SERNO, sizeof (sata_dev_desc[devno].product));
+
+ /* TODO - atm we asume harddisk ie not removable */
+ sata_dev_desc[devno].removable = 0;
+
+ sata_dev_desc[devno].lba = (u32) n_sectors;
+ debug ("lba=0x%x\n", sata_dev_desc[devno].lba);
+
+#ifdef CONFIG_LBA48
+ if (iobuf[83] & (1 << 10)) {
+ sata_dev_desc[devno].lba48 = 1;
+ } else {
+ sata_dev_desc[devno].lba48 = 0;
+ }
+#endif
+
+ /* assuming HD */
+ sata_dev_desc[devno].type = DEV_TYPE_HARDDISK;
+ sata_dev_desc[devno].blksz = ATA_SECT_SIZE;
+ sata_dev_desc[devno].lun = 0; /* just to fill something in... */
+}
+
+static void set_Feature_cmd (int num, int dev)
+{
+ u8 status = 0;
+
+ if (!(port[num].dev_mask & 0x01)) {
+ debug ("dev%d is not present on port#%d\n", dev, num);
+ return;
+ }
+
+ writeb (SETFEATURES_XFER, port[num].ioaddr.feature_addr);
+ writeb (XFER_PIO_4, port[num].ioaddr.nsect_addr);
+ writeb (0, port[num].ioaddr.lbal_addr);
+ writeb (0, port[num].ioaddr.lbam_addr);
+ writeb (0, port[num].ioaddr.lbah_addr);
+
+ writeb (ATA_DEVICE_OBS, port[num].ioaddr.device_addr);
+ writeb (ATA_CMD_SET_FEATURES, port[num].ioaddr.command_addr);
+
+ udelay (50);
+ msleep (150);
+
+ status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 5000, 0);
+ if ((status & (ATA_BUSY | ATA_ERR))) {
+ printf ("Error : status 0x%02x\n", status);
+ port[num].dev_mask &= ~0x01;
+ }
+}
+
+u8 sil3114_spin_down (int num)
+{
+ u8 status = 0;
+
+ debug ("Spin down disk\n");
+
+ if (!(port[num].dev_mask & 0x01)) {
+ debug ("Device ata%d is not present\n", num);
+ return 1;
+ }
+
+ if ((status = check_power_mode (num)) == 0x00) {
+ debug ("Already in standby\n");
+ return 0;
+ }
+
+ if (status == 0x01) {
+ printf ("Failed to check power mode on ata%d\n", num);
+ return 1;
+ }
+
+ if (!((status = sata_chk_status (&port[num].ioaddr, 0)) & ATA_DRDY)) {
+ printf ("Device ata%d not ready\n", num);
+ return 1;
+ }
+
+ writeb (0x00, port[num].ioaddr.feature_addr);
+
+ writeb (0x00, port[num].ioaddr.nsect_addr);
+ writeb (0x00, port[num].ioaddr.lbal_addr);
+ writeb (0x00, port[num].ioaddr.lbam_addr);
+ writeb (0x00, port[num].ioaddr.lbah_addr);
+
+ writeb (ATA_DEVICE_OBS, port[num].ioaddr.device_addr);
+ writeb (ATA_CMD_STANDBY, port[num].ioaddr.command_addr);
+
+ status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 30000, 0);
+ if ((status & (ATA_BUSY | ATA_ERR))) {
+ printf ("Error waiting for disk spin down: status 0x%02x\n",
+ status);
+ port[num].dev_mask &= ~0x01;
+ return 1;
+ }
+ return 0;
+}
+
+u8 sil3114_spin_up (int num)
+{
+ u8 status = 0;
+
+ debug ("Spin up disk\n");
+
+ if (!(port[num].dev_mask & 0x01)) {
+ debug ("Device ata%d is not present\n", num);
+ return 1;
+ }
+
+ if ((status = check_power_mode (num)) != 0x00) {
+ if (status == 0x01) {
+ printf ("Failed to check power mode on ata%d\n", num);
+ return 1;
+ } else {
+ /* should be up and running already */
+ return 0;
+ }
+ }
+
+ if (!((status = sata_chk_status (&port[num].ioaddr, 0)) & ATA_DRDY)) {
+ printf ("Device ata%d not ready\n", num);
+ return 1;
+ }
+
+ debug ("Stautus of device check: %d\n", status);
+
+ writeb (0x00, port[num].ioaddr.feature_addr);
+
+ writeb (0x00, port[num].ioaddr.nsect_addr);
+ writeb (0x00, port[num].ioaddr.lbal_addr);
+ writeb (0x00, port[num].ioaddr.lbam_addr);
+ writeb (0x00, port[num].ioaddr.lbah_addr);
+
+ writeb (ATA_DEVICE_OBS, port[num].ioaddr.device_addr);
+ writeb (ATA_CMD_IDLE, port[num].ioaddr.command_addr);
+
+ status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 30000, 0);
+ if ((status & (ATA_BUSY | ATA_ERR))) {
+ printf ("Error waiting for disk spin up: status 0x%02x\n",
+ status);
+ port[num].dev_mask &= ~0x01;
+ return 1;
+ }
+
+ /* Wait for disk to enter Active state */
+ do {
+ msleep (10);
+ status = check_power_mode (num);
+ } while ((status == 0x00) || (status == 0x80));
+
+ if (status == 0x01) {
+ printf ("Falied waiting for disk to spin up\n");
+ return 1;
+ }
+
+ return 0;
+}
+
+/* Return value is not the usual here
+ * 0x00 - Device stand by
+ * 0x01 - Operation failed
+ * 0x80 - Device idle
+ * 0xff - Device active
+*/
+static u8 check_power_mode (int num)
+{
+ u8 status = 0;
+ u8 res = 0;
+ if (!(port[num].dev_mask & 0x01)) {
+ debug ("Device ata%d is not present\n", num);
+ return 1;
+ }
+
+ if (!(sata_chk_status (&port[num].ioaddr, 0) & ATA_DRDY)) {
+ printf ("Device ata%d not ready\n", num);
+ return 1;
+ }
+
+ writeb (0, port[num].ioaddr.feature_addr);
+ writeb (0, port[num].ioaddr.nsect_addr);
+ writeb (0, port[num].ioaddr.lbal_addr);
+ writeb (0, port[num].ioaddr.lbam_addr);
+ writeb (0, port[num].ioaddr.lbah_addr);
+
+ writeb (ATA_DEVICE_OBS, port[num].ioaddr.device_addr);
+ writeb (ATA_CMD_CHK_POWER, port[num].ioaddr.command_addr);
+
+ status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 5000, 0);
+ if ((status & (ATA_BUSY | ATA_ERR))) {
+ printf
+ ("Error waiting for check power mode complete : status 0x%02x\n",
+ status);
+ port[num].dev_mask &= ~0x01;
+ return 1;
+ }
+ res = readb (port[num].ioaddr.nsect_addr);
+ debug ("Check powermode: %d\n", res);
+ return res;
+
+}
+
+static void sata_port (struct sata_ioports *ioport)
+{
+ ioport->data_addr = ioport->cmd_addr + ATA_REG_DATA;
+ ioport->error_addr = ioport->cmd_addr + ATA_REG_ERR;
+ ioport->feature_addr = ioport->cmd_addr + ATA_REG_FEATURE;
+ ioport->nsect_addr = ioport->cmd_addr + ATA_REG_NSECT;
+ ioport->lbal_addr = ioport->cmd_addr + ATA_REG_LBAL;
+ ioport->lbam_addr = ioport->cmd_addr + ATA_REG_LBAM;
+ ioport->lbah_addr = ioport->cmd_addr + ATA_REG_LBAH;
+ ioport->device_addr = ioport->cmd_addr + ATA_REG_DEVICE;
+ ioport->status_addr = ioport->cmd_addr + ATA_REG_STATUS;
+ ioport->command_addr = ioport->cmd_addr + ATA_REG_CMD;
+}
+
+static u8 wait_for_irq (int num, unsigned int max)
+{
+
+ u32 port = iobase[5];
+ switch (num) {
+ case 0:
+ port += VND_TF_CNST_CH0;
+ break;
+ case 1:
+ port += VND_TF_CNST_CH1;
+ break;
+ case 2:
+ port += VND_TF_CNST_CH2;
+ break;
+ case 3:
+ port += VND_TF_CNST_CH3;
+ break;
+ default:
+ return 1;
+ }
+
+ do {
+ if (readl (port) & VND_TF_CNST_INTST) {
+ break;
+ }
+ udelay (1000);
+ max--;
+ } while ((max > 0));
+
+ return (max == 0);
+}
+
+static u8 sata_busy_wait (struct sata_ioports *ioaddr, int bits,
+ unsigned int max, u8 usealtstatus)
+{
+ u8 status;
+
+ do {
+ if (!((status = sata_chk_status (ioaddr, usealtstatus)) & bits)) {
+ break;
+ }
+ udelay (1000);
+ max--;
+ } while ((status & bits) && (max > 0));
+
+ return status;
+}
+
+static u8 sata_chk_status (struct sata_ioports *ioaddr, u8 usealtstatus)
+{
+ if (!usealtstatus) {
+ return readb (ioaddr->status_addr);
+ } else {
+ return readb (ioaddr->altstatus_addr);
+ }
+}
+
+static void msleep (int count)
+{
+ int i;
+
+ for (i = 0; i < count; i++)
+ udelay (1000);
+}
+
+/* Read up to 255 sectors
+ *
+ * Returns sectors read
+*/
+static u8 do_one_read (int device, ulong block, u8 blkcnt, u16 * buff,
+ uchar lba48)
+{
+
+ u8 sr = 0;
+ u8 status;
+ u64 blknr = (u64) block;
+
+ if (!(sata_chk_status (&port[device].ioaddr, 0) & ATA_DRDY)) {
+ printf ("Device ata%d not ready\n", device);
+ return 0;
+ }
+
+ /* Set up transfer */
+#ifdef CONFIG_LBA48
+ if (lba48) {
+ /* write high bits */
+ writeb (0, port[device].ioaddr.nsect_addr);
+ writeb ((blknr >> 24) & 0xFF, port[device].ioaddr.lbal_addr);
+ writeb ((blknr >> 32) & 0xFF, port[device].ioaddr.lbam_addr);
+ writeb ((blknr >> 40) & 0xFF, port[device].ioaddr.lbah_addr);
+ }
+#endif
+ writeb (blkcnt, port[device].ioaddr.nsect_addr);
+ writeb (((blknr) >> 0) & 0xFF, port[device].ioaddr.lbal_addr);
+ writeb ((blknr >> 8) & 0xFF, port[device].ioaddr.lbam_addr);
+ writeb ((blknr >> 16) & 0xFF, port[device].ioaddr.lbah_addr);
+
+#ifdef CONFIG_LBA48
+ if (lba48) {
+ writeb (ATA_LBA, port[device].ioaddr.device_addr);
+ writeb (ATA_CMD_PIO_READ_EXT, port[device].ioaddr.command_addr);
+ } else
+#endif
+ {
+ writeb (ATA_LBA | ((blknr >> 24) & 0xF),
+ port[device].ioaddr.device_addr);
+ writeb (ATA_CMD_PIO_READ, port[device].ioaddr.command_addr);
+ }
+
+ status = sata_busy_wait (&port[device].ioaddr, ATA_BUSY, 10000, 1);
+
+ if (status & ATA_BUSY) {
+ u8 err = 0;
+
+ printf ("Device %d not responding status %d\n", device, status);
+ err = readb (port[device].ioaddr.error_addr);
+ printf ("Error reg = 0x%x\n", err);
+
+ return (sr);
+ }
+ while (blkcnt--) {
+
+ if (wait_for_irq (device, 500)) {
+ printf ("ata%u irq failed\n", device);
+ return sr;
+ }
+
+ status = sata_chk_status (&port[device].ioaddr, 0);
+ if (status & ATA_ERR) {
+ printf ("ata%u error %d\n", device,
+ readb (port[device].ioaddr.error_addr));
+ return sr;
+ }
+ /* Read one sector */
+ input_data (&port[device].ioaddr, buff, ATA_SECTOR_WORDS);
+ buff += ATA_SECTOR_WORDS;
+ sr++;
+
+ }
+ return sr;
+}
+
+ulong sata_read (int device, ulong block, lbaint_t blkcnt, void *buff)
+{
+ ulong n = 0, sread;
+ u16 *buffer = (u16 *) buff;
+ u8 status = 0;
+ u64 blknr = (u64) block;
+ unsigned char lba48 = 0;
+
+#ifdef CONFIG_LBA48
+ if (blknr > 0xfffffff) {
+ if (!sata_dev_desc[device].lba48) {
+ printf ("Drive doesn't support 48-bit addressing\n");
+ return 0;
+ }
+ /* more than 28 bits used, use 48bit mode */
+ lba48 = 1;
+ }
+#endif
+
+ while (blkcnt > 0) {
+
+ if (blkcnt > 255) {
+ sread = 255;
+ } else {
+ sread = blkcnt;
+ }
+
+ status = do_one_read (device, blknr, sread, buffer, lba48);
+ if (status != sread) {
+ printf ("Read failed\n");
+ return n;
+ }
+
+ blkcnt -= sread;
+ blknr += sread;
+ n += sread;
+ buffer += sread * ATA_SECTOR_WORDS;
+ }
+ return n;
+}
+
+ulong sata_write (int device, ulong block, lbaint_t blkcnt, const void *buff)
+{
+ ulong n = 0;
+ u16 *buffer = (u16 *) buff;
+ unsigned char status = 0, num = 0;
+ u64 blknr = (u64) block;
+#ifdef CONFIG_LBA48
+ unsigned char lba48 = 0;
+
+ if (blknr > 0xfffffff) {
+ if (!sata_dev_desc[device].lba48) {
+ printf ("Drive doesn't support 48-bit addressing\n");
+ return 0;
+ }
+ /* more than 28 bits used, use 48bit mode */
+ lba48 = 1;
+ }
+#endif
+ /*Port Number */
+ num = device;
+
+ while (blkcnt-- > 0) {
+ status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 500, 0);
+ if (status & ATA_BUSY) {
+ printf ("ata%u failed to respond\n", port[num].port_no);
+ return n;
+ }
+#ifdef CONFIG_LBA48
+ if (lba48) {
+ /* write high bits */
+ writeb (0, port[num].ioaddr.nsect_addr);
+ writeb ((blknr >> 24) & 0xFF,
+ port[num].ioaddr.lbal_addr);
+ writeb ((blknr >> 32) & 0xFF,
+ port[num].ioaddr.lbam_addr);
+ writeb ((blknr >> 40) & 0xFF,
+ port[num].ioaddr.lbah_addr);
+ }
+#endif
+ writeb (1, port[num].ioaddr.nsect_addr);
+ writeb ((blknr >> 0) & 0xFF, port[num].ioaddr.lbal_addr);
+ writeb ((blknr >> 8) & 0xFF, port[num].ioaddr.lbam_addr);
+ writeb ((blknr >> 16) & 0xFF, port[num].ioaddr.lbah_addr);
+#ifdef CONFIG_LBA48
+ if (lba48) {
+ writeb (ATA_LBA, port[num].ioaddr.device_addr);
+ writeb (ATA_CMD_PIO_WRITE_EXT, port[num].ioaddr.command_addr);
+ } else
+#endif
+ {
+ writeb (ATA_LBA | ((blknr >> 24) & 0xF),
+ port[num].ioaddr.device_addr);
+ writeb (ATA_CMD_PIO_WRITE, port[num].ioaddr.command_addr);
+ }
+
+ msleep (50);
+ /*may take up to 4 sec */
+ status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 4000, 0);
+ if ((status & (ATA_DRQ | ATA_BUSY | ATA_ERR)) != ATA_DRQ) {
+ printf ("Error no DRQ dev %d blk %ld: sts 0x%02x\n",
+ device, (ulong) blknr, status);
+ return (n);
+ }
+
+ output_data (&port[num].ioaddr, buffer, ATA_SECTOR_WORDS);
+ readb (port[num].ioaddr.altstatus_addr);
+ udelay (50);
+
+ ++n;
+ ++blknr;
+ buffer += ATA_SECTOR_WORDS;
+ }
+ return n;
+}
+
+/* Driver implementation */
+static u8 sil_get_device_cache_line (pci_dev_t pdev)
+{
+ u8 cache_line = 0;
+ pci_read_config_byte (pdev, PCI_CACHE_LINE_SIZE, &cache_line);
+ return cache_line;
+}
+
+int init_sata (int dev)
+{
+ static u8 init_done = 0;
+ static int res = 1;
+ pci_dev_t devno;
+ u8 cls = 0;
+ u16 cmd = 0;
+ u32 sconf = 0;
+
+ if (init_done) {
+ return res;
+ }
+
+ init_done = 1;
+
+ if ((devno = pci_find_device (SIL_VEND_ID, SIL3114_DEVICE_ID, 0)) == -1) {
+ res = 1;
+ return res;
+ }
+
+ /* Read out all BARs, even though we only use MMIO from BAR5 */
+ pci_read_config_dword (devno, PCI_BASE_ADDRESS_0, &iobase[0]);
+ pci_read_config_dword (devno, PCI_BASE_ADDRESS_1, &iobase[1]);
+ pci_read_config_dword (devno, PCI_BASE_ADDRESS_2, &iobase[2]);
+ pci_read_config_dword (devno, PCI_BASE_ADDRESS_3, &iobase[3]);
+ pci_read_config_dword (devno, PCI_BASE_ADDRESS_4, &iobase[4]);
+ pci_read_config_dword (devno, PCI_BASE_ADDRESS_5, &iobase[5]);
+
+ if ((iobase[0] == 0xFFFFFFFF) || (iobase[1] == 0xFFFFFFFF) ||
+ (iobase[2] == 0xFFFFFFFF) || (iobase[3] == 0xFFFFFFFF) ||
+ (iobase[4] == 0xFFFFFFFF) || (iobase[5] == 0xFFFFFFFF)) {
+ printf ("Error no base addr for SATA controller\n");
+ res = 1;
+ return res;
+ }
+
+ /* mask off unused bits */
+ iobase[0] &= 0xfffffffc;
+ iobase[1] &= 0xfffffff8;
+ iobase[2] &= 0xfffffffc;
+ iobase[3] &= 0xfffffff8;
+ iobase[4] &= 0xfffffff0;
+ iobase[5] &= 0xfffffc00;
+
+ /* from sata_sil in Linux kernel */
+ cls = sil_get_device_cache_line (devno);
+ if (cls) {
+ cls >>= 3;
+ cls++; /* cls = (line_size/8)+1 */
+ writel (cls << 8 | cls, iobase[5] + VND_FIFOCFG_CH0);
+ writel (cls << 8 | cls, iobase[5] + VND_FIFOCFG_CH1);
+ writel (cls << 8 | cls, iobase[5] + VND_FIFOCFG_CH2);
+ writel (cls << 8 | cls, iobase[5] + VND_FIFOCFG_CH3);
+ } else {
+ printf ("Cache line not set. Driver may not function\n");
+ }
+
+ /* Enable operation */
+ pci_read_config_word (devno, PCI_COMMAND, &cmd);
+ cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
+ pci_write_config_word (devno, PCI_COMMAND, cmd);
+
+ /* Disable interrupt usage */
+ pci_read_config_dword (devno, VND_SYSCONFSTAT, &sconf);
+ sconf |= (VND_SYSCONFSTAT_CHN_0_INTBLOCK | VND_SYSCONFSTAT_CHN_1_INTBLOCK);
+ pci_write_config_dword (devno, VND_SYSCONFSTAT, sconf);
+
+ res = 0;
+ return res;
+}
+
+/* Check if device is connected to port */
+int sata_bus_probe (int portno)
+{
+ u32 port = iobase[5];
+ u32 val;
+ switch (portno) {
+ case 0:
+ port += VND_SSTATUS_CH0;
+ break;
+ case 1:
+ port += VND_SSTATUS_CH1;
+ break;
+ case 2:
+ port += VND_SSTATUS_CH2;
+ break;
+ case 3:
+ port += VND_SSTATUS_CH3;
+ break;
+ default:
+ return 0;
+ }
+ val = readl (port);
+ if ((val & SATA_DET_PRES) == SATA_DET_PRES) {
+ return 1;
+ } else {
+ return 0;
+ }
+}
+
+int sata_phy_reset (int portno)
+{
+ u32 port = iobase[5];
+ u32 val;
+ switch (portno) {
+ case 0:
+ port += VND_SCONTROL_CH0;
+ break;
+ case 1:
+ port += VND_SCONTROL_CH1;
+ break;
+ case 2:
+ port += VND_SCONTROL_CH2;
+ break;
+ case 3:
+ port += VND_SCONTROL_CH3;
+ break;
+ default:
+ return 0;
+ }
+ val = readl (port);
+ writel (val | SATA_SC_DET_RST, port);
+ msleep (150);
+ writel (val & ~SATA_SC_DET_RST, port);
+ return 0;
+}
+
+int scan_sata (int dev)
+{
+ /* A bit brain dead, but the code has a legacy */
+ switch (dev) {
+ case 0:
+ port[0].port_no = 0;
+ port[0].ioaddr.cmd_addr = iobase[5] + VND_TF0_CH0;
+ port[0].ioaddr.altstatus_addr = port[0].ioaddr.ctl_addr =
+ (iobase[5] + VND_TF2_CH0) | ATA_PCI_CTL_OFS;
+ port[0].ioaddr.bmdma_addr = iobase[5] + VND_BMDMA_CH0;
+ break;
+ case 1:
+ port[1].port_no = 0;
+ port[1].ioaddr.cmd_addr = iobase[5] + VND_TF0_CH1;
+ port[1].ioaddr.altstatus_addr = port[1].ioaddr.ctl_addr =
+ (iobase[5] + VND_TF2_CH1) | ATA_PCI_CTL_OFS;
+ port[1].ioaddr.bmdma_addr = iobase[5] + VND_BMDMA_CH1;
+ break;
+ case 2:
+ port[2].port_no = 0;
+ port[2].ioaddr.cmd_addr = iobase[5] + VND_TF0_CH2;
+ port[2].ioaddr.altstatus_addr = port[2].ioaddr.ctl_addr =
+ (iobase[5] + VND_TF2_CH2) | ATA_PCI_CTL_OFS;
+ port[2].ioaddr.bmdma_addr = iobase[5] + VND_BMDMA_CH2;
+ break;
+ case 3:
+ port[3].port_no = 0;
+ port[3].ioaddr.cmd_addr = iobase[5] + VND_TF0_CH3;
+ port[3].ioaddr.altstatus_addr = port[3].ioaddr.ctl_addr =
+ (iobase[5] + VND_TF2_CH3) | ATA_PCI_CTL_OFS;
+ port[3].ioaddr.bmdma_addr = iobase[5] + VND_BMDMA_CH3;
+ break;
+ default:
+ printf ("Tried to scan unknown port: ata%d\n", dev);
+ return 1;
+ }
+
+ /* Initialize other registers */
+ sata_port (&port[dev].ioaddr);
+
+ /* Check for attached device */
+ if (!sata_bus_probe (dev)) {
+ port[dev].port_state = 0;
+ debug ("SATA#%d port is not present\n", dev);
+ } else {
+ debug ("SATA#%d port is present\n", dev);
+ if (sata_bus_softreset (dev)) {
+ /* soft reset failed, try a hard one */
+ sata_phy_reset (dev);
+ if (sata_bus_softreset (dev)) {
+ port[dev].port_state = 0;
+ } else {
+ port[dev].port_state = 1;
+ }
+ } else {
+ port[dev].port_state = 1;
+ }
+ }
+ if (port[dev].port_state == 1) {
+ /* Probe device and set xfer mode */
+ sata_identify (dev, 0);
+ set_Feature_cmd (dev, 0);
+ }
+
+ return 0;
+}
--- /dev/null
+/*
+ * Copyright (C) Excito Elektronik i Skåne AB, All rights reserved.
+ * Author: Tor Krill <tor@excito.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef SATA_SIL3114_H
+#define SATA_SIL3114_H
+
+struct sata_ioports {
+ unsigned long cmd_addr;
+ unsigned long data_addr;
+ unsigned long error_addr;
+ unsigned long feature_addr;
+ unsigned long nsect_addr;
+ unsigned long lbal_addr;
+ unsigned long lbam_addr;
+ unsigned long lbah_addr;
+ unsigned long device_addr;
+ unsigned long status_addr;
+ unsigned long command_addr;
+ unsigned long altstatus_addr;
+ unsigned long ctl_addr;
+ unsigned long bmdma_addr;
+ unsigned long scr_addr;
+};
+
+struct sata_port {
+ unsigned char port_no; /* primary=0, secondary=1 */
+ struct sata_ioports ioaddr; /* ATA cmd/ctl/dma reg blks */
+ unsigned char ctl_reg;
+ unsigned char last_ctl;
+ unsigned char port_state; /* 1-port is available and */
+ /* 0-port is not available */
+ unsigned char dev_mask;
+};
+
+/* Missing ata defines */
+#define ATA_CMD_STANDBY 0xE2
+#define ATA_CMD_STANDBYNOW1 0xE0
+#define ATA_CMD_IDLE 0xE3
+#define ATA_CMD_IDLEIMMEDIATE 0xE1
+
+/* Defines for SIL3114 chip */
+
+/* PCI defines */
+#define SIL_VEND_ID 0x1095
+#define SIL3114_DEVICE_ID 0x3114
+
+/* some vendor specific registers */
+#define VND_SYSCONFSTAT 0x88 /* System Configuration Status and Command */
+#define VND_SYSCONFSTAT_CHN_0_INTBLOCK (1<<22)
+#define VND_SYSCONFSTAT_CHN_1_INTBLOCK (1<<23)
+#define VND_SYSCONFSTAT_CHN_2_INTBLOCK (1<<24)
+#define VND_SYSCONFSTAT_CHN_3_INTBLOCK (1<<25)
+
+/* internal registers mapped by BAR5 */
+/* SATA Control*/
+#define VND_SCONTROL_CH0 0x100
+#define VND_SCONTROL_CH1 0x180
+#define VND_SCONTROL_CH2 0x300
+#define VND_SCONTROL_CH3 0x380
+
+#define SATA_SC_IPM_T2P (1<<16)
+#define SATA_SC_IPM_T2S (2<<16)
+#define SATA_SC_SPD_1_5 (1<<4)
+#define SATA_SC_SPD_3_0 (2<<4)
+#define SATA_SC_DET_RST (1) /* ATA Reset sequence */
+#define SATA_SC_DET_PDIS (4) /* PHY Disable */
+
+/* SATA Status */
+#define VND_SSTATUS_CH0 0x104
+#define VND_SSTATUS_CH1 0x184
+#define VND_SSTATUS_CH2 0x304
+#define VND_SSTATUS_CH3 0x384
+
+#define SATA_SS_IPM_ACTIVE (1<<8)
+#define SATA_SS_IPM_PARTIAL (2<<8)
+#define SATA_SS_IPM_SLUMBER (6<<8)
+#define SATA_SS_SPD_1_5 (1<<4)
+#define SATA_SS_SPD_3_0 (2<<4)
+#define SATA_DET_P_NOPHY (1) /* Device presence but no PHY connection established */
+#define SATA_DET_PRES (3) /* Device presence and active PHY */
+#define SATA_DET_OFFLINE (4) /* Device offline or in loopback mode */
+
+/* Task file registers in BAR5 mapping */
+#define VND_TF0_CH0 0x80
+#define VND_TF0_CH1 0xc0
+#define VND_TF0_CH2 0x280
+#define VND_TF0_CH3 0x2c0
+#define VND_TF1_CH0 0x88
+#define VND_TF1_CH1 0xc8
+#define VND_TF1_CH2 0x288
+#define VND_TF1_CH3 0x2c8
+#define VND_TF2_CH0 0x88
+#define VND_TF2_CH1 0xc8
+#define VND_TF2_CH2 0x288
+#define VND_TF2_CH3 0x2c8
+
+#define VND_BMDMA_CH0 0x00
+#define VND_BMDMA_CH1 0x08
+#define VND_BMDMA_CH2 0x200
+#define VND_BMDMA_CH3 0x208
+#define VND_BMDMA2_CH0 0x10
+#define VND_BMDMA2_CH1 0x18
+#define VND_BMDMA2_CH2 0x210
+#define VND_BMDMA2_CH3 0x218
+
+/* FIFO control */
+#define VND_FIFOCFG_CH0 0x40
+#define VND_FIFOCFG_CH1 0x44
+#define VND_FIFOCFG_CH2 0x240
+#define VND_FIFOCFG_CH3 0x244
+
+/* Task File configuration and status */
+#define VND_TF_CNST_CH0 0xa0
+#define VND_TF_CNST_CH1 0xe0
+#define VND_TF_CNST_CH2 0x2a0
+#define VND_TF_CNST_CH3 0x2e0
+
+#define VND_TF_CNST_BFCMD (1<<1)
+#define VND_TF_CNST_CHNRST (1<<2)
+#define VND_TF_CNST_VDMA (1<<10)
+#define VND_TF_CNST_INTST (1<<11)
+#define VND_TF_CNST_WDTO (1<<12)
+#define VND_TF_CNST_WDEN (1<<13)
+#define VND_TF_CNST_WDIEN (1<<14)
+
+/* for testing */
+#define VND_SSDR 0x04c /* System Software Data Register */
+#define VND_FMACS 0x050 /* Flash Memory Address control and status */
+
+#endif
CONFIG_DRIVER_SMC911X_16_BIT shall be set"
#endif
-#ifdef CONFIG_DRIVER_SMC911X_32_BIT
+#if defined (CONFIG_DRIVER_SMC911X_32_BIT)
static inline u32 reg_read(u32 addr)
{
return *(volatile u32*)addr;
{
*(volatile u32*)addr = val;
}
-#elif CONFIG_DRIVER_SMC911X_16_BIT
+#elif defined (CONFIG_DRIVER_SMC911X_16_BIT)
static inline u32 reg_read(u32 addr)
{
volatile u16 *addr_16 = (u16 *)addr;
val = reg_read(BYTE_TEST);
if (val != 0x87654321) {
- printf(DRIVERNAME ": Invalid chip endian 0x08%x\n", val);
+ printf(DRIVERNAME ": Invalid chip endian 0x%08x\n", val);
goto err_out;
}
COBJS-$(CONFIG_I82365) += i82365.o
COBJS-y += mpc8xx_pcmcia.o
-COBJS-y += pxa_pcmcia.o
+COBJS-$(CONFIG_PXA_PCMCIA) += pxa_pcmcia.o
COBJS-y += rpx_pcmcia.o
-COBJS-y += ti_pci1410a.o
+COBJS-$(CONFIG_IDE_TI_CARDBUS) += ti_pci1410a.o
COBJS-y += tqm8xx_pcmcia.o
-COBJS-y += marubun_pcmcia.o
+COBJS-$(CONFIG_MARUBUN_PCCARD) += marubun_pcmcia.o
COBJS := $(COBJS-y)
SRCS := $(COBJS:.o=.c)
#define CONFIG_PCMCIA
#endif
-#if defined(CONFIG_CMD_IDE)
+#if defined(CONFIG_CMD_IDE)
#define CONFIG_PCMCIA
#endif
-#if defined(CONFIG_PCMCIA) \
- && (defined(CONFIG_MARUBUN_PCCARD))
+#if defined(CONFIG_PCMCIA)
/* MR-SHPC-01 register */
#define MRSHPC_MODE (CFG_MARUBUN_MRSHPC + 4)
return 0;
}
-#endif /* CONFIG_MARUBUN_PCCARD */
+#endif /* CONFIG_PCMCIA */
#include <common.h>
#include <config.h>
-#ifdef CONFIG_PXA_PCMCIA
-
#include <pcmcia.h>
#include <asm/arch/pxa-regs.h>
#include <asm/io.h>
return 0;
}
#endif
-
-#endif /* CONFIG_PXA_PCMCIA */
#include <pcmcia.h>
-#if defined(CONFIG_CMD_PCMCIA) && defined(CONFIG_IDE_TI_CARDBUS)
+#if defined(CONFIG_CMD_PCMCIA)
int pcmcia_on(int ide_base_bus);
return 0; /* don't know */
}
-#endif /* CONFIG_IDE_TI_CARDBUS */
+#endif /* CONFIG_CMD_PCMCIA */
/* Should be fairly simple to make it work with the PL010 as well */
#include <common.h>
+#include <watchdog.h>
#ifdef CFG_PL010_SERIAL
static void pl010_putc (int portnum, char c)
{
/* Wait until there is space in the FIFO */
- while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_TXFF);
+ while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_TXFF)
+ WATCHDOG_RESET();
/* Send the character */
IO_WRITE (port[portnum] + UART_PL01x_DR, c);
unsigned int data;
/* Wait until there is data in the FIFO */
- while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_RXFE);
+ while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_RXFE)
+ WATCHDOG_RESET();
data = IO_READ (port[portnum] + UART_PL01x_DR);
static int pl010_tstc (int portnum)
{
+ WATCHDOG_RESET();
return !(IO_READ (port[portnum] + UART_PL01x_FR) &
UART_PL01x_FR_RXFE);
}
LIB := $(obj)libspi.a
-COBJS-y += mpc8xxx_spi.o
+COBJS-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o
COBJS-$(CONFIG_ATMEL_SPI) += atmel_spi.o
COBJS-$(CONFIG_MXC_SPI) += mxc_spi.o
*/
#include <common.h>
-#if defined(CONFIG_MPC8XXX_SPI) && defined(CONFIG_HARD_SPI)
#include <malloc.h>
#include <spi.h>
return 0;
}
-#endif /* CONFIG_HARD_SPI */
#include <malloc.h>
#include <linux/stat.h>
#include <linux/time.h>
+#include <watchdog.h>
#if defined(CONFIG_CMD_JFFS2)
oldoffset = offset;
}
+ WATCHDOG_RESET();
+
node = (struct jffs2_unknown_node *) get_node_mem((u32)part->offset + offset);
if (node->magic == JFFS2_MAGIC_BITMASK && hdr_crc(node)) {
/* if its a fragment add it */
#define MMC_DEFAULT_RCA 1
#define MMC_BLOCK_SIZE 512
-#define MMC_CMD_RESET 0
-#define MMC_CMD_SEND_OP_COND 1
-#define MMC_CMD_ALL_SEND_CID 2
-#define MMC_CMD_SET_RCA 3
-#define MMC_CMD_SELECT_CARD 7
-#define MMC_CMD_SEND_CSD 9
-#define MMC_CMD_SEND_CID 10
-#define MMC_CMD_SEND_STATUS 13
-#define MMC_CMD_SET_BLOCKLEN 16
-#define MMC_CMD_READ_BLOCK 17
-#define MMC_CMD_RD_BLK_MULTI 18
-#define MMC_CMD_WRITE_BLOCK 24
-#define MMC_CMD_APP_CMD 55
-
-#define SD_CMD_APP_SET_BUS_WIDTH 6
-#define SD_CMD_APP_OP_COND 41
-
#define MMC_MAX_BLOCK_SIZE 512
#define MMC_R1_IDLE_STATE 0x01
#define MACH_TYPE_P300 1602
#define MACH_TYPE_XDACOMET 1603
#define MACH_TYPE_DEXFLEX2 1604
+#define MACH_TYPE_SFFSDR 1657
#ifdef CONFIG_ARCH_EBSA110
# ifdef machine_arch_type
# define machine_is_schmoogie() (0)
#endif
+#ifdef CONFIG_MACH_SFFSDR
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_SFFSDR
+# endif
+# define machine_is_sffsdr() (machine_arch_type == MACH_TYPE_SFFSDR)
+#else
+# define machine_is_sffsdr() (0)
+#endif
+
#ifdef CONFIG_MACH_AZTOOL
# ifdef machine_arch_type
# undef machine_arch_type
/* To be fixed! */
/* ------------------------------------------------------------ */
/* common/cmd_nvedit.c */
-void setenv (char *, char *);
+int setenv (char *, char *);
/* cpu/.../interrupt.c */
void reset_timer_masked (void);
#define GPIO_PIN_PE25 (GPIO_PIOE_BASE + 25)
#define GPIO_PIN_PE26 (GPIO_PIOE_BASE + 26)
+#define GPIOF_PULLUP 0x00000001 /* (not-OUT) Enable pull-up */
+#define GPIOF_OUTPUT 0x00000002 /* (OUT) Enable output driver */
+#define GPIOF_DEGLITCH 0x00000004 /* (IN) Filter glitches */
+#define GPIOF_MULTIDRV 0x00000008 /* Enable multidriver option */
+
static inline void *gpio_pin_to_addr(unsigned int pin)
{
switch (pin >> 5) {
void gpio_select_periph_A(unsigned int pin, int use_pullup);
void gpio_select_periph_B(unsigned int pin, int use_pullup);
+void gpio_select_pio(unsigned int pin, unsigned long gpiof_flags);
+void gpio_set_value(unsigned int pin, int value);
+int gpio_get_value(unsigned int pin);
void gpio_enable_ebi(void);
u8 one:1;
};
-/* MMC Command numbers */
-#define MMC_CMD_GO_IDLE_STATE 0
-#define MMC_CMD_SEND_OP_COND 1
-#define MMC_CMD_ALL_SEND_CID 2
-#define MMC_CMD_SET_RELATIVE_ADDR 3
-#define MMC_CMD_SD_SEND_RELATIVE_ADDR 3
-#define MMC_CMD_SET_DSR 4
-#define MMC_CMD_SELECT_CARD 7
-#define MMC_CMD_SEND_CSD 9
-#define MMC_CMD_SEND_CID 10
-#define MMC_CMD_SEND_STATUS 13
-#define MMC_CMD_SET_BLOCKLEN 16
-#define MMC_CMD_READ_SINGLE_BLOCK 17
-#define MMC_CMD_READ_MULTIPLE_BLOCK 18
-#define MMC_CMD_WRITE_BLOCK 24
-#define MMC_CMD_APP_CMD 55
-
-#define MMC_ACMD_SD_SEND_OP_COND 41
-
#define R1_ILLEGAL_COMMAND (1 << 22)
#define R1_APP_CMD (1 << 5)
}
/* Return the bit position of the most significant 1 bit in a word */
+/* - the result is undefined when x == 0 */
extern __inline__ int __ilog2(unsigned int x)
{
int lz;
return __ilog2(x & -x);
}
+/*
+ * fls: find last (most-significant) bit set.
+ * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
+ *
+ * On powerpc, __ilog2(0) returns -1, but this is not safe in general
+ */
+static __inline__ int fls(unsigned int x)
+{
+ return __ilog2(x) + 1;
+}
+
+/**
+ * fls64 - find last set bit in a 64-bit word
+ * @x: the word to search
+ *
+ * This is defined in a similar way as the libc and compiler builtin
+ * ffsll, but returns the position of the most significant set bit.
+ *
+ * fls64(value) returns 0 if value is 0 or the position of the last
+ * set bit if value is nonzero. The last (most significant) bit is
+ * at position 64.
+ */
+#if BITS_PER_LONG == 32
+static inline int fls64(__u64 x)
+{
+ __u32 h = x >> 32;
+ if (h)
+ return fls(h) + 32;
+ return fls(x);
+}
+#elif BITS_PER_LONG == 64
+static inline int fls64(__u64 x)
+{
+ if (x == 0)
+ return 0;
+ return __ilog2(x) + 1;
+}
+#else
+#error BITS_PER_LONG not 32 or 64
+#endif
+
+static inline int __ilog2_u64(u64 n)
+{
+ return fls64(n) - 1;
+}
+
+static inline int ffs64(u64 x)
+{
+ return __ilog2_u64(x & -x) + 1ull;
+}
+
#ifdef __KERNEL__
/*
struct cpu_type *identify_cpu(u32 ver);
+#if defined(CONFIG_MPC85xx)
#define CPU_TYPE_ENTRY(n, v) \
{ .name = #n, .soc_ver = SVR_##v, }
+#else
+#if defined(CONFIG_MPC83XX)
+#define CPU_TYPE_ENTRY(x) {#x, SPR_##x}
+#endif
+#endif
+
#ifndef CONFIG_MACH_SPECIFIC
extern int _machine;
int getenv_r (char *name, char *buf, unsigned len);
int saveenv (void);
#ifdef CONFIG_PPC /* ARM version to be fixed! */
-void inline setenv (char *, char *);
+int inline setenv (char *, char *);
#else
-void setenv (char *, char *);
+int setenv (char *, char *);
#ifdef CONFIG_HAS_UID
void forceenv (char *, char *);
#endif
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
#define roundup(x, y) ((((x) + ((y) - 1)) / (y)) * (y))
+#define ALIGN(x,a) __ALIGN_MASK((x),(typeof(x))(a)-1)
+#define __ALIGN_MASK(x,mask) (((x)+(mask))&~(mask))
+
/* Multicore arch functions */
#ifdef CONFIG_MP
int cpu_status(int nr);
/* SPI */
#define CONFIG_MPC8XXX_SPI
-#define CONFIG_HARD_SPI /* SPI with hardware support */
#undef CONFIG_SOFT_SPI /* SPI bit-banged */
/* GPIOs. Used as SPI chip selects */
#ifndef __CONFIG_H
#define __CONFIG_H
-#define MV_VERSION "v1.0.1"
+#include <version.h>
/*
* High Level Configuration Options
#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR+CFG_ENV_SIZE)
#define CFG_ENV_SIZE_REDUND CFG_ENV_SIZE
-#define CONFIG_LOADS_ECHO
+#define CONFIG_LOADS_ECHO
#define CFG_LOADS_BAUD_CHANGE
/*
#define CFG_HID0_FINAL CFG_HID0_INIT
#define CFG_HID2 HID2_HBE
+#define CONFIG_HIGH_BATS 1
/* DDR */
#define CFG_IBAT0L (CFG_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
"mv_dtb_addr=" MV_DTB_ADDR "\0" \
"mv_dtb_addr_ram=" MV_DTB_ADDR_RAM "\0" \
"dtb_name=" MV_DTB_NAME "\0" \
- "mv_version=" MV_VERSION "\0" \
+ "mv_version=" U_BOOT_VERSION "\0" \
"dhcp_client_id=" MV_CI "\0" \
"dhcp_vendor-class-identifier=" MV_VCI "\0" \
"netretry=no\0" \
#define CONFIG_BAUDRATE 115200
#define CONFIG_BOOTDELAY 3
#define CONFIG_BOOTARGS "console=ttySC0,115200 root=1f01"
-#define CONFIG_NETMASK 255.255.255.0
-#define CONFIG_IPADDR 192.168.10.100
-#define CONFIG_SERVERIP 192.168.10.77
-#define CONFIG_GATEWAYIP 192.168.10.77
#define CONFIG_VERSION_VARIABLE
#undef CONFIG_SHOW_BOOT_PROGRESS
#define CONFIG_CMD_FAT
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_MMC
+#define CONFIG_CMD_SF
+#define CONFIG_CMD_SPI
#undef CONFIG_CMD_AUTOSCRIPT
#undef CONFIG_CMD_FPGA
#define CFG_NR_PIOS 5
#define CFG_HSDRAMC 1
#define CONFIG_MMC 1
+#define CONFIG_ATMEL_SPI 1
+
+#define CONFIG_SPI_FLASH 1
+#define CONFIG_SPI_FLASH_ATMEL 1
#define CFG_DCACHE_LINESZ 32
#define CFG_ICACHE_LINESZ 32
--- /dev/null
+/*
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+#include <asm/sizes.h>
+
+/*=======*/
+/* Board */
+/*=======*/
+#define SFFSDR
+#define CFG_NAND_LARGEPAGE
+#define CFG_USE_NAND
+/*===================*/
+/* SoC Configuration */
+/*===================*/
+#define CONFIG_ARM926EJS /* arm926ejs CPU core */
+#define CONFIG_SYS_CLK_FREQ 297000000 /* Arm Clock frequency */
+#define CFG_TIMERBASE 0x01c21400 /* use timer 0 */
+#define CFG_HZ_CLOCK 27000000 /* Timer Input clock freq */
+#define CFG_HZ 1000
+/*==================================================*/
+/* EEPROM definitions for Atmel 24LC64 EEPROM chip */
+/*==================================================*/
+#define CFG_I2C_EEPROM_ADDR_LEN 2
+#define CFG_I2C_EEPROM_ADDR 0x50
+#define CFG_EEPROM_PAGE_WRITE_BITS 5
+#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20
+/*=============*/
+/* Memory Info */
+/*=============*/
+#define CFG_MALLOC_LEN (0x10000 + 256*1024) /* malloc() len */
+#define CFG_GBL_DATA_SIZE 128 /* reserved for initial data */
+#define CFG_MEMTEST_START 0x80000000 /* memtest start address */
+#define CFG_MEMTEST_END 0x81000000 /* 16MB RAM test */
+#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
+#define CONFIG_STACKSIZE (256*1024) /* regular stack */
+#define PHYS_SDRAM_1 0x80000000 /* DDR Start */
+#define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */
+#define DDR_4BANKS /* 4-bank DDR2 (128MB) */
+/*====================*/
+/* Serial Driver info */
+/*====================*/
+#define CFG_NS16550
+#define CFG_NS16550_SERIAL
+#define CFG_NS16550_REG_SIZE 4 /* NS16550 register size */
+#define CFG_NS16550_COM1 0x01c20000 /* Base address of UART0 */
+#define CFG_NS16550_CLK 27000000 /* Input clock to NS16550 */
+#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
+#define CONFIG_BAUDRATE 115200 /* Default baud rate */
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+/*===================*/
+/* I2C Configuration */
+/*===================*/
+#define CONFIG_HARD_I2C
+#define CONFIG_DRIVER_DAVINCI_I2C
+#define CFG_I2C_SPEED 80000 /* 100Kbps won't work, silicon bug */
+#define CFG_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */
+/*==================================*/
+/* Network & Ethernet Configuration */
+/*==================================*/
+#define CONFIG_DRIVER_TI_EMAC
+#define CONFIG_MII
+#define CONFIG_BOOTP_DEFAULT
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_NET_RETRY_COUNT 10
+#define CONFIG_OVERWRITE_ETHADDR_ONCE
+/*=====================*/
+/* Flash & Environment */
+/*=====================*/
+#undef CFG_ENV_IS_IN_FLASH
+#define CFG_NO_FLASH
+#define CFG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
+#define CFG_ENV_SECT_SIZE 2048 /* Env sector Size */
+#define CFG_ENV_SIZE SZ_128K
+#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */
+#define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */
+#define CFG_NAND_BASE 0x02000000
+#define CFG_NAND_HW_ECC
+#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
+#define NAND_MAX_CHIPS 1
+#define CFG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */
+/*=====================*/
+/* Board related stuff */
+/*=====================*/
+/*==========================================*/
+/* I2C switch definitions for PCA9543 chip */
+/* on Lyrtech SFF SDR board. */
+/* This chip has a single register. */
+/*==========================================*/
+#define CFG_I2C_PCA9543_ADDR 0x70
+#define CFG_I2C_PCA9543_ADDR_LEN 0
+#define CFG_I2C_PCA9543_ENABLE_CH0 0x01 /* Enable channel 0. */
+/*==============================*/
+/* U-Boot general configuration */
+/*==============================*/
+#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */
+#define CONFIG_MISC_INIT_R
+#undef CONFIG_BOOTDELAY
+#define CONFIG_BOOTFILE "uImage" /* Boot file name */
+#define CFG_PROMPT "U-Boot > " /* Monitor Command Prompt */
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+/* Print buffer size */
+#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+#define CFG_LOAD_ADDR 0x80700000 /* Default Linux kernel
+ * load address. */
+#define CONFIG_VERSION_VARIABLE
+#define CONFIG_AUTO_COMPLETE /* Won't work with hush so far,
+ * may be later */
+#define CFG_HUSH_PARSER
+#define CFG_PROMPT_HUSH_PS2 "> "
+#define CONFIG_CMDLINE_EDITING
+#define CFG_LONGHELP
+#define CONFIG_CRC32_VERIFY
+#define CONFIG_MX_CYCLIC
+/*
+ * Define this to load an Integrity kernel.
+ *
+#define CONFIG_CMD_ELF
+ */
+
+/*===================*/
+/* Linux Information */
+/*===================*/
+#define LINUX_BOOT_PARAM_ADDR 0x80000100
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_BOOTARGS \
+ "mem=56M console=ttyS0,115200n8 root=/dev/hda1 rw noinitrd ip=dhcp"
+#define CONFIG_BOOTCOMMAND "setenv setboot setenv bootargs \\$(bootargs) video=dm64xxfb:output=\\$(videostd);run setboot"
+
+/*=================*/
+/* U-Boot commands */
+/*=================*/
+#include <config_cmd_default.h>
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SAVES
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_EEPROM
+#undef CONFIG_CMD_BDI
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_SETGETDCR
+#undef CONFIG_CMD_FLASH
+#undef CONFIG_CMD_IMLS
+/*=======================*/
+/* KGDB support (if any) */
+/*=======================*/
+#ifdef CONFIG_CMD_KGDB
+#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
+#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
+#endif
+#endif /* __CONFIG_H */
#define CONFIG_405 1 /* This is a PPC405 CPU */
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
+#define CONFIG_XILINX_405 1
#define CONFIG_XILINX_ML300 1 /* ...on a Xilinx ML300 board */
#define CONFIG_SYSTEMACE 1
#define CONFIG_BAUDRATE 115200
#define CONFIG_BOOTDELAY 3
#define CONFIG_BOOTARGS "console=ttySC0,115200 root=1f01"
-#define CONFIG_NETMASK 255.255.255.0
-#define CONFIG_IPADDR 192.168.0.22
-#define CONFIG_SERVERIP 192.168.0.1
-#define CONFIG_GATEWAYIP 192.168.0.1
#define CONFIG_VERSION_VARIABLE
#undef CONFIG_SHOW_BOOT_PROGRESS
#define CONFIG_BOOTARGS "console=ttySC0,115200"
#define CONFIG_ENV_OVERWRITE 1
-/* Network setting */
-#define CONFIG_NETMASK 255.0.0.0
-#define CONFIG_IPADDR 10.0.192.51
-#define CONFIG_SERVERIP 10.0.0.1
-#define CONFIG_GATEWAYIP 10.0.0.1
-
/* SDRAM */
#define CFG_SDRAM_BASE (0x8C000000)
#define CFG_SDRAM_SIZE (0x04000000)
#define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 32 * 1024 * 1024)
/* Address of u-boot image in Flash */
#define CFG_MONITOR_BASE (CFG_FLASH_BASE)
-#define CFG_MONITOR_LEN (128 * 1024)
+#define CFG_MONITOR_LEN (256 * 1024)
/* Size of DRAM reserved for malloc() use */
-#define CFG_MALLOC_LEN (256 * 1024)
+#define CFG_MALLOC_LEN (1024 * 1024)
/* size in bytes reserved for initial data */
#define CFG_GBL_DATA_SIZE (256)
#define CFG_BOOTMAPSZ (8 * 1024 * 1024)
/*
- * NOR Flash
+ * NOR Flash ( Spantion S29GL256P )
*/
#define CFG_FLASH_CFI
#define CFG_FLASH_CFI_DRIVER
-
-#if defined(CONFIG_R2DPLUS_OLD)
-#define CFG_FLASH_BASE (0xA0000000)
-#define CFG_MAX_FLASH_BANKS (1) /* Max number of
- * Flash memory banks
- */
-#define CFG_MAX_FLASH_SECT 142
-#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
-
-#else /* CONFIG_R2DPLUS_OLD */
-
#define CFG_FLASH_BASE (0xA0000000)
-#define CFG_FLASH_CFI_WIDTH 0x04 /* 32bit */
-#define CFG_MAX_FLASH_BANKS (2)
-#define CFG_MAX_FLASH_SECT 270
-#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE,\
- CFG_FLASH_BASE + 0x100000,\
- CFG_FLASH_BASE + 0x400000,\
- CFG_FLASH_BASE + 0x700000, }
-#endif /* CONFIG_R2DPLUS_OLD */
+#define CFG_MAX_FLASH_BANKS (1)
+#define CFG_MAX_FLASH_SECT 256
+#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
#define CFG_ENV_IS_IN_FLASH
-#define CFG_ENV_SECT_SIZE 0x20000
-#define CFG_ENV_SIZE (CFG_ENV_SECT_SIZE)
-#define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
-#define CFG_FLASH_ERASE_TOUT 120000
-#define CFG_FLASH_WRITE_TOUT 500
+#define CFG_ENV_SECT_SIZE 0x40000
+#define CFG_ENV_SIZE (CFG_ENV_SECT_SIZE)
+#define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
/*
* SuperH Clock setting
/*
* Configuation settings for the Renesas R7780MP board
*
- * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+ * Copyright (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* Copyright (C) 2008 Yusuke Goda <goda.yusuke@renesas.com>
*
* See file CREDITS for list of people who contributed to this
#define CONFIG_SH4A 1
#define CONFIG_CPU_SH7780 1
#define CONFIG_R7780MP 1
-#define __LITTLE_ENDIAN 1
+#define CFG_R7780MP_OLD_FLASH 1
+#define __LITTLE_ENDIAN__ 1
/*
* Command line configuration.
/* check for keypress on bootdelay==0 */
/*#define CONFIG_ZERO_BOOTDELAY_CHECK*/
-/* Network setting */
-#define CONFIG_NETMASK 255.0.0.0
-#define CONFIG_IPADDR 10.0.192.82
-#define CONFIG_SERVERIP 10.0.0.1
-#define CONFIG_GATEWAYIP 10.0.0.1
-
#define CFG_SDRAM_BASE (0x08000000)
#define CFG_SDRAM_SIZE (128 * 1024 * 1024)
#define CFG_MEMTEST_START (CFG_SDRAM_BASE)
#define CFG_MEMTEST_END (TEXT_BASE - 0x100000)
-/* NOR Flash (S29PL127J60TFI130) */
+/* Flash board support */
#define CFG_FLASH_BASE (0xA0000000)
-#define CFG_FLASH_CFI_WIDTH FLASH_CFI_32BIT
-#define CFG_MAX_FLASH_BANKS (2)
-#define CFG_MAX_FLASH_SECT 270
-#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE,\
+#ifdef CFG_R7780MP_OLD_FLASH
+/* NOR Flash (S29PL127J60TFI130) */
+# define CFG_FLASH_CFI_WIDTH FLASH_CFI_32BIT
+# define CFG_MAX_FLASH_BANKS (2)
+# define CFG_MAX_FLASH_SECT 270
+# define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE,\
CFG_FLASH_BASE + 0x100000,\
CFG_FLASH_BASE + 0x400000,\
CFG_FLASH_BASE + 0x700000, }
+#else /* CFG_R7780MP_OLD_FLASH */
+/* NOR Flash (Spantion S29GL256P) */
+# define CFG_MAX_FLASH_BANKS (1)
+# define CFG_MAX_FLASH_SECT 256
+# define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
+#endif /* CFG_R7780MP_OLD_FLASH */
#define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 4 * 1024 * 1024)
/* Address of u-boot image in Flash */
#define CFG_MONITOR_BASE (CFG_FLASH_BASE)
-#define CFG_MONITOR_LEN (112 * 1024)
+#define CFG_MONITOR_LEN (256 * 1024)
/* Size of DRAM reserved for malloc() use */
-#define CFG_MALLOC_LEN (256 * 1024)
+#define CFG_MALLOC_LEN (1204 * 1024)
/* size in bytes reserved for initial data */
#define CFG_GBL_DATA_SIZE (256)
#define CFG_FLASH_EMPTY_INFO
#define CFG_ENV_IS_IN_FLASH
-#define CFG_ENV_SECT_SIZE (16 * 1024)
+#define CFG_ENV_SECT_SIZE (256 * 1024)
#define CFG_ENV_SIZE (CFG_ENV_SECT_SIZE)
#define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
#define CFG_FLASH_ERASE_TOUT 120000
#endif /* CONFIG_CMD_PCI */
#if defined(CONFIG_CMD_NET)
-/* #define CONFIG_NET_MULTI
- #define CONFIG_RTL8169 */
+/*
+#define CONFIG_NET_MULTI
+#define CONFIG_RTL8169
+*/
/* AX88696L Support(NE2000 base chip) */
#define CONFIG_DRIVER_NE2000
#define CONFIG_DRIVER_AX88796L
#undef SPI_INIT /* no port initialization needed */
#define SPI_READ ((immr->im_ioport.iop_pdatd & I2C_MISO) != 0)
-#define SPI_SDA(bit) if(bit) immr->im_ioport.iop_pdatd |= I2C_MOSI; \
- else immr->im_ioport.iop_pdatd &= ~I2C_MOSI
-#define SPI_SCL(bit) if(bit) immr->im_ioport.iop_pdatd |= I2C_SCLK; \
- else immr->im_ioport.iop_pdatd &= ~I2C_SCLK
+#define SPI_SDA(bit) do { \
+ if(bit) immr->im_ioport.iop_pdatd |= I2C_MOSI; \
+ else immr->im_ioport.iop_pdatd &= ~I2C_MOSI; \
+ } while (0)
+#define SPI_SCL(bit) do { \
+ if(bit) immr->im_ioport.iop_pdatd |= I2C_SCLK; \
+ else immr->im_ioport.iop_pdatd &= ~I2C_SCLK; \
+ } while (0)
#define SPI_DELAY /* No delay is needed */
#endif /* CONFIG_SOFT_SPI */
#define CONFIG_CMD_SDRAM
#define CONFIG_CMD_FLASH
#define CONFIG_CMD_MEMORY
-#define CONFIG_CMD_NET
-#define CONFIG_CMD_PING
#define CONFIG_CMD_ENV
-#define CONFIG_CMD_NFS
-#define CONFIG_CMD_JFFS2
#define CONFIG_BOOTDELAY -1
#define CONFIG_BOOTARGS "console=ttySC2,115200 root=1f01"
#define CFG_BAUDRATE_TABLE { 115200 } /* List of legal baudrate
settings for this board */
-/* Ethernet */
-#define CONFIG_SH_ETHER 1
-#define CONFIG_SH_ETHER_USE_PORT (1)
-#define CONFIG_SH_ETHER_PHY_ADDR (0x01)
-#define CFG_RX_ETH_BUFFER (8)
-
/* SDRAM */
#define CFG_SDRAM_BASE (0x8C000000)
#define CFG_SDRAM_SIZE (64 * 1024 * 1024)
void do_reset (void);
unsigned long simple_strtoul(const char *cp,char **endp,unsigned int base);
char *getenv (char *name);
-void setenv (char *varname, char *varvalue);
+int setenv (char *varname, char *varvalue);
long simple_strtol(const char *cp,char **endp,unsigned int base);
int strcmp(const char * cs,const char * ct);
#ifdef CONFIG_HAS_UID
extern phys_addr_t __lmb_alloc_base(struct lmb *lmb, phys_size_t size, ulong align,
phys_addr_t max_addr);
extern int lmb_is_reserved(struct lmb *lmb, phys_addr_t addr);
+extern long lmb_free(struct lmb *lmb, u64 base, u64 size);
extern void lmb_dump_all(struct lmb *lmb);
#define _MMC_H_
#include <asm/arch/mmc.h>
+/* MMC command numbers */
+#define MMC_CMD_GO_IDLE_STATE 0
+#define MMC_CMD_SEND_OP_COND 1
+#define MMC_CMD_ALL_SEND_CID 2
+#define MMC_CMD_SET_RELATIVE_ADDR 3
+#define MMC_CMD_SET_DSR 4
+#define MMC_CMD_SELECT_CARD 7
+#define MMC_CMD_SEND_CSD 9
+#define MMC_CMD_SEND_CID 10
+#define MMC_CMD_SEND_STATUS 13
+#define MMC_CMD_SET_BLOCKLEN 16
+#define MMC_CMD_READ_SINGLE_BLOCK 17
+#define MMC_CMD_READ_MULTIPLE_BLOCK 18
+#define MMC_CMD_WRITE_BLOCK 24
+#define MMC_CMD_APP_CMD 55
+
+/* SD Card command numbers */
+#define SD_CMD_SEND_RELATIVE_ADDR 3
+#define SD_CMD_SWITCH 6
+#define SD_CMD_SEND_IF_COND 8
+
+#define SD_CMD_APP_SET_BUS_WIDTH 6
+#define SD_CMD_APP_SEND_OP_COND 41
+
int mmc_init(int verbose);
int mmc_read(ulong src, uchar *dst, int size);
int mmc_write(uchar *src, ulong dst, int size);
#define AHB_TOP 0xA4
#define AHB_BOT 0xA5
+#define SDR0_AHB_CFG 0x370
+#define SDR0_USB2HOST_CFG 0x371
#endif /* CONFIG_460EX || CONFIG_460GT */
#define SDR0_SDCS_SDD (0x80000000 >> 31)
--- /dev/null
+#ifndef _SHA256_H
+#define _SHA256_H
+
+#define SHA256_SUM_LEN 32
+
+typedef struct {
+ uint32_t total[2];
+ uint32_t state[8];
+ uint8_t buffer[64];
+} sha256_context;
+
+void sha256_starts(sha256_context * ctx);
+void sha256_update(sha256_context * ctx, uint8_t * input, uint32_t length);
+void sha256_finish(sha256_context * ctx, uint8_t digest[SHA256_SUM_LEN]);
+
+#endif /* _SHA256_H */
#ifndef _SPI_H_
#define _SPI_H_
+/* Controller-specific definitions: */
+
+/* CONFIG_HARD_SPI triggers SPI bus initialization in PowerPC */
+#ifdef CONFIG_MPC8XXX_SPI
+# ifndef CONFIG_HARD_SPI
+# define CONFIG_HARD_SPI
+# endif
+#endif
+
/* SPI mode flags */
#define SPI_CPHA 0x01 /* clock phase */
#define SPI_CPOL 0x02 /* clock polarity */
COBJS-y += ldiv.o
COBJS-$(CONFIG_MD5) += md5.o
COBJS-y += sha1.o
+COBJS-$(CONFIG_SHA256) += sha256.o
COBJS-y += string.o
COBJS-y += vsprintf.o
COBJS-y += zlib.o
}
/*
- * print sizes as "xxx kB", "xxx.y kB", "xxx MB" or "xxx.y MB" as needed;
- * allow for optional trailing string (like "\n")
+ * print sizes as "xxx kB", "xxx.y kB", "xxx MB", "xxx.y MB",
+ * xxx GB, or xxx.y GB as needed; allow for optional trailing string
+ * (like "\n")
*/
void print_size (phys_size_t size, const char *s)
{
- ulong m, n;
- ulong d = 1 << 20; /* 1 MB */
- char c = 'M';
-
- if (size < d) { /* print in kB */
- c = 'k';
- d = 1 << 10;
+ ulong m = 0, n;
+ phys_size_t d = 1 << 30; /* 1 GB */
+ char c = 'G';
+
+ if (size < d) { /* try MB */
+ c = 'M';
+ d = 1 << 20;
+ if (size < d) { /* print in kB */
+ c = 'k';
+ d = 1 << 10;
+ }
}
n = size / d;
- m = (10 * (size - (n * d)) + (d / 2) ) / d;
+ /* If there's a remainder, deal with it */
+ if(size % d) {
+ m = (10 * (size - (n * d)) + (d / 2) ) / d;
- if (m >= 10) {
- m -= 10;
- n += 1;
+ if (m >= 10) {
+ m -= 10;
+ n += 1;
+ }
}
printf ("%2ld", n);
return lmb_add_region(_rgn, base, size);
}
+long lmb_free(struct lmb *lmb, u64 base, u64 size)
+{
+ struct lmb_region *rgn = &(lmb->reserved);
+ u64 rgnbegin, rgnend;
+ u64 end = base + size;
+ int i;
+
+ rgnbegin = rgnend = 0; /* supress gcc warnings */
+
+ /* Find the region where (base, size) belongs to */
+ for (i=0; i < rgn->cnt; i++) {
+ rgnbegin = rgn->region[i].base;
+ rgnend = rgnbegin + rgn->region[i].size;
+
+ if ((rgnbegin <= base) && (end <= rgnend))
+ break;
+ }
+
+ /* Didn't find the region */
+ if (i == rgn->cnt)
+ return -1;
+
+ /* Check to see if we are removing entire region */
+ if ((rgnbegin == base) && (rgnend == end)) {
+ lmb_remove_region(rgn, i);
+ return 0;
+ }
+
+ /* Check to see if region is matching at the front */
+ if (rgnbegin == base) {
+ rgn->region[i].base = end;
+ rgn->region[i].size -= size;
+ return 0;
+ }
+
+ /* Check to see if the region is matching at the end */
+ if (rgnend == end) {
+ rgn->region[i].size -= size;
+ return 0;
+ }
+
+ /*
+ * We need to split the entry - adjust the current one to the
+ * beginging of the hole and add the region after hole.
+ */
+ rgn->region[i].size = base - rgn->region[i].base;
+ return lmb_add_region(rgn, end, rgnend - end);
+}
+
long lmb_reserve(struct lmb *lmb, phys_addr_t base, phys_size_t size)
{
struct lmb_region *_rgn = &(lmb->reserved);
{
long i, j;
phys_addr_t base = 0;
+ phys_addr_t res_base;
for (i = lmb->memory.cnt-1; i >= 0; i--) {
phys_addr_t lmbbase = lmb->memory.region[i].base;
phys_size_t lmbsize = lmb->memory.region[i].size;
+ if (lmbsize < size)
+ continue;
if (max_addr == LMB_ALLOC_ANYWHERE)
base = lmb_align_down(lmbbase + lmbsize - size, align);
else if (lmbbase < max_addr) {
} else
continue;
- while ((lmbbase <= base) &&
- ((j = lmb_overlaps_region(&(lmb->reserved), base, size)) >= 0) )
- base = lmb_align_down(lmb->reserved.region[j].base - size,
- align);
-
- if ((base != 0) && (lmbbase <= base))
- break;
+ while (base && lmbbase <= base) {
+ j = lmb_overlaps_region(&lmb->reserved, base, size);
+ if (j < 0) {
+ /* This area isn't reserved, take it */
+ if (lmb_add_region(&lmb->reserved, base,
+ lmb_align_up(size,
+ align)) < 0)
+ return 0;
+ return base;
+ }
+ res_base = lmb->reserved.region[j].base;
+ if (res_base < size)
+ break;
+ base = lmb_align_down(res_base - size, align);
+ }
}
-
- if (i < 0)
- return 0;
-
- if (lmb_add_region(&(lmb->reserved), base, lmb_align_up(size, align)) < 0)
- return 0;
-
- return base;
+ return 0;
}
int lmb_is_reserved(struct lmb *lmb, phys_addr_t addr)
--- /dev/null
+/*
+ * FIPS-180-2 compliant SHA-256 implementation
+ *
+ * Copyright (C) 2001-2003 Christophe Devine
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#ifndef USE_HOSTCC
+#include <common.h>
+#endif /* USE_HOSTCC */
+#include <watchdog.h>
+#include <linux/string.h>
+#include <sha256.h>
+
+/*
+ * 32-bit integer manipulation macros (big endian)
+ */
+#ifndef GET_UINT32_BE
+#define GET_UINT32_BE(n,b,i) { \
+ (n) = ( (unsigned long) (b)[(i) ] << 24 ) \
+ | ( (unsigned long) (b)[(i) + 1] << 16 ) \
+ | ( (unsigned long) (b)[(i) + 2] << 8 ) \
+ | ( (unsigned long) (b)[(i) + 3] ); \
+}
+#endif
+#ifndef PUT_UINT32_BE
+#define PUT_UINT32_BE(n,b,i) { \
+ (b)[(i) ] = (unsigned char) ( (n) >> 24 ); \
+ (b)[(i) + 1] = (unsigned char) ( (n) >> 16 ); \
+ (b)[(i) + 2] = (unsigned char) ( (n) >> 8 ); \
+ (b)[(i) + 3] = (unsigned char) ( (n) ); \
+}
+#endif
+
+void sha256_starts(sha256_context * ctx)
+{
+ ctx->total[0] = 0;
+ ctx->total[1] = 0;
+
+ ctx->state[0] = 0x6A09E667;
+ ctx->state[1] = 0xBB67AE85;
+ ctx->state[2] = 0x3C6EF372;
+ ctx->state[3] = 0xA54FF53A;
+ ctx->state[4] = 0x510E527F;
+ ctx->state[5] = 0x9B05688C;
+ ctx->state[6] = 0x1F83D9AB;
+ ctx->state[7] = 0x5BE0CD19;
+}
+
+void sha256_process(sha256_context * ctx, uint8_t data[64])
+{
+ uint32_t temp1, temp2;
+ uint32_t W[64];
+ uint32_t A, B, C, D, E, F, G, H;
+
+ GET_UINT32_BE(W[0], data, 0);
+ GET_UINT32_BE(W[1], data, 4);
+ GET_UINT32_BE(W[2], data, 8);
+ GET_UINT32_BE(W[3], data, 12);
+ GET_UINT32_BE(W[4], data, 16);
+ GET_UINT32_BE(W[5], data, 20);
+ GET_UINT32_BE(W[6], data, 24);
+ GET_UINT32_BE(W[7], data, 28);
+ GET_UINT32_BE(W[8], data, 32);
+ GET_UINT32_BE(W[9], data, 36);
+ GET_UINT32_BE(W[10], data, 40);
+ GET_UINT32_BE(W[11], data, 44);
+ GET_UINT32_BE(W[12], data, 48);
+ GET_UINT32_BE(W[13], data, 52);
+ GET_UINT32_BE(W[14], data, 56);
+ GET_UINT32_BE(W[15], data, 60);
+
+#define SHR(x,n) ((x & 0xFFFFFFFF) >> n)
+#define ROTR(x,n) (SHR(x,n) | (x << (32 - n)))
+
+#define S0(x) (ROTR(x, 7) ^ ROTR(x,18) ^ SHR(x, 3))
+#define S1(x) (ROTR(x,17) ^ ROTR(x,19) ^ SHR(x,10))
+
+#define S2(x) (ROTR(x, 2) ^ ROTR(x,13) ^ ROTR(x,22))
+#define S3(x) (ROTR(x, 6) ^ ROTR(x,11) ^ ROTR(x,25))
+
+#define F0(x,y,z) ((x & y) | (z & (x | y)))
+#define F1(x,y,z) (z ^ (x & (y ^ z)))
+
+#define R(t) \
+( \
+ W[t] = S1(W[t - 2]) + W[t - 7] + \
+ S0(W[t - 15]) + W[t - 16] \
+)
+
+#define P(a,b,c,d,e,f,g,h,x,K) { \
+ temp1 = h + S3(e) + F1(e,f,g) + K + x; \
+ temp2 = S2(a) + F0(a,b,c); \
+ d += temp1; h = temp1 + temp2; \
+}
+
+ A = ctx->state[0];
+ B = ctx->state[1];
+ C = ctx->state[2];
+ D = ctx->state[3];
+ E = ctx->state[4];
+ F = ctx->state[5];
+ G = ctx->state[6];
+ H = ctx->state[7];
+
+ P(A, B, C, D, E, F, G, H, W[0], 0x428A2F98);
+ P(H, A, B, C, D, E, F, G, W[1], 0x71374491);
+ P(G, H, A, B, C, D, E, F, W[2], 0xB5C0FBCF);
+ P(F, G, H, A, B, C, D, E, W[3], 0xE9B5DBA5);
+ P(E, F, G, H, A, B, C, D, W[4], 0x3956C25B);
+ P(D, E, F, G, H, A, B, C, W[5], 0x59F111F1);
+ P(C, D, E, F, G, H, A, B, W[6], 0x923F82A4);
+ P(B, C, D, E, F, G, H, A, W[7], 0xAB1C5ED5);
+ P(A, B, C, D, E, F, G, H, W[8], 0xD807AA98);
+ P(H, A, B, C, D, E, F, G, W[9], 0x12835B01);
+ P(G, H, A, B, C, D, E, F, W[10], 0x243185BE);
+ P(F, G, H, A, B, C, D, E, W[11], 0x550C7DC3);
+ P(E, F, G, H, A, B, C, D, W[12], 0x72BE5D74);
+ P(D, E, F, G, H, A, B, C, W[13], 0x80DEB1FE);
+ P(C, D, E, F, G, H, A, B, W[14], 0x9BDC06A7);
+ P(B, C, D, E, F, G, H, A, W[15], 0xC19BF174);
+ P(A, B, C, D, E, F, G, H, R(16), 0xE49B69C1);
+ P(H, A, B, C, D, E, F, G, R(17), 0xEFBE4786);
+ P(G, H, A, B, C, D, E, F, R(18), 0x0FC19DC6);
+ P(F, G, H, A, B, C, D, E, R(19), 0x240CA1CC);
+ P(E, F, G, H, A, B, C, D, R(20), 0x2DE92C6F);
+ P(D, E, F, G, H, A, B, C, R(21), 0x4A7484AA);
+ P(C, D, E, F, G, H, A, B, R(22), 0x5CB0A9DC);
+ P(B, C, D, E, F, G, H, A, R(23), 0x76F988DA);
+ P(A, B, C, D, E, F, G, H, R(24), 0x983E5152);
+ P(H, A, B, C, D, E, F, G, R(25), 0xA831C66D);
+ P(G, H, A, B, C, D, E, F, R(26), 0xB00327C8);
+ P(F, G, H, A, B, C, D, E, R(27), 0xBF597FC7);
+ P(E, F, G, H, A, B, C, D, R(28), 0xC6E00BF3);
+ P(D, E, F, G, H, A, B, C, R(29), 0xD5A79147);
+ P(C, D, E, F, G, H, A, B, R(30), 0x06CA6351);
+ P(B, C, D, E, F, G, H, A, R(31), 0x14292967);
+ P(A, B, C, D, E, F, G, H, R(32), 0x27B70A85);
+ P(H, A, B, C, D, E, F, G, R(33), 0x2E1B2138);
+ P(G, H, A, B, C, D, E, F, R(34), 0x4D2C6DFC);
+ P(F, G, H, A, B, C, D, E, R(35), 0x53380D13);
+ P(E, F, G, H, A, B, C, D, R(36), 0x650A7354);
+ P(D, E, F, G, H, A, B, C, R(37), 0x766A0ABB);
+ P(C, D, E, F, G, H, A, B, R(38), 0x81C2C92E);
+ P(B, C, D, E, F, G, H, A, R(39), 0x92722C85);
+ P(A, B, C, D, E, F, G, H, R(40), 0xA2BFE8A1);
+ P(H, A, B, C, D, E, F, G, R(41), 0xA81A664B);
+ P(G, H, A, B, C, D, E, F, R(42), 0xC24B8B70);
+ P(F, G, H, A, B, C, D, E, R(43), 0xC76C51A3);
+ P(E, F, G, H, A, B, C, D, R(44), 0xD192E819);
+ P(D, E, F, G, H, A, B, C, R(45), 0xD6990624);
+ P(C, D, E, F, G, H, A, B, R(46), 0xF40E3585);
+ P(B, C, D, E, F, G, H, A, R(47), 0x106AA070);
+ P(A, B, C, D, E, F, G, H, R(48), 0x19A4C116);
+ P(H, A, B, C, D, E, F, G, R(49), 0x1E376C08);
+ P(G, H, A, B, C, D, E, F, R(50), 0x2748774C);
+ P(F, G, H, A, B, C, D, E, R(51), 0x34B0BCB5);
+ P(E, F, G, H, A, B, C, D, R(52), 0x391C0CB3);
+ P(D, E, F, G, H, A, B, C, R(53), 0x4ED8AA4A);
+ P(C, D, E, F, G, H, A, B, R(54), 0x5B9CCA4F);
+ P(B, C, D, E, F, G, H, A, R(55), 0x682E6FF3);
+ P(A, B, C, D, E, F, G, H, R(56), 0x748F82EE);
+ P(H, A, B, C, D, E, F, G, R(57), 0x78A5636F);
+ P(G, H, A, B, C, D, E, F, R(58), 0x84C87814);
+ P(F, G, H, A, B, C, D, E, R(59), 0x8CC70208);
+ P(E, F, G, H, A, B, C, D, R(60), 0x90BEFFFA);
+ P(D, E, F, G, H, A, B, C, R(61), 0xA4506CEB);
+ P(C, D, E, F, G, H, A, B, R(62), 0xBEF9A3F7);
+ P(B, C, D, E, F, G, H, A, R(63), 0xC67178F2);
+
+ ctx->state[0] += A;
+ ctx->state[1] += B;
+ ctx->state[2] += C;
+ ctx->state[3] += D;
+ ctx->state[4] += E;
+ ctx->state[5] += F;
+ ctx->state[6] += G;
+ ctx->state[7] += H;
+}
+
+void sha256_update(sha256_context * ctx, uint8_t * input, uint32_t length)
+{
+ uint32_t left, fill;
+
+ if (!length)
+ return;
+
+ left = ctx->total[0] & 0x3F;
+ fill = 64 - left;
+
+ ctx->total[0] += length;
+ ctx->total[0] &= 0xFFFFFFFF;
+
+ if (ctx->total[0] < length)
+ ctx->total[1]++;
+
+ if (left && length >= fill) {
+ memcpy((void *) (ctx->buffer + left), (void *) input, fill);
+ sha256_process(ctx, ctx->buffer);
+ length -= fill;
+ input += fill;
+ left = 0;
+ }
+
+ while (length >= 64) {
+ sha256_process(ctx, input);
+ length -= 64;
+ input += 64;
+ }
+
+ if (length)
+ memcpy((void *) (ctx->buffer + left), (void *) input, length);
+}
+
+static uint8_t sha256_padding[64] = {
+ 0x80, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+void sha256_finish(sha256_context * ctx, uint8_t digest[32])
+{
+ uint32_t last, padn;
+ uint32_t high, low;
+ uint8_t msglen[8];
+
+ high = ((ctx->total[0] >> 29)
+ | (ctx->total[1] << 3));
+ low = (ctx->total[0] << 3);
+
+ PUT_UINT32_BE(high, msglen, 0);
+ PUT_UINT32_BE(low, msglen, 4);
+
+ last = ctx->total[0] & 0x3F;
+ padn = (last < 56) ? (56 - last) : (120 - last);
+
+ sha256_update(ctx, sha256_padding, padn);
+ sha256_update(ctx, msglen, 8);
+
+ PUT_UINT32_BE(ctx->state[0], digest, 0);
+ PUT_UINT32_BE(ctx->state[1], digest, 4);
+ PUT_UINT32_BE(ctx->state[2], digest, 8);
+ PUT_UINT32_BE(ctx->state[3], digest, 12);
+ PUT_UINT32_BE(ctx->state[4], digest, 16);
+ PUT_UINT32_BE(ctx->state[5], digest, 20);
+ PUT_UINT32_BE(ctx->state[6], digest, 24);
+ PUT_UINT32_BE(ctx->state[7], digest, 28);
+}
defined(CONFIG_SOFT_I2C)
#include <i2c.h>
#endif
-#if defined(CONFIG_HARD_SPI)
#include <spi.h>
-#endif
#include <nand.h>
static char *failed = "*** failed ***\n";
defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
bd->bi_pci_busfreq = get_PCI_freq ();
bd->bi_opbfreq = get_OPB_freq ();
-#elif defined(CONFIG_XILINX_ML300)
+#elif defined(CONFIG_XILINX_405)
bd->bi_pci_busfreq = get_PCI_freq ();
#endif
#endif
#include <asm/cache.h>
#endif
+#ifndef CFG_FDT_PAD
+#define CFG_FDT_PAD 0x3000
+#endif
+
DECLARE_GLOBAL_DATA_PTR;
extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
ft_board_setup(of_flat_tree, gd->bd);
#endif
}
+
+ /* Fixup the fdt memreserve now that we know how big it is */
+ if (of_flat_tree) {
+ int j;
+ uint64_t addr, size;
+ int total = fdt_num_mem_rsv(of_flat_tree);
+ uint actualsize;
+
+ for (j = 0; j < total; j++) {
+ fdt_get_mem_rsv(of_flat_tree, j, &addr, &size);
+ if (addr == (uint64_t)of_flat_tree) {
+ fdt_del_mem_rsv(of_flat_tree, j);
+ break;
+ }
+ }
+
+ /* Delete the old LMB reservation */
+ lmb_free(lmb, (uint64_t)of_flat_tree, fdt_totalsize(of_flat_tree));
+
+ /* Calculate the actual size of the fdt */
+ actualsize = fdt_off_dt_strings(of_flat_tree) +
+ fdt_size_dt_strings(of_flat_tree);
+
+ /* Make it so the fdt ends on a page boundary */
+ actualsize = ALIGN(actualsize, 0x1000);
+ actualsize = actualsize - ((uint)of_flat_tree & 0xfff);
+
+ /* Change the fdt header to reflect the correct size */
+ fdt_set_totalsize(of_flat_tree, actualsize);
+ of_size = actualsize;
+
+ /* Add the new reservation */
+ ret = fdt_add_mem_rsv(of_flat_tree, (uint)of_flat_tree,
+ of_size);
+
+ /* Create a new LMB reservation */
+ lmb_reserve(lmb, (ulong)of_flat_tree, of_size);
+ }
#endif /* CONFIG_OF_LIBFDT */
ret = boot_ramdisk_high (lmb, rd_data_start, rd_len, &initrd_start, &initrd_end);
#endif
/*
- * The blob must be within CFG_BOOTMAPSZ,
- * so we flag it to be copied if it is not.
+ * The blob needs to be inside the boot mapping.
*/
- if (fdt_blob >= (char *)CFG_BOOTMAPSZ)
+ if (fdt_blob < (char *)bootmap_base)
relocate = 1;
- of_len = be32_to_cpu (fdt_totalsize (fdt_blob));
+ if ((fdt_blob + *of_size + CFG_FDT_PAD) >=
+ ((char *)CFG_BOOTMAPSZ + bootmap_base))
+ relocate = 1;
/* move flattend device tree if needed */
if (relocate) {
int err;
- ulong of_start;
+ ulong of_start = 0;
/* position on a 4K boundary before the alloc_current */
+ /* Pad the FDT by a specified amount */
+ of_len = *of_size + CFG_FDT_PAD;
of_start = (unsigned long)lmb_alloc_base(lmb, of_len, 0x1000,
- (CFG_BOOTMAPSZ + bootmap_base));
+ (CFG_BOOTMAPSZ + bootmap_base));
if (of_start == 0) {
puts("device tree - allocation error\n");
}
debug ("## device tree at 0x%08lX ... 0x%08lX (len=%ld=0x%lX)\n",
- (ulong)fdt_blob, (ulong)fdt_blob + of_len - 1,
+ (ulong)fdt_blob, (ulong)fdt_blob + *of_size - 1,
of_len, of_len);
printf (" Loading Device Tree to %08lx, end %08lx ... ",
puts ("OK\n");
*of_flat_tree = (char *)of_start;
+ *of_size = of_len;
} else {
*of_flat_tree = fdt_blob;
- lmb_reserve(lmb, (ulong)working_fdt, of_len);
+ of_len = (CFG_BOOTMAPSZ + bootmap_base) - (ulong)fdt_blob;
+ lmb_reserve(lmb, (ulong)fdt_blob, of_len);
+ fdt_set_totalsize(*of_flat_tree, of_len);
+
+ *of_size = of_len;
}
return 0;
COBJS-y += board.o
COBJS-y += bootm.o
-#COBJS-y += time.o
+# COBJS-y += time.o
SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
return 0;
}
+#if defined(CONFIG_CMD_NET)
static int sh_net_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
return 0;
}
+#endif
typedef int (init_fnc_t) (void);
bd_t *bd;
init_fnc_t **init_fnc_ptr;
- char *s;
int i;
+ char *s;
memset (gd, 0, CFG_GBL_DATA_SIZE);
*/
#include <common.h>
-#include <asm/processer.h>
+#include <asm/processor.h>
static void tmu_timer_start (unsigned int timer)
{
}
if (i < post_list_size) {
+ WATCHDOG_RESET();
return post_run_single (post_list + i,
test_flags[i],
flags, i);
"DSP test",
"dsp",
"This test checks any connected DSP(s).",
- POST_RAM | POST_MANUAL,
+ POST_RAM | POST_ALWAYS | POST_MANUAL,
&dsp_post_test,
NULL,
NULL,
projects / u-boot / commitdiff
