]> git.sur5r.net Git - u-boot/commitdiff
zynqmp: gem: Flush the rx buffers while transmitting
authorSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Sat, 6 Dec 2014 07:27:53 +0000 (12:57 +0530)
committerMichal Simek <michal.simek@xilinx.com>
Tue, 28 Jul 2015 09:56:18 +0000 (11:56 +0200)
Flush and invalidate the rx buffers while sending the
tx packet it self as armv8 does flush also while doing
invalidation.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
drivers/net/zynq_gem.c

index df8452acc5bee63dfe1a8fea278472ca165ee701..eca7feeae94ad94498c9b1fddff0c705908ca4e9 100644 (file)
@@ -20,6 +20,7 @@
 #include <phy.h>
 #include <miiphy.h>
 #include <watchdog.h>
+#include <asm/system.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/sys_proto.h>
 
@@ -408,6 +409,11 @@ static int zynq_gem_send(struct eth_device *dev, void *ptr, int len)
        addr &= ~(ARCH_DMA_MINALIGN - 1);
        size = roundup(len, ARCH_DMA_MINALIGN);
        flush_dcache_range(addr, addr + size);
+
+       addr = (u32)priv->rxbuffers;
+       addr &= ~(ARCH_DMA_MINALIGN - 1);
+       size = roundup((RX_BUF * PKTSIZE_ALIGN), ARCH_DMA_MINALIGN);
+       flush_dcache_range(addr, addr + size);
        barrier();
 
        /* Start transmit */
@@ -443,8 +449,6 @@ static int zynq_gem_recv(struct eth_device *dev)
        if (frame_len) {
                u32 addr = current_bd->addr & ZYNQ_GEM_RXBUF_ADD_MASK;
                addr &= ~(ARCH_DMA_MINALIGN - 1);
-               u32 size = roundup(frame_len, ARCH_DMA_MINALIGN);
-               invalidate_dcache_range(addr, addr + size);
 
                net_process_received_packet((u8 *)addr, frame_len);
 
@@ -518,7 +522,7 @@ int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr,
        priv->rxbuffers = memalign(ARCH_DMA_MINALIGN, RX_BUF * PKTSIZE_ALIGN);
        memset(priv->rxbuffers, 0, RX_BUF * PKTSIZE_ALIGN);
 
-       /* Align bd_space to 1MB */
+       /* Align bd_space to MMU_SECTION_SHIFT */
        bd_space = memalign(1 << MMU_SECTION_SHIFT, BD_SPACE);
        mmu_set_region_dcache_behaviour((phys_addr_t)bd_space,
                                        BD_SPACE, DCACHE_OFF);