]> git.sur5r.net Git - u-boot/commitdiff
x86: queensbay: Avoid using PCH prefix
authorBin Meng <bmeng.cn@gmail.com>
Mon, 13 Apr 2015 11:03:42 +0000 (19:03 +0800)
committerSimon Glass <sjg@chromium.org>
Thu, 30 Apr 2015 00:51:48 +0000 (18:51 -0600)
The prefix PCH was taken from ivybridge port. However Queensbay
platform official document does not mention PCH. It is composed
of TunnelCreek processor and Topcliff IOH chipset. For accuracy,
avoid using PCH prefix in the macro.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
arch/x86/cpu/queensbay/tnc.c
arch/x86/include/asm/arch-queensbay/tnc.h

index b7236e7b60b2064c817cbd7f210956e5b0dfadc2..f756a0d6a56abb929255552c4a6e5e60b811e027 100644 (file)
@@ -16,9 +16,9 @@ static void unprotect_spi_flash(void)
 {
        u32 bc;
 
-       bc = x86_pci_read_config32(PCH_LPC_DEV, 0xd8);
+       bc = x86_pci_read_config32(TNC_LPC, 0xd8);
        bc |= 0x1;      /* unprotect the flash */
-       x86_pci_write_config32(PCH_LPC_DEV, 0xd8, bc);
+       x86_pci_write_config32(TNC_LPC, 0xd8, bc);
 }
 
 int arch_cpu_init(void)
index 67c5e0586c325f238f221ec553ced3b011637d4c..10ea51d0f1fe856216e0e92dbb14872ca61a1e4b 100644 (file)
@@ -9,7 +9,6 @@
 
 #include <pci.h>
 
-/* PCI Configuration Space (D31:F0): LPC */
-#define PCH_LPC_DEV    PCI_BDF(0, 0x1f, 0)
+#define TNC_LPC                PCI_BDF(0, 31, 0)
 
 #endif /* _X86_ARCH_TNC_H_ */