This has not been converted to Generic Board, so should be removed.
(See doc/README.generic-board for details.)
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
prompt "Target select"
optional
-config TARGET_CMI_MPC5XX
- bool "Support cmi_mpc5xx"
-
config TARGET_PATI
bool "Support PATI"
endchoice
-source "board/cmi/Kconfig"
source "board/mpl/pati/Kconfig"
endmenu
+++ /dev/null
-if TARGET_CMI_MPC5XX
-
-config SYS_BOARD
- default "cmi"
-
-config SYS_CONFIG_NAME
- default "cmi_mpc5xx"
-
-endif
+++ /dev/null
-CMI BOARD
-#M: -
-S: Maintained
-F: board/cmi/
-F: include/configs/cmi_mpc5xx.h
-F: configs/cmi_mpc5xx_defconfig
+++ /dev/null
-#
-# (C) Copyright 2001-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y := flash.o cmi.o
+++ /dev/null
-
-Summary:
-========
-
-This file contains information about the cmi board configuration.
-Please see cmi_mpc5xx_config for further details. The cmi board is
-a customer specific board but should work with small modifications
-on every board which has a MPC5xx and either a 28F128J3A,
-28F320J3A or 28F640J3A Intel flash mounted.
-
-Board Discription:
-==================
-
-* Motorola MPC555
-* RS232 connection
-* Intel flash 28F640J3A
-* Micron SRAM 1M
-* Altera PLD
-
-Bootstrap:
-==========
-
-In contrast to the usual boot sequence used in U-Boot, on the
-cmi board we don't boot from the external flash directly.
-Because of we use a 16-bit flash and don't sample a RCW
-from the data bus to set the startup buswidth to 16-bit.
-Unfortunatly the default width, sampled from the default RCW
-is 32-bit. For this reason we burn the proper RCW into the
-internal flash shadow location and boot after power-on or
-reset from the internal flash and then branch to 0x02000100
-where the U-Boot reset vector handler is located.
-
-Memory Map:
-===========
-
-Memory Map after relocation:
-
- 0x0000 0000 CONFIG_SYS_SDRAM_BASE
- :
- 0x000F 9FFF
- :
- :
- 0x0100 0000 CONFIG_SYS_IMMR (Internal memory map base adress)
- :
- 0x0130 7FFF
- :
- :
- 0x0200 0000 CONFIG_SYS_FLASH_BASE
- :
- 0x027C FFFF
- :
- :
- 0x0300 0000 PLD_BASE
-
-Flash Partition:
-
- 0x0200 0000 Block 0 and 1 contain U-Boot except
- : environment
- :
- 0x0201 FFFF
- 0x0202 0000 Block 2 contains environment (.ppcenv)
- :
- 0x0202 FFFF
-
-See README file for futher information about U-Boot relocation
-and partitioning.
-
-Tested Features:
-================
-
-* U-Boot commands: go, loads, loadb, all memory features, printenv,
- setenv, saveenv, protect, erase, fli, bdi, mtest, reset, version,
- coninfo, help (see configuration file for available commands)
-
-* Blinking led to indicate boot process
-
-Added or Changed Files:
-=======================
-
-u-boot-0.2.0/board/cmi/*
-u-boot-0.2.0/include/configs/cmi_mpc5xx.h
-
-Regards,
-Martin
+++ /dev/null
-/*
- * (C) Copyright 2003
- * Martin Winistoerfer, martinwinistoerfer@gmx.ch.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-/*
- * File: cmi.c
- *
- * Discription: For generic board specific functions
- *
- */
-
-
-#include <common.h>
-#include <mpc5xx.h>
-
-#define SRAM_SIZE 1024000L /* 1M RAM available*/
-
-#if defined(__APPLE__)
-/* Leading underscore on symbols */
-# define SYM_CHAR "_"
-#else /* No leading character on symbols */
-# define SYM_CHAR
-#endif
-
-/*
- * Macros to generate global absolutes.
- */
-#define GEN_SYMNAME(str) SYM_CHAR #str
-#define GEN_VALUE(str) #str
-#define GEN_ABS(name, value) \
- asm (".globl " GEN_SYMNAME(name)); \
- asm (GEN_SYMNAME(name) " = " GEN_VALUE(value))
-
-/*
- * Check the board
- */
-int checkboard(void)
-{
- puts ("Board: ### No HW ID - assuming CMI board\n");
- return (0);
-}
-
-/*
- * Get RAM size.
- */
-phys_size_t initdram(int board_type)
-{
- return (SRAM_SIZE); /* We currently have a static size adapted for cmi board. */
-}
-
-/*
- * Absolute environment address for linker file.
- */
-GEN_ABS(env_start, CONFIG_ENV_OFFSET + CONFIG_SYS_FLASH_BASE);
+++ /dev/null
-/*
- * (C) Copyright 2003
- * Martin Winistoerfer, martinwinistoerfer@gmx.ch.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-/*
- * File: flash.c
- *
- * Discription: This Driver is for 28F320J3A, 28F640J3A and
- * 28F128J3A Intel flashs working in 16 Bit mode.
- * They are single bank flashs.
- *
- * Most of this code is taken from existing u-boot
- * source code.
- */
-
-
-#include <common.h>
-#include <mpc5xx.h>
-
-#if defined(CONFIG_ENV_IS_IN_FLASH)
-# ifndef CONFIG_ENV_ADDR
-# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
-# endif
-# ifndef CONFIG_ENV_SIZE
-# define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
-# endif
-# ifndef CONFIG_ENV_SECT_SIZE
-# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
-# endif
-#endif
-
-#define FLASH_ID_MASK 0xFFFF
-#define FLASH_BLOCK_SIZE 0x00010000
-#define FLASH_CMD_READ_ID 0x0090
-#define FLASH_CMD_RESET 0x00ff
-#define FLASH_CMD_BLOCK_ERASE 0x0020
-#define FLASH_CMD_ERASE_CONFIRM 0x00D0
-#define FLASH_CMD_CLEAR_STATUS 0x0050
-#define FLASH_CMD_SUSPEND_ERASE 0x00B0
-#define FLASH_CMD_WRITE 0x0040
-#define FLASH_CMD_PROTECT 0x0060
-#define FLASH_CMD_PROTECT_SET 0x0001
-#define FLASH_CMD_PROTECT_CLEAR 0x00D0
-#define FLASH_STATUS_DONE 0x0080
-
-flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
-
-/*
- * Local function prototypes
- */
-static ulong flash_get_size (vu_short *addr, flash_info_t *info);
-static int write_short (flash_info_t *info, ulong dest, ushort data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-/*
- * Initialize flash
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size_b0;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-#if 1
- debug ("\n## Get flash bank 1 size @ 0x%08x\n",FLASH_BASE0_PRELIM);
-#endif
- size_b0 = flash_get_size((vu_short *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0: "
- "ID 0x%lx, Size = 0x%08lx = %ld MB\n",
- flash_info[0].flash_id,
- size_b0, size_b0<<20);
- }
-
- flash_get_offsets (FLASH_BASE0_PRELIM, &flash_info[0]);
-
- flash_info[0].size = size_b0;
-
-#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CONFIG_SYS_MONITOR_BASE,
- CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
-#ifdef CONFIG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CONFIG_ENV_ADDR,
- CONFIG_ENV_ADDR+CONFIG_ENV_SECT_SIZE-1,
- &flash_info[0]);
-#endif
-
- return size_b0;
-}
-
-/*
- * Compute start adress of each sector (block)
- */
-
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL:
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + i * FLASH_BLOCK_SIZE;
- }
- return;
-
- default:
- printf ("Don't know sector offsets for flash type 0x%lx\n",
- info->flash_id);
- return;
- }
-}
-
-/*
- * Print flash information
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("Fujitsu "); break;
- case FLASH_MAN_SST: printf ("SST "); break;
- case FLASH_MAN_STM: printf ("STM "); break;
- case FLASH_MAN_INTEL: printf ("Intel "); break;
- case FLASH_MAN_MT: printf ("MT "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F320J3A: printf ("28F320J3A (32Mbit) 16-Bit\n");
- break;
- case FLASH_28F640J3A: printf ("28F640J3A (64Mbit) 16-Bit\n");
- break;
- case FLASH_28F128J3A: printf ("28F128J3A (128Mbit) 16-Bit\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- if (info->size >= (1 << 20)) {
- i = 20;
- } else {
- i = 10;
- }
- printf (" Size: %ld %cB in %d Sectors\n",
- info->size >> i,
- (i == 20) ? 'M' : 'k',
- info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*
- * Get size of flash in bytes.
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (vu_short *addr, flash_info_t *info)
-{
- vu_short value;
-
- /* Read Manufacturer ID */
- addr[0] = FLASH_CMD_READ_ID;
- value = addr[0];
-
- switch (value) {
- case (AMD_MANUFACT & FLASH_ID_MASK):
- info->flash_id = FLASH_MAN_AMD;
- break;
- case (FUJ_MANUFACT & FLASH_ID_MASK):
- info->flash_id = FLASH_MAN_FUJ;
- break;
- case (SST_MANUFACT & FLASH_ID_MASK):
- info->flash_id = FLASH_MAN_SST;
- break;
- case (STM_MANUFACT & FLASH_ID_MASK):
- info->flash_id = FLASH_MAN_STM;
- break;
- case (INTEL_MANUFACT & FLASH_ID_MASK):
- info->flash_id = FLASH_MAN_INTEL;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- addr[0] = FLASH_CMD_RESET; /* restore read mode */
- return (0); /* no or unknown flash */
- }
-
- value = addr[1]; /* device ID */
-
- switch (value) {
- case (INTEL_ID_28F320J3A & FLASH_ID_MASK):
- info->flash_id += FLASH_28F320J3A;
- info->sector_count = 32;
- info->size = 0x00400000;
- break; /* => 32 MBit */
-
- case (INTEL_ID_28F640J3A & FLASH_ID_MASK):
- info->flash_id += FLASH_28F640J3A;
- info->sector_count = 64;
- info->size = 0x00800000;
- break; /* => 64 MBit */
-
- case (INTEL_ID_28F128J3A & FLASH_ID_MASK):
- info->flash_id += FLASH_28F128J3A;
- info->sector_count = 128;
- info->size = 0x01000000;
- break; /* => 128 MBit */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- addr[0] = FLASH_CMD_RESET; /* restore read mode */
- return (0); /* => no or unknown flash */
-
- }
-
- if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
- info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
- }
-
- addr[0] = FLASH_CMD_RESET; /* restore read mode */
-
- return (info->size);
-}
-
-
-/*
- * Erase unprotected sectors
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL) {
- printf ("Can erase only Intel flash types - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- start = get_timer (0);
- last = start;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- vu_short *addr = (vu_short *)(info->start[sect]);
- unsigned long status;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
-#ifdef DEBUG
- printf("Erase sector %d at start addr 0x%08X", sect, (unsigned int)info->start[sect]);
-#endif
-
- *addr = FLASH_CMD_CLEAR_STATUS;
- *addr = FLASH_CMD_BLOCK_ERASE;
- *addr = FLASH_CMD_ERASE_CONFIRM;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- while (((status = *addr) & FLASH_STATUS_DONE) != FLASH_STATUS_DONE) {
- if ((now=get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
- printf("Flash erase timeout at address %lx\n", info->start[sect]);
- *addr = FLASH_CMD_SUSPEND_ERASE;
- *addr = FLASH_CMD_RESET;
- return 1;
- }
-
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
- *addr = FLASH_CMD_RESET;
- }
- }
- printf (" done\n");
- return 0;
-}
-
-/*
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- ushort data;
- int i, rc;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return 4;
- }
-
- wp = (addr & ~1); /* get lower word aligned address */
-
- /*
- * handle unaligned start byte
- */
-
- if (addr - wp) {
- data = 0;
- data = (data << 8) | *src++;
- --cnt;
- if ((rc = write_short(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 2;
- }
-
- /*
- * handle word aligned part
- */
-
- while (cnt >= 2) {
- data = 0;
- for (i=0; i<2; ++i) {
- data = (data << 8) | *src++;
- }
-
- if ((rc = write_short(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 2;
- cnt -= 2;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
-
- data = 0;
- for (i=0, cp=wp; i<2 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<2; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_short(info, wp, data));
-
-}
-
-/*
- * Write 16 bit (short) to flash
- */
-
-static int write_short (flash_info_t *info, ulong dest, ushort data)
-{
- vu_short *addr = (vu_short*)(info->start[0]);
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_short *)dest) & data) != data) {
- return (2);
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- if (!(info->flash_id & FLASH_VENDMASK)) {
- return 4;
- }
- *addr = FLASH_CMD_ERASE_CONFIRM;
- *addr = FLASH_CMD_WRITE;
-
- *((vu_short *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag) {
- enable_interrupts();
- }
-
- /* data polling for D7 */
- start = get_timer (0);
-
- /* wait for error or finish */
- while(!(addr[0] & FLASH_STATUS_DONE)){
- if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
- addr[0] = FLASH_CMD_RESET;
- return (1);
- }
- }
-
- *addr = FLASH_CMD_RESET;
- return (0);
-}
-
-/*
- * Protects a flash sector
- */
-
-int flash_real_protect(flash_info_t *info, long sector, int prot)
-{
- vu_short *addr = (vu_short*)(info->start[sector]);
- ulong start;
-
- *addr = FLASH_CMD_CLEAR_STATUS;
- *addr = FLASH_CMD_PROTECT;
-
- if(prot) {
- *addr = FLASH_CMD_PROTECT_SET;
- } else {
- *addr = FLASH_CMD_PROTECT_CLEAR;
- }
-
- /* wait for error or finish */
- start = get_timer (0);
- while(!(addr[0] & FLASH_STATUS_DONE)){
- if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
- printf("Flash protect timeout at address %lx\n", info->start[sector]);
- addr[0] = FLASH_CMD_RESET;
- return (1);
- }
- }
- /* Set software protect flag */
- info->protect[sector] = prot;
- *addr = FLASH_CMD_RESET;
- return (0);
-}
+++ /dev/null
-CONFIG_PPC=y
-CONFIG_5xx=y
-CONFIG_TARGET_CMI_MPC5XX=y
-# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
Board Arch CPU Commit Removed Last known maintainer/contact
=================================================================================================
+cmi_mpc5xx powerpc mpc5xx - -
zeus powerpc ppc4xx - - Stefan Roese <sr@denx.de>
sbc405 powerpc ppc4xx - -
pcs440ep powerpc ppc4xx - - Stefan Roese <sr@denx.de>
+++ /dev/null
-/*
- * (C) Copyright 2003
- * Martin Winistoerfer, martinwinistoerfer@gmx.ch.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-/*
- * File: cmi_mpc5xx.h
- *
- * Discription: Config header file for cmi
- * board using an MPC5xx CPU
- *
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Configuration Options
- */
-
-#define CONFIG_MPC555 1 /* This is an MPC555 CPU */
-#define CONFIG_CMI 1 /* Using the customized cmi board */
-
-#define CONFIG_SYS_TEXT_BASE 0x02000000 /* Boot from flash at location 0x00000000 */
-
-/* Serial Console Configuration */
-#define CONFIG_5xx_CONS_SCI1
-#undef CONFIG_5xx_CONS_SCI2
-
-#define CONFIG_BAUDRATE 57600
-
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-#define CONFIG_CMD_ASKENV
-
-
-#if 0
-#define CONFIG_BOOTDELAY -1 /* autoboot disabled */
-#else
-#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
-#endif
-#define CONFIG_BOOTCOMMAND "go 02034004" /* autoboot command */
-
-#define CONFIG_BOOTARGS "" /* Assuming OS Image in 4 flash sector at offset 4004 */
-
-#define CONFIG_WATCHDOG /* turn on platform specific watchdog */
-
-#define CONFIG_STATUS_LED 1 /* Enable status led */
-
-#define CONFIG_LOADS_ECHO 1 /* Echo on for serial download */
-
-/*
- * Miscellaneous configurable options
- */
-
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
-#else
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-#endif
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-
-#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END 0x000fa000 /* 1 MB in SRAM */
-
-#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 1250000 }
-
-
-/*
- * Low Level Configuration Settings
- */
-
-/*
- * Internal Memory Mapped (This is not the IMMR content)
- */
-#define CONFIG_SYS_IMMR 0x01000000 /* Physical start adress of internal memory map */
-
-/*
- * Definitions for initial stack pointer and data area
- */
-#define CONFIG_SYS_INIT_RAM_ADDR (CONFIG_SYS_IMMR + 0x003f9800) /* Physical start adress of internal MPC555 writable RAM */
-#define CONFIG_SYS_INIT_RAM_SIZE (CONFIG_SYS_IMMR + 0x003fffff) /* Physical end adress of internal MPC555 used RAM area */
-#define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - CONFIG_SYS_INIT_RAM_ADDR) - GENERATED_GBL_DATA_SIZE) /* Offset from the beginning of ram */
-#define CONFIG_SYS_INIT_SP_ADDR 0x013fa000 /* Physical start adress of inital stack */
-
-/*
- * Start addresses for the final memory configuration
- * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
- */
-#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* Monitor won't change memory map */
-#define CONFIG_SYS_FLASH_BASE 0x02000000 /* External flash */
-#define PLD_BASE 0x03000000 /* PLD */
-#define ANYBUS_BASE 0x03010000 /* Anybus Module */
-
-#define CONFIG_SYS_RESET_ADRESS 0x01000000 /* Adress which causes reset */
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* CONFIG_SYS_TEXT_BASE is defined in the board config.mk file. */
- /* This adress is given to the linker with -Ttext to */
- /* locate the text section at this adress. */
-#define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */
-#define CONFIG_SYS_MALLOC_LEN (64 << 10) /* Reserve 128 kB for malloc() */
-
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
-
-
-/*-----------------------------------------------------------------------
- * FLASH organization
- *-----------------------------------------------------------------------
- *
- */
-
-#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Max number of memory banks */
-#define CONFIG_SYS_MAX_FLASH_SECT 64 /* Max number of sectors on one chip */
-#define CONFIG_SYS_FLASH_ERASE_TOUT 180000 /* Timeout for Flash Erase (in ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT 600 /* Timeout for Flash Write (in ms) */
-#define CONFIG_SYS_FLASH_PROTECTION 1 /* Physically section protection on */
-
-#define CONFIG_ENV_IS_IN_FLASH 1
-
-#ifdef CONFIG_ENV_IS_IN_FLASH
-#define CONFIG_ENV_OFFSET 0x00020000 /* Environment starts at this adress */
-#define CONFIG_ENV_SIZE 0x00010000 /* Set whole sector as env */
-#define CONFIG_SYS_USE_PPCENV /* Environment embedded in sect .ppcenv */
-#endif
-
-/*-----------------------------------------------------------------------
- * SYPCR - System Protection Control
- * SYPCR can only be written once after reset!
- *-----------------------------------------------------------------------
- * SW Watchdog freeze
- */
-#if defined(CONFIG_WATCHDOG)
-#define CONFIG_SYS_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | \
- SYPCR_SWE | SYPCR_SWRI| SYPCR_SWP)
-#else
-#define CONFIG_SYS_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | \
- SYPCR_SWP)
-#endif /* CONFIG_WATCHDOG */
-
-/*-----------------------------------------------------------------------
- * TBSCR - Time Base Status and Control
- *-----------------------------------------------------------------------
- * Clear Reference Interrupt Status, Timebase freezing enabled
- */
-#define CONFIG_SYS_TBSCR (TBSCR_REFA | TBSCR_REFB | TBSCR_TBF)
-
-/*-----------------------------------------------------------------------
- * PISCR - Periodic Interrupt Status and Control
- *-----------------------------------------------------------------------
- * Clear Periodic Interrupt Status, Interrupt Timer freezing enabled
- */
-#define CONFIG_SYS_PISCR (PISCR_PITF)
-
-/*-----------------------------------------------------------------------
- * SCCR - System Clock and reset Control Register
- *-----------------------------------------------------------------------
- * Set clock output, timebase and RTC source and divider,
- * power management and some other internal clocks
- */
-#define SCCR_MASK SCCR_EBDF00
-#define CONFIG_SYS_SCCR (SCCR_TBS | SCCR_RTDIV | SCCR_RTSEL | \
- SCCR_COM00 | SCCR_DFNL000 | SCCR_DFNH000)
-
-/*-----------------------------------------------------------------------
- * SIUMCR - SIU Module Configuration
- *-----------------------------------------------------------------------
- * Data show cycle
- */
-#define CONFIG_SYS_SIUMCR (SIUMCR_DBGC00) /* Disable data show cycle */
-
-/*-----------------------------------------------------------------------
- * PLPRCR - PLL, Low-Power, and Reset Control Register
- *-----------------------------------------------------------------------
- * Set all bits to 40 Mhz
- *
- */
-#define CONFIG_SYS_OSC_CLK ((uint)4000000) /* Oscillator clock is 4MHz */
-#define CONFIG_SYS_PLPRCR (PLPRCR_MF_9 | PLPRCR_DIVF_0)
-
-
-/*-----------------------------------------------------------------------
- * UMCR - UIMB Module Configuration Register
- *-----------------------------------------------------------------------
- *
- */
-#define CONFIG_SYS_UMCR (UMCR_FSPEED) /* IMB clock same as U-bus */
-
-/*-----------------------------------------------------------------------
- * ICTRL - I-Bus Support Control Register
- */
-#define CONFIG_SYS_ICTRL (ICTRL_ISCT_SER_7) /* Take out of serialized mode */
-
-/*-----------------------------------------------------------------------
- * USIU - Memory Controller Register
- *-----------------------------------------------------------------------
- */
-
-#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | BR_V | BR_BI | BR_PS_16)
-#define CONFIG_SYS_OR0_PRELIM (OR_ADDR_MK_FF | OR_SCY_3)
-#define CONFIG_SYS_BR1_PRELIM (ANYBUS_BASE)
-#define CONFIG_SYS_OR1_PRELIM (OR_ADDR_MK_FFFF | OR_SCY_1 | OR_ETHR)
-#define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_SDRAM_BASE | BR_V | BR_PS_32)
-#define CONFIG_SYS_OR2_PRELIM (OR_ADDR_MK_FF)
-#define CONFIG_SYS_BR3_PRELIM (PLD_BASE | BR_V | BR_BI | BR_LBDIR | BR_PS_8)
-#define CONFIG_SYS_OR3_PRELIM (OR_ADDR_MK_FF | OR_TRLX | OR_BSCY | OR_SCY_8 | \
- OR_ACS_10 | OR_ETHR | OR_CSNT)
-
-#define FLASH_BASE0_PRELIM CONFIG_SYS_FLASH_BASE /* We don't realign the flash */
-
-/*-----------------------------------------------------------------------
- * DER - Timer Decrementer
- *-----------------------------------------------------------------------
- * Initialise to zero
- */
-#define CONFIG_SYS_DER 0x00000000
-
-#endif /* __CONFIG_H */
* filling this file up with lots of custom board stuff.
*/
-/***** CMI ********************************************************/
-#elif defined(CONFIG_CMI)
-# define STATUS_LED_DIR im_mios.mios_mpiosm32ddr
-# define STATUS_LED_DAT im_mios.mios_mpiosm32dr
-
-# define STATUS_LED_BIT 0x2000 /* Select one of the 16 possible*/
- /* MIOS outputs */
-# define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) /* Blinking periode is 500 ms */
-# define STATUS_LED_STATE STATUS_LED_BLINKING
-
-# define STATUS_LED_ACTIVE 1 /* LED on for bit == 0 */
-# define STATUS_LED_BOOT 0 /* LED 0 used for boot status */
-
#elif defined(CONFIG_V38B)
# define STATUS_LED_BIT 0x0010 /* Timer7 GPIO */
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