]> git.sur5r.net Git - u-boot/commitdiff
ARM: mx25: Print the silicon revison
authorFabio Estevam <fabio.estevam@freescale.com>
Fri, 2 Sep 2011 05:38:54 +0000 (05:38 +0000)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>
Fri, 30 Sep 2011 20:00:59 +0000 (22:00 +0200)
Print the silicon revison during boot.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
arch/arm/cpu/arm926ejs/mx25/generic.c
arch/arm/include/asm/arch-mx25/imx-regs.h

index 76e4b5c39734964beb58df289b1e2710bf01cb5f..21fe44f187ac3e1d12b61f2e0d9463525d175d49 100644 (file)
@@ -105,12 +105,40 @@ ulong imx_get_perclk (int clk)
        return lldiv (fref, div);
 }
 
+
+u32 get_cpu_rev(void)
+{
+       u32 srev;
+       u32 system_rev = 0x25000;
+
+       /* read SREV register from IIM module */
+       struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
+       srev = readl(&iim->iim_srev);
+
+       switch (srev) {
+       case 0x00:
+               system_rev |= CHIP_REV_1_0;
+               break;
+       case 0x01:
+               system_rev |= CHIP_REV_1_1;
+               break;
+       default:
+               system_rev |= 0x8000;
+               break;
+       }
+
+       return system_rev;
+}
+
 #if defined(CONFIG_DISPLAY_CPUINFO)
 int print_cpuinfo (void)
 {
        char buf[32];
+       u32 cpurev = get_cpu_rev();
 
-       printf ("CPU:   Freescale i.MX25 at %s MHz\n\n",
+       printf("CPU:   Freescale i.MX25 rev%d.%d%s at %s MHz\n\n",
+               (cpurev & 0xF0) >> 4, (cpurev & 0x0F),
+               ((cpurev & 0x8000) ? " unknown" : ""),
                strmhz (buf, imx_get_armclk ()));
        return 0;
 }
index 9e30f7c2bc6dde9d4745f075e60801cc1f64bfde..47fc5178159d4b607f6ae0d29b5c9236ea2dbbe4 100644 (file)
@@ -351,4 +351,7 @@ struct aips_regs {
 #define GPIO3_BASE_ADDR                IMX_GPIO3_BASE
 #define GPIO4_BASE_ADDR                IMX_GPIO4_BASE
 
+#define CHIP_REV_1_0           0x10
+#define CHIP_REV_1_1           0x11
+
 #endif                         /* _IMX_REGS_H */