]> git.sur5r.net Git - u-boot/commitdiff
ddr: altera: sdram: Clean up set_sdr_mp_threshold()
authorMarek Vasut <marex@denx.de>
Sat, 1 Aug 2015 18:14:11 +0000 (20:14 +0200)
committerMarek Vasut <marex@denx.de>
Sat, 8 Aug 2015 12:14:26 +0000 (14:14 +0200)
Get rid of the constant clrsetbits_le32(), instead prepare the whole
content of the register once and write it at the end of the function.

Signed-off-by: Marek Vasut <marex@denx.de>
drivers/ddr/altera/sdram.c

index e41815b3a12775f14e976fecbb4b6aee71d07310..58fe26ef4aa4ecb0b2841d8fc0fc4b7c127030e1 100644 (file)
@@ -465,23 +465,21 @@ static void set_sdr_mp_pacing(void)
 
 static void set_sdr_mp_threshold(void)
 {
-       debug("Configuring MPTHRESHOLDRST_MPTHRESHOLDRST_0\n");
-       clrsetbits_le32(&sdr_ctrl->mp_threshold0,
-                       SDR_CTRLGRP_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0_MASK,
-                       CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0 <<
+       const u32 mp_threshold0 =
+               (CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0 <<
                        SDR_CTRLGRP_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0_LSB);
-
-       clrsetbits_le32(&sdr_ctrl->mp_threshold1,
-                       SDR_CTRLGRP_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32_MASK,
-                       CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32 <<
+       const u32 mp_threshold1 =
+               (CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32 <<
                        SDR_CTRLGRP_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32_LSB);
-
-       clrsetbits_le32(&sdr_ctrl->mp_threshold2,
-                       SDR_CTRLGRP_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64_MASK,
-                       CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64 <<
+       const u32 mp_threshold2 =
+               (CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64 <<
                        SDR_CTRLGRP_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64_LSB);
-}
 
+       debug("Configuring MPTHRESHOLDRST_MPTHRESHOLDRST_0\n");
+       writel(mp_threshold0, &sdr_ctrl->mp_threshold0);
+       writel(mp_threshold1, &sdr_ctrl->mp_threshold1);
+       writel(mp_threshold2, &sdr_ctrl->mp_threshold2);
+}
 
 /* Function to initialize SDRAM MMR */
 unsigned sdram_mmr_init_full(unsigned int sdr_phy_reg)