#include <dt-bindings/clock/bcm6328-clock.h>
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/power-domain/bcm6328-power-domain.h>
#include <dt-bindings/reset/bcm6328-reset.h>
#include "skeleton.dtsi"
status = "disabled";
};
+ periph_pwr: power-controller@10001848 {
+ compatible = "brcm,bcm6328-power-domain";
+ reg = <0x10001848 0x4>;
+ #power-domain-cells = <1>;
+ };
+
memory-controller@10003000 {
compatible = "brcm,bcm6328-mc";
reg = <0x10003000 0x1000>;
--- /dev/null
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __DT_BINDINGS_POWER_DOMAIN_BCM6328_H
+#define __DT_BINDINGS_POWER_DOMAIN_BCM6328_H
+
+#define BCM6328_PWR_ADSL2_MIPS 0
+#define BCM6328_PWR_ADSL2_PHY 1
+#define BCM6328_PWR_ADSL2_AFE 2
+#define BCM6328_PWR_SAR 3
+#define BCM6328_PWR_PCM 4
+#define BCM6328_PWR_USBD 5
+#define BCM6328_PWR_USBH 6
+#define BCM6328_PWR_PCIE 7
+#define BCM6328_PWR_ROBOSW 8
+#define BCM6328_PWR_EPHY 9
+
+#endif /* __DT_BINDINGS_POWER_DOMAIN_BCM6328_H */