&usb1 {
status = "okay";
};
-
-/* for U-Boot only */
-&serial0 {
- u-boot,dm-pre-reloc;
-};
-
-&pinctrl_uart0 {
- u-boot,dm-pre-reloc;
-};
#size-cells = <1>;
ranges;
interrupt-parent = <&intc>;
- u-boot,dm-pre-reloc;
l2: l2-cache@500c0000 {
compatible = "socionext,uniphier-system-cache";
compatible = "socionext,uniphier-ld4-soc-glue",
"simple-mfd", "syscon";
reg = <0x5f800000 0x2000>;
- u-boot,dm-pre-reloc;
pinctrl: pinctrl {
compatible = "socionext,uniphier-ld4-pinctrl";
- u-boot,dm-pre-reloc;
};
};
&usb1 {
status = "okay";
};
-
-/* for U-Boot only */
-&serial0 {
- u-boot,dm-pre-reloc;
-};
-
-&pinctrl_uart0 {
- u-boot,dm-pre-reloc;
-};
&usb3 {
status = "okay";
};
-
-/* for U-Boot only */
-&serial0 {
- u-boot,dm-pre-reloc;
-};
-
-&pinctrl_uart0 {
- u-boot,dm-pre-reloc;
-};
&usb1 {
status = "okay";
};
-
-/* for U-Boot only */
-&serial0 {
- u-boot,dm-pre-reloc;
-};
-
-&pinctrl_uart0 {
- u-boot,dm-pre-reloc;
-};
&usb3 {
status = "okay";
};
-
-/* for U-Boot only */
-&serial0 {
- u-boot,dm-pre-reloc;
-};
-
-&mio_clk {
- u-boot,dm-pre-reloc;
-};
-
-&emmc {
- u-boot,dm-pre-reloc;
-};
-
-&pinctrl_uart0 {
- u-boot,dm-pre-reloc;
-};
-
-&pinctrl_emmc {
- u-boot,dm-pre-reloc;
-};
#size-cells = <1>;
ranges;
interrupt-parent = <&intc>;
- u-boot,dm-pre-reloc;
l2: l2-cache@500c0000 {
compatible = "socionext,uniphier-system-cache";
compatible = "socionext,uniphier-pro4-mioctrl",
"simple-mfd", "syscon";
reg = <0x59810000 0x800>;
- u-boot,dm-pre-reloc;
mio_clk: clock {
compatible = "socionext,uniphier-pro4-mio-clock";
compatible = "socionext,uniphier-pro4-soc-glue",
"simple-mfd", "syscon";
reg = <0x5f800000 0x2000>;
- u-boot,dm-pre-reloc;
pinctrl: pinctrl {
compatible = "socionext,uniphier-pro4-pinctrl";
- u-boot,dm-pre-reloc;
};
};
&sd {
status = "okay";
};
-
-/* for U-Boot only */
-&serial1 {
- u-boot,dm-pre-reloc;
-};
-
-&pinctrl_uart1 {
- u-boot,dm-pre-reloc;
-};
#size-cells = <1>;
ranges;
interrupt-parent = <&intc>;
- u-boot,dm-pre-reloc;
l2: l2-cache@500c0000 {
compatible = "socionext,uniphier-system-cache";
compatible = "socionext,uniphier-pro5-sdctrl",
"simple-mfd", "syscon";
reg = <0x59810000 0x400>;
- u-boot,dm-pre-reloc;
sd_clk: clock {
compatible = "socionext,uniphier-pro5-sd-clock";
compatible = "socionext,uniphier-pro5-soc-glue",
"simple-mfd", "syscon";
reg = <0x5f800000 0x2000>;
- u-boot,dm-pre-reloc;
pinctrl: pinctrl {
compatible = "socionext,uniphier-pro5-pinctrl";
- u-boot,dm-pre-reloc;
};
};
&usb1 {
status = "okay";
};
-
-/* for U-Boot only */
-&serial2 {
- u-boot,dm-pre-reloc;
-};
-
-&sd_clk {
- u-boot,dm-pre-reloc;
-};
-
-&emmc {
- u-boot,dm-pre-reloc;
-};
-
-&pinctrl_uart2 {
- u-boot,dm-pre-reloc;
-};
-
-&pinctrl_emmc {
- u-boot,dm-pre-reloc;
-};
&usb0 {
status = "okay";
};
-
-/* for U-Boot only */
-&serial2 {
- u-boot,dm-pre-reloc;
-};
-
-&sd_clk {
- u-boot,dm-pre-reloc;
-};
-
-&emmc {
- u-boot,dm-pre-reloc;
-};
-
-&pinctrl_uart2 {
- u-boot,dm-pre-reloc;
-};
-
-&pinctrl_emmc {
- u-boot,dm-pre-reloc;
-};
#size-cells = <1>;
ranges;
interrupt-parent = <&intc>;
- u-boot,dm-pre-reloc;
l2: l2-cache@500c0000 {
compatible = "socionext,uniphier-system-cache";
compatible = "socionext,uniphier-pxs2-sdctrl",
"simple-mfd", "syscon";
reg = <0x59810000 0x400>;
- u-boot,dm-pre-reloc;
sd_clk: clock {
compatible = "socionext,uniphier-pxs2-sd-clock";
compatible = "socionext,uniphier-pxs2-soc-glue",
"simple-mfd", "syscon";
reg = <0x5f800000 0x2000>;
- u-boot,dm-pre-reloc;
pinctrl: pinctrl {
compatible = "socionext,uniphier-pxs2-pinctrl";
- u-boot,dm-pre-reloc;
};
};
&usb2 {
status = "okay";
};
-
-/* for U-Boot only */
-&serial0 {
- u-boot,dm-pre-reloc;
-};
-
-&pinctrl_uart0 {
- u-boot,dm-pre-reloc;
-};
#size-cells = <1>;
ranges;
interrupt-parent = <&intc>;
- u-boot,dm-pre-reloc;
l2: l2-cache@500c0000 {
compatible = "socionext,uniphier-system-cache";
compatible = "socionext,uniphier-sld8-soc-glue",
"simple-mfd", "syscon";
reg = <0x5f800000 0x2000>;
- u-boot,dm-pre-reloc;
pinctrl: pinctrl {
compatible = "socionext,uniphier-sld8-pinctrl";
- u-boot,dm-pre-reloc;
};
};
--- /dev/null
+/ {
+ soc {
+ u-boot,dm-pre-reloc;
+
+ serial@54006800 {
+ u-boot,dm-pre-reloc;
+ };
+
+ serial@54006900 {
+ u-boot,dm-pre-reloc;
+ };
+
+ serial@54006a00 {
+ u-boot,dm-pre-reloc;
+ };
+
+ mioctrl@59810000 {
+ u-boot,dm-pre-reloc;
+
+ clock {
+ u-boot,dm-pre-reloc;
+ };
+ };
+
+ sdctrl@59810000 {
+ u-boot,dm-pre-reloc;
+
+ clock {
+ u-boot,dm-pre-reloc;
+ };
+ };
+
+ soc-glue@5f800000 {
+ u-boot,dm-pre-reloc;
+
+ pinctrl {
+ u-boot,dm-pre-reloc;
+
+ emmc_grp {
+ u-boot,dm-pre-reloc;
+ };
+
+ uart0_grp {
+ u-boot,dm-pre-reloc;
+ };
+
+ uart1_grp {
+ u-boot,dm-pre-reloc;
+ };
+
+ uart2_grp {
+ u-boot,dm-pre-reloc;
+ };
+ };
+ };
+ };
+};
+
+&emmc {
+ u-boot,dm-pre-reloc;
+};
The command "ddrmphy" shows the resulting parameters of DDR Multi PHY
training; it is useful for the evaluation of DDR Multi PHY training.
+config SYS_SOC
+ default "uniphier-v7" if ARCH_UNIPHIER_LD4_SLD8 || ARCH_UNIPHIER_V7_MULTI
endif