Only clear IRE bit in qixis brdcfg5 register and keep other bits
unchanged.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
 #define QIXIS_DDRCLK_125               0x2
 #define QIXIS_DDRCLK_133               0x3
 
-#define BRDCFG5_RESET                  0x00
+#define BRDCFG5_IRE                    0x20    /* i2c Remote i2c1 enable */
 
 #define BRDCFG12_SD3EN_MASK            0x20
 #define BRDCFG12_SD3MX_MASK            0x08
 
        setup_portals();
 #endif
 
-       /* Disable remote I2C connectoin */
-       QIXIS_WRITE(brdcfg[5], BRDCFG5_RESET);
+       /* Disable remote I2C connection to qixis fpga */
+       QIXIS_WRITE(brdcfg[5], QIXIS_READ(brdcfg[5]) & ~BRDCFG5_IRE);
 
        /*
         * Adjust core voltage according to voltage ID