]> git.sur5r.net Git - u-boot/commitdiff
drivers: net: cpsw: add support to have phy address from cpsw platform data
authorMugunthan V N <mugunthanvnm@ti.com>
Tue, 18 Feb 2014 12:31:52 +0000 (07:31 -0500)
committerTom Rini <trini@ti.com>
Tue, 4 Mar 2014 14:41:53 +0000 (09:41 -0500)
Some platforms like AM437x have different EVMs with different phy addresses,
so this patch adds support for passing phy address via cpsw plaform data.
Also renamed phy_id to phy_addr so better understanding of the code.

Reviewed-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
[trini: Update BuR am335x_igep0033 pcm051_rev3 pcm051_rev1 cm_t335
pengwyn boards]
Signed-off-by: Tom Rini <trini@ti.com>
24 files changed:
board/BuR/common/common.c
board/compulab/cm_t335/cm_t335.c
board/isee/igep0033/board.c
board/phytec/pcm051/board.c
board/siemens/dxr2/board.c
board/siemens/pxm2/board.c
board/siemens/rut/board.c
board/silica/pengwyn/board.c
board/ti/am335x/board.c
board/ti/dra7xx/evm.c
board/ti/ti814x/evm.c
drivers/net/cpsw.c
include/configs/am335x_evm.h
include/configs/am335x_igep0033.h
include/configs/bur_am335x_common.h
include/configs/cm_t335.h
include/configs/dra7xx_evm.h
include/configs/dxr2.h
include/configs/pcm051.h
include/configs/pengwyn.h
include/configs/pxm2.h
include/configs/rut.h
include/configs/ti814x_evm.h
include/cpsw.h

index 6d187eaab209fbe07c89e69427b567d5b264f047..04f3f1f4b2363c8da90c54bef07e9db5a1cdcc96 100644 (file)
@@ -141,12 +141,12 @@ static struct cpsw_slave_data cpsw_slaves[] = {
        {
                .slave_reg_ofs  = 0x208,
                .sliver_reg_ofs = 0xd80,
-               .phy_id         = 0,
+               .phy_addr       = 0,
        },
        {
                .slave_reg_ofs  = 0x308,
                .sliver_reg_ofs = 0xdc0,
-               .phy_id         = 1,
+               .phy_addr       = 1,
        },
 };
 
index 01019e8eb2fec00ef924c035bb2b70a8b9feb07c..9583149bed61bd315dcea3c6abdfa1b1c9226a49 100644 (file)
@@ -47,7 +47,7 @@ static void cpsw_control(int enabled)
 static struct cpsw_slave_data cpsw_slave = {
        .slave_reg_ofs  = 0x208,
        .sliver_reg_ofs = 0xd80,
-       .phy_id         = 0,
+       .phy_addr       = 0,
        .phy_if         = PHY_INTERFACE_MODE_RGMII,
 };
 
index 089a835e0c6cfe671e39df73ed81b4afaebaeed5..9f8fcf2c1cfcc29eaede937af3f4690bb8c7c8c7 100644 (file)
@@ -116,7 +116,7 @@ static struct cpsw_slave_data cpsw_slaves[] = {
        {
                .slave_reg_ofs  = 0x208,
                .sliver_reg_ofs = 0xd80,
-               .phy_id         = 0,
+               .phy_addr       = 0,
                .phy_if         = PHY_INTERFACE_MODE_RMII,
        },
 };
index 7e5e07ff232a6834a36ae63a6f60338ce69eddd7..1071662ea9e2220fdcbf439dc7673b4caaa5b658 100644 (file)
@@ -176,13 +176,13 @@ static struct cpsw_slave_data cpsw_slaves[] = {
        {
                .slave_reg_ofs  = 0x208,
                .sliver_reg_ofs = 0xd80,
-               .phy_id         = 0,
+               .phy_addr       = 0,
                .phy_if         = PHY_INTERFACE_MODE_RGMII,
        },
        {
                .slave_reg_ofs  = 0x308,
                .sliver_reg_ofs = 0xdc0,
-               .phy_id         = 1,
+               .phy_addr       = 1,
                .phy_if         = PHY_INTERFACE_MODE_RGMII,
        },
 };
index 6c316faa8f1aad9d9fd62c49aeb855c7ec7113f3..9b8f538312ebb2a97fda8c85d85ffebc168154e5 100644 (file)
@@ -198,7 +198,7 @@ static struct cpsw_slave_data cpsw_slaves[] = {
        {
                .slave_reg_ofs  = 0x208,
                .sliver_reg_ofs = 0xd80,
-               .phy_id         = 0,
+               .phy_addr       = 0,
                .phy_if         = PHY_INTERFACE_MODE_MII,
        },
 };
index ef3d6cc158d71d16221654bc057c2be1f943ca56..98083d52cd9d6fc163de36998d13236dbc45c00d 100644 (file)
@@ -181,13 +181,13 @@ static struct cpsw_slave_data cpsw_slaves[] = {
        {
                .slave_reg_ofs  = 0x208,
                .sliver_reg_ofs = 0xd80,
-               .phy_id         = 0,
+               .phy_addr       = 0,
                .phy_if         = PHY_INTERFACE_MODE_RMII,
        },
        {
                .slave_reg_ofs  = 0x308,
                .sliver_reg_ofs = 0xdc0,
-               .phy_id         = 1,
+               .phy_addr       = 1,
                .phy_if         = PHY_INTERFACE_MODE_RMII,
        },
 };
index 25ab54d9a2a5142f0d6bbf1d1122c15a0dd8d16f..e0ada3f6a5fa6edaabb29e5c87c62582f7ee7ea7 100644 (file)
@@ -143,13 +143,13 @@ static struct cpsw_slave_data cpsw_slaves[] = {
        {
                .slave_reg_ofs  = 0x208,
                .sliver_reg_ofs = 0xd80,
-               .phy_id         = 1,
+               .phy_addr       = 1,
                .phy_if         = PHY_INTERFACE_MODE_RMII,
        },
        {
                .slave_reg_ofs  = 0x308,
                .sliver_reg_ofs = 0xdc0,
-               .phy_id         = 0,
+               .phy_addr       = 0,
                .phy_if         = PHY_INTERFACE_MODE_RMII,
        },
 };
index a553129d29df6fca89faee6e2501d4ba0c38f37f..ee88b6f39908641b6c403e7c0cdbcb82c7e0e897 100644 (file)
@@ -141,13 +141,13 @@ static struct cpsw_slave_data cpsw_slaves[] = {
        {
                .slave_reg_ofs  = 0x208,
                .sliver_reg_ofs = 0xd80,
-               .phy_id         = 0,
+               .phy_addr       = 0,
                .phy_if         = PHY_INTERFACE_MODE_MII,
        },
        {
                .slave_reg_ofs  = 0x308,
                .sliver_reg_ofs = 0xdc0,
-               .phy_id         = 1,
+               .phy_addr       = 1,
                .phy_if         = PHY_INTERFACE_MODE_MII,
        },
 };
index 57217688d635e40d7fb500348cc4a85a1d53e889..862f966e7cfaa722c14202cdccc1876fa418dec3 100644 (file)
@@ -544,12 +544,12 @@ static struct cpsw_slave_data cpsw_slaves[] = {
        {
                .slave_reg_ofs  = 0x208,
                .sliver_reg_ofs = 0xd80,
-               .phy_id         = 0,
+               .phy_addr       = 0,
        },
        {
                .slave_reg_ofs  = 0x308,
                .sliver_reg_ofs = 0xdc0,
-               .phy_id         = 1,
+               .phy_addr       = 1,
        },
 };
 
index bed828584bf73bbd656c39e0eacc0556e5ddca09..7990e7990d41ef8d4b631bff61ec93ad6ba4f32a 100644 (file)
@@ -149,12 +149,12 @@ static struct cpsw_slave_data cpsw_slaves[] = {
        {
                .slave_reg_ofs  = 0x208,
                .sliver_reg_ofs = 0xd80,
-               .phy_id         = 0,
+               .phy_addr       = 2,
        },
        {
                .slave_reg_ofs  = 0x308,
                .sliver_reg_ofs = 0xdc0,
-               .phy_id         = 1,
+               .phy_addr       = 3,
        },
 };
 
index 140ad7103ad2ad5e19b16a9ea1255a0fba617d4a..54b3dfb82c5487e8e4634c2271bcd176612afefa 100644 (file)
@@ -132,12 +132,12 @@ static struct cpsw_slave_data cpsw_slaves[] = {
        {
                .slave_reg_ofs  = 0x50,
                .sliver_reg_ofs = 0x700,
-               .phy_id         = 1,
+               .phy_addr       = 1,
        },
        {
                .slave_reg_ofs  = 0x90,
                .sliver_reg_ofs = 0x740,
-               .phy_id         = 0,
+               .phy_addr       = 0,
        },
 };
 
index 50167aab63a8a2a43725c2567936ab06b3b19109..dd6c26a7fb3af4916f4bba73275c40c03e19c08b 100644 (file)
@@ -656,7 +656,7 @@ static void cpsw_slave_init(struct cpsw_slave *slave, struct cpsw_priv *priv)
 
        cpsw_ale_add_mcast(priv, NetBcastAddr, 1 << slave_port);
 
-       priv->phy_mask |= 1 << slave->data->phy_id;
+       priv->phy_mask |= 1 << slave->data->phy_addr;
 }
 
 static struct cpdma_desc *cpdma_desc_alloc(struct cpsw_priv *priv)
@@ -948,7 +948,7 @@ static int cpsw_phy_init(struct eth_device *dev, struct cpsw_slave *slave)
                        SUPPORTED_1000baseT_Full);
 
        phydev = phy_connect(priv->bus,
-                       CONFIG_PHY_ADDR,
+                       slave->data->phy_addr,
                        dev,
                        slave->data->phy_if);
 
index 59a8f36d16947d45b8726fac86973307a40db7d2..23c056c82cb6ed006b8434e0fd559a80cfc367d6 100644 (file)
 /* Network. */
 #define CONFIG_PHY_GIGE
 #define CONFIG_PHYLIB
-#define CONFIG_PHY_ADDR                        0
 #define CONFIG_PHY_SMSC
 
 /* NAND support */
index 115d1b37c9e9439b17d949c7e1a4d6220a284401..e72ee05ec8c85fc0f41cf559f2319f6c78d3b03f 100644 (file)
 #define CONFIG_NET_RETRY_COUNT         10
 #define CONFIG_NET_MULTI
 #define CONFIG_PHYLIB
-#define CONFIG_PHY_ADDR                        0
 #define CONFIG_PHY_SMSC
 
 /* NAND support */
index 1f57bd2744f7664530c60387ab7c187b8bb79f98..7bbe5964ae801df692e1ded4f71457168e32d71e 100644 (file)
@@ -51,7 +51,6 @@
 #define CONFIG_MII                     /* Required in net/eth.c */
 #define CONFIG_SPL_ETH_SUPPORT
 #define CONFIG_PHYLIB
-#define CONFIG_PHY_ADDR                        1
 #define CONFIG_PHY_NATSEMI
 #define CONFIG_SPL_NET_SUPPORT
 #define CONFIG_SPL_ENV_SUPPORT         /* used for a fetching MAC-Address */
index 56e9a8e0e82f01b8d25cf008d8529483e3c35006..26b615b8c507428e54bdc10da70d376e29e5ed57 100644 (file)
 /* Network. */
 #define CONFIG_PHY_GIGE
 #define CONFIG_PHYLIB
-#define CONFIG_PHY_ADDR                        0
 #define CONFIG_PHY_ATHEROS
 
 /* NAND support */
index c67cf60c0c6b4effc0624bbff17ed0f3a3ad5597..291c538a3466908e58423747a1bfde651048eb8b 100644 (file)
@@ -62,7 +62,6 @@
 #define CONFIG_MII                     /* Required in net/eth.c */
 #define CONFIG_PHY_GIGE                        /* per-board part of CPSW */
 #define CONFIG_PHYLIB
-#define CONFIG_PHY_ADDR                        2
 
 /* SPI */
 #undef CONFIG_OMAP3_SPI
index 1e42f5c23c909c6226903ed554db777aa17913ab..e95d74c04c74c8376416c1c5b062e306c1bef3dc 100644 (file)
@@ -49,7 +49,6 @@
 
 #undef CONFIG_MII
 #undef CONFIG_PHY_GIGE
-#define CONFIG_PHY_ADDR                        0
 #define CONFIG_PHY_SMSC
 
 #define CONFIG_FACTORYSET
index 6f41ee771832de055a034028e4c0f8897ac6e943..9af3efd4b1ab1366c219b39e6a9ce57da22d9078 100644 (file)
 #define CONFIG_NET_MULTI
 #define CONFIG_PHY_GIGE
 #define CONFIG_PHYLIB
-#define CONFIG_PHY_ADDR                        0
 #define CONFIG_PHY_SMSC
 
 #endif /* ! __CONFIG_PCM051_H */
index 5a555567d02ae972c53dcf9a507cd172b098ea89..fc25966e0f214c57e24d44b4dcaef5872e78bb3e 100644 (file)
 /* Network */
 #define CONFIG_CMD_MII
 #define CONFIG_PHYLIB
-#define CONFIG_PHY_ADDR                1
 #define CONFIG_PHY_RESET       1
 #define CONFIG_PHY_NATSEMI
 
index 7722f7be2e7d49fc4f92ce5287462ff03b46382c..6276d43395ea0534f42f67d34af0d7475d435662 100644 (file)
@@ -44,7 +44,6 @@
 #undef CONFIG_SPL_NET_VCI_STRING
 #undef CONFIG_SPL_ETH_SUPPORT
 
-#define CONFIG_PHY_ADDR                        0
 #define CONFIG_PHY_ATHEROS
 
 #define CONFIG_FACTORYSET
index d4519f946c3c917fdb020a3308227523f87bdbf6..6bddededaeb782954b1617155f310063bba56676 100644 (file)
@@ -41,7 +41,6 @@
 #undef CONFIG_SPL_NET_VCI_STRING
 #undef CONFIG_SPL_ETH_SUPPORT
 
-#define CONFIG_PHY_ADDR                        1
 #define CONFIG_PHY_NATSEMI
 
 #define CONFIG_FACTORYSET
index ba16b1c14b5e5ed329f271784b76a8acdb8f826b..b51400c464005061e368c4de41559434a7bb2248 100644 (file)
 #define CONFIG_NET_MULTI
 #define CONFIG_PHY_GIGE
 #define CONFIG_PHYLIB
-#define CONFIG_PHY_ADDR                        1
 #define CONFIG_PHY_ET1011C
 #define CONFIG_PHY_ET1011C_TX_CLK_FIX
 
index 743cb96e7e9e1502dfb807b1f8d9110b42605c98..a73843d2f75cd6f7d4743fd8d05af19423cf3704 100644 (file)
@@ -19,7 +19,7 @@
 struct cpsw_slave_data {
        u32             slave_reg_ofs;
        u32             sliver_reg_ofs;
-       int             phy_id;
+       int             phy_addr;
        int             phy_if;
 };