powerpc/mpc85xx: Add clear_ddr_tlbs function

This is useful when we just want to wipe out the TLBs.  There's currently
a function that resets the ddr tlbs to a different value; it is changed to
utilize this function.  The new function can be used in conjunction with
setup_ddr_tlbs() for a board to temporarily map/unmap the DDR address
range as needed.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index 53f08879181996f365cd4b6d81cfb04eaec389ab..ce59c2580a1ef83cb9b1cc00506ede9ad85e8953 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -374,6 +374,8 @@ void read_tlbcam_entry(int idx, u32 *valid, u32 *tsize, unsigned long *epn,
 unsigned int
        setup_ddr_tlbs_phys(phys_addr_t p_addr, unsigned int memsize_in_meg);
 
+void clear_ddr_tlbs_phys(phys_addr_t p_addr, unsigned int memsize_in_meg);
+
 static void dump_spd_ddr_reg(void)
 {
        int i, j, k, m;
@@ -460,19 +462,9 @@ static int reset_tlb(phys_addr_t p_addr, u32 size, phys_addr_t *phys_offset)
        u32 vstart = CONFIG_SYS_DDR_SDRAM_BASE;
        unsigned long epn;
        u32 tsize, valid, ptr;
-       phys_addr_t rpn = 0;
        int ddr_esel;
 
-       ptr = vstart;
-
-       while (ptr < (vstart + size)) {
-               ddr_esel = find_tlb_idx((void *)ptr, 1);
-               if (ddr_esel != -1) {
-                       read_tlbcam_entry(ddr_esel, &valid, &tsize, &epn, &rpn);
-                       disable_tlb(ddr_esel);
-               }
-               ptr += TSIZE_TO_BYTES(tsize);
-       }
+       clear_ddr_tlbs_phys(p_addr, size>>20);
 
        /* Setup new tlb to cover the physical address */
        setup_ddr_tlbs_phys(p_addr, size>>20);

diff --git a/arch/powerpc/cpu/mpc85xx/tlb.c b/arch/powerpc/cpu/mpc85xx/tlb.c
index 295f175bba63868b619d049d39709acb61360233..01a3561fa0e76091d18870f41e7b373245e03cf6 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/tlb.c
+++ b/arch/powerpc/cpu/mpc85xx/tlb.c
@@ -300,4 +300,33 @@ unsigned int setup_ddr_tlbs(unsigned int memsize_in_meg)
        return
                setup_ddr_tlbs_phys(CONFIG_SYS_DDR_SDRAM_BASE, memsize_in_meg);
 }
+
+/* Invalidate the DDR TLBs for the requested size */
+void clear_ddr_tlbs_phys(phys_addr_t p_addr, unsigned int memsize_in_meg)
+{
+       u32 vstart = CONFIG_SYS_DDR_SDRAM_BASE;
+       unsigned long epn;
+       u32 tsize, valid, ptr;
+       phys_addr_t rpn = 0;
+       int ddr_esel;
+       u64 memsize = (u64)memsize_in_meg << 20;
+
+       ptr = vstart;
+
+       while (ptr < (vstart + memsize)) {
+               ddr_esel = find_tlb_idx((void *)ptr, 1);
+               if (ddr_esel != -1) {
+                       read_tlbcam_entry(ddr_esel, &valid, &tsize, &epn, &rpn);
+                       disable_tlb(ddr_esel);
+               }
+               ptr += TSIZE_TO_BYTES(tsize);
+       }
+}
+
+void clear_ddr_tlbs(unsigned int memsize_in_meg)
+{
+       clear_ddr_tlbs_phys(CONFIG_SYS_DDR_SDRAM_BASE, memsize_in_meg);
+}
+
+
 #endif /* !CONFIG_NAND_SPL */

diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
index c01c85f6d3db4b3f16f02b9d464e19a14475ced4..ef5076b24de0daa6b0b3c98cccd27d8c9f7a4c85 100644 (file)
--- a/arch/powerpc/include/asm/mmu.h
+++ b/arch/powerpc/include/asm/mmu.h
@@ -489,6 +489,7 @@ extern int find_free_tlbcam(void);
 extern void print_tlbcam(void);
 
 extern unsigned int setup_ddr_tlbs(unsigned int memsize_in_meg);
+extern void clear_ddr_tlbs(unsigned int memsize_in_meg);
 
 extern void write_tlb(u32 _mas0, u32 _mas1, u32 _mas2, u32 _mas3, u32 _mas7);