]> git.sur5r.net Git - u-boot/commitdiff
sunxi: A64: enable USB support
authorAmit Singh Tomar <amittomer25@gmail.com>
Fri, 21 Oct 2016 01:24:30 +0000 (02:24 +0100)
committerHans de Goede <hdegoede@redhat.com>
Sun, 30 Oct 2016 10:38:04 +0000 (11:38 +0100)
Mostly by adding MACH_SUN50I to some existing #ifdefs enable support
for the the HCI0 USB host controller on the A64.
Fix up some minor 64-bit hiccups on the way.
Add the bare minimum DT bits to the A64 .dtsi and enable the controllers
and the PHY on the Pine64.
This is limited to the first USB controller at the moment, which is
connected to the lower USB socket on the Pine64 board.
[Andre: remove unneeded defines, enable OHCI, add commit message]

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
arch/arm/dts/sun50i-a64-pine64-common.dtsi
arch/arm/dts/sun50i-a64.dtsi
arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
arch/arm/mach-sunxi/usb_phy.c
configs/pine64_plus_defconfig
drivers/usb/host/ehci-sunxi.c
drivers/usb/host/ohci-sunxi.c
include/configs/sun50i.h

index c0fde440f55fc75ec727655e73c31a6b37d905ae..9ec81c65e787316ad9ca612ab4d29b84f8665a52 100644 (file)
        pinctrl-0 = <&i2c1_pins>;
        status = "okay";
 };
+
+&usbphy {
+       status = "okay";
+};
+
+&ohci1 {
+       status = "okay";
+};
+
+&ehci1 {
+       status = "okay";
+};
index 7d0dc76a11f7170f45248bfa8b543ea63b9a24bf..bef0d00be8b23e9a4118f4b87d28e81c36d408f5 100644 (file)
                        #address-cells = <1>;
                        #size-cells = <0>;
                };
+
+               usbphy: phy@1c1b810 {
+                       compatible = "allwinner,sun50i-a64-usb-phy",
+                                    "allwinner,sun8i-a33-usb-phy";
+                       reg = <0x01c1b810 0x14>, <0x01c1b800 0x4>;
+                       reg-names = "phy_ctrl", "pmu1";
+                       status = "disabled";
+                       #phy-cells = <1>;
+               };
+
+               ehci1: usb@01c1b000 {
+                       compatible = "allwinner,sun50i-a64-ehci",
+                                    "generic-ehci";
+                       reg = <0x01c1b000 0x100>;
+                       interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+                       phys = <&usbphy 1>;
+                       phy-names = "usb";
+                       status = "disabled";
+               };
+
+               ohci1: usb@01c1b400 {
+                       compatible = "allwinner,sun50i-a64-ohci",
+                                    "generic-ohci";
+                       reg = <0x01c1b400 0x100>;
+                       interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+                       phys = <&usbphy 1>;
+                       phy-names = "usb";
+                       status = "enabled";
+               };
        };
 };
index 5f938309150ed0b77e935f3a2c71f3e15fe2e2da..7232f6d9277508003703c3923c70f96380cbc438 100644 (file)
@@ -56,7 +56,7 @@
 #define SUNXI_USB2_BASE                        0x01c1c000
 #endif
 #ifdef CONFIG_SUNXI_GEN_SUN6I
-#ifdef CONFIG_MACH_SUN8I_H3
+#if defined(CONFIG_MACH_SUN8I_H3) || defined(CONFIG_MACH_SUN50I)
 #define SUNXI_USBPHY_BASE              0x01c19000
 #define SUNXI_USB0_BASE                        0x01c1a000
 #define SUNXI_USB1_BASE                        0x01c1b000
index bd1bbee410ba35bc6c17a539d4ae38422c82093f..278587b4933bd0a034e74a85b6af47b14e769447 100644 (file)
@@ -146,12 +146,13 @@ __maybe_unused static void usb_phy_write(struct sunxi_usb_phy *phy, int addr,
        }
 }
 
-#if defined CONFIG_MACH_SUN8I_H3
+#if defined(CONFIG_MACH_SUN8I_H3) || defined(CONFIG_MACH_SUN50I)
 static void sunxi_usb_phy_config(struct sunxi_usb_phy *phy)
 {
+#if defined CONFIG_MACH_SUN8I_H3
        if (phy->id == 0)
                clrbits_le32(SUNXI_USBPHY_BASE + REG_PHY_UNK_H3, 0x01);
-
+#endif
        clrbits_le32(phy->base + REG_PMU_UNK_H3, 0x02);
 }
 #elif defined CONFIG_MACH_SUN8I_A83T
index 348cbd4841a3bfe6f99b8e407c1d62e33121a15a..6d0198f02cc3f783f967a4cb1a580f1da80adfc0 100644 (file)
@@ -11,3 +11,4 @@ CONFIG_CONSOLE_MUX=y
 # CONFIG_CMD_FLASH is not set
 # CONFIG_CMD_FPGA is not set
 CONFIG_SUN8I_EMAC=y
+CONFIG_USB_EHCI_HCD=y
index f2d83e34bc1b89ebca17aee5a966c94ae490f10e..5bb97ff45b982ed547153b3f6b885050527e2673 100644 (file)
@@ -45,10 +45,10 @@ static int ehci_usb_probe(struct udevice *dev)
         * clocks resp. phys.
         */
        priv->ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0;
-#ifdef CONFIG_MACH_SUN8I_H3
+#if defined(CONFIG_MACH_SUN8I_H3) || defined(CONFIG_MACH_SUN50I)
        extra_ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_OHCI0;
 #endif
-       priv->phy_index = ((u32)hccr - SUNXI_USB1_BASE) / BASE_DIST;
+       priv->phy_index = ((uintptr_t)hccr - SUNXI_USB1_BASE) / BASE_DIST;
        priv->ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST;
        extra_ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST;
        priv->phy_index++; /* Non otg phys start at 1 */
@@ -63,7 +63,7 @@ static int ehci_usb_probe(struct udevice *dev)
        sunxi_usb_phy_init(priv->phy_index);
        sunxi_usb_phy_power_on(priv->phy_index);
 
-       hcor = (struct ehci_hcor *)((uint32_t)hccr +
+       hcor = (struct ehci_hcor *)((uintptr_t)hccr +
                                    HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
 
        return ehci_register(dev, hccr, hcor, NULL, 0, plat->init_type);
@@ -98,6 +98,7 @@ static const struct udevice_id ehci_usb_ids[] = {
        { .compatible = "allwinner,sun8i-a83t-ehci", },
        { .compatible = "allwinner,sun8i-h3-ehci",  },
        { .compatible = "allwinner,sun9i-a80-ehci", },
+       { .compatible = "allwinner,sun50i-a64-ehci", },
        { }
 };
 
index 2a1e8bf1e897f20d2d4ea1b3201c38093e6d8dda..a44656e3c7e0a85e710e8c8b63b8252b6dbf4fd6 100644 (file)
@@ -101,6 +101,7 @@ static const struct udevice_id ohci_usb_ids[] = {
        { .compatible = "allwinner,sun8i-a83t-ohci", },
        { .compatible = "allwinner,sun8i-h3-ohci",  },
        { .compatible = "allwinner,sun9i-a80-ohci", },
+       { .compatible = "allwinner,sun50i-a64-ohci", },
        { }
 };
 
index 0fdb4c7b99cfd0a231d4160a36c33aec8391a1d7..3e5708b49368d6b981878a860c8330c29925525c 100644 (file)
  * A64 specific configuration
  */
 
+#ifdef CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_SUNXI
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
+#endif
+
 #define CONFIG_SUNXI_USB_PHYS  1
 
 #define COUNTER_FREQUENCY      CONFIG_TIMER_CLK_FREQ