]> git.sur5r.net Git - u-boot/commitdiff
add Xilinx_abort_fn to Xilinx_Spartan3_Slave_Serial_fns
authorWolfgang Wegner <w.wegner@astro-kom.de>
Fri, 23 Apr 2010 09:08:05 +0000 (11:08 +0200)
committerWolfgang Denk <wd@denx.de>
Thu, 9 Dec 2010 09:24:10 +0000 (10:24 +0100)
Currently the hardware was left in an undefined state in case Spartan3
serial load failed. This patch adds Xilinx_abort_fn to give the board
a possibility to clean up in this case.

Signed-off-by: Wolfgang Wegner <w.wegner@astro-kom.de>
drivers/fpga/spartan3.c
include/spartan3.h

index 7a89b5692cbc5f4f344e90e0eb78f6018b76cc9c..1dd6f26f98a340cc874e8834c13626d24019c4ef 100644 (file)
@@ -366,6 +366,8 @@ static int Spartan3_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
                        CONFIG_FPGA_DELAY ();
                        if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) {    /* check the time */
                                puts ("** Timeout waiting for INIT to start.\n");
+                               if (*fn->abort)
+                                       (*fn->abort) (cookie);
                                return FPGA_FAIL;
                        }
                } while (!(*fn->init) (cookie));
@@ -380,6 +382,8 @@ static int Spartan3_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
                        CONFIG_FPGA_DELAY ();
                        if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) {    /* check the time */
                                puts ("** Timeout waiting for INIT to clear.\n");
+                               if (*fn->abort)
+                                       (*fn->abort) (cookie);
                                return FPGA_FAIL;
                        }
                } while ((*fn->init) (cookie));
@@ -394,6 +398,8 @@ static int Spartan3_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
                                   while DONE is low (inactive) */
                                if ((*fn->done) (cookie) == 0 && (*fn->init) (cookie)) {
                                        puts ("** CRC error during FPGA load.\n");
+                                       if (*fn->abort)
+                                               (*fn->abort) (cookie);
                                        return (FPGA_FAIL);
                                }
                                val = data [bytecount ++];
index d5a589d0995f7cddb836712919b85ed673d494bc..0f0b40085b9712b444bb360c7a5854e47c9bc9e1 100644 (file)
@@ -58,6 +58,7 @@ typedef struct {
        Xilinx_wr_fn    wr;
        Xilinx_post_fn  post;
        Xilinx_bwr_fn   bwr; /* block write function */
+       Xilinx_abort_fn abort;
 } Xilinx_Spartan3_Slave_Serial_fns;
 
 /* Device Image Sizes