Improve the evaluation of the reset source. Bit description according
to latest reference manual rev. 7.
Signed-off-by: Stefan Agner <stefan@agner.ch>
 
        cause = readl(&src_regs->srsr);
        writel(cause, &src_regs->srsr);
-       cause &= 0xff;
 
-       switch (cause) {
-       case 0x08:
-               return "WDOG";
-       case 0x20:
+       if (cause & SRC_SRSR_POR_RST)
+               return "POWER ON RESET";
+       else if (cause & SRC_SRSR_WDOG_A5)
+               return "WDOG A5";
+       else if (cause & SRC_SRSR_WDOG_M4)
+               return "WDOG M4";
+       else if (cause & SRC_SRSR_JTAG_RST)
                return "JTAG HIGH-Z";
-       case 0x80:
+       else if (cause & SRC_SRSR_SW_RST)
+               return "SW RESET";
+       else if (cause & SRC_SRSR_RESETB)
                return "EXTERNAL RESET";
-       case 0xfd:
-               return "POR";
-       default:
+       else
                return "unknown reset";
-       }
 }
 
 int print_cpuinfo(void)
 
 #define DDRMC_CR161_TODTH_RD(v)                                (((v) & 0xf) << 8)
 #define DDRMC_CR161_TODTH_WR(v)                                ((v) & 0xf)
 
+/* System Reset Controller (SRC) */
+#define SRC_SRSR_SW_RST                                        (0x1 << 18)
+#define SRC_SRSR_RESETB                                        (0x1 << 7)
+#define SRC_SRSR_JTAG_RST                              (0x1 << 5)
+#define SRC_SRSR_WDOG_M4                               (0x1 << 4)
+#define SRC_SRSR_WDOG_A5                               (0x1 << 3)
+#define SRC_SRSR_POR_RST                               (0x1 << 0)
+
 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
 #include <asm/types.h>