#include <common.h>
#include <asm/arch/imx-regs.h>
+#include <asm/arch/clock.h>
#include <asm/io.h>
static u32 mx31_decode_pll(u32 reg, u32 infreq)
return mx31_get_mpl_dpdgck_clk();
}
-u32 mx31_get_ipg_clk(void)
+static u32 mx31_get_ipg_clk(void)
{
u32 freq = mx31_get_mcu_main_clk();
u32 pdr0 = __REG(CCM_PDR0);
printf("ipg clock : %dHz\n", mx31_get_ipg_clk());
}
+unsigned int mxc_get_clock(enum mxc_clock clk)
+{
+ switch (clk) {
+ case MXC_ARM_CLK:
+ return mx31_get_mcu_main_clk();
+ case MXC_IPG_CLK:
+ case MXC_CSPI_CLK:
+ case MXC_UART_CLK:
+ return mx31_get_ipg_clk();
+ }
+ return -1;
+}
+
+u32 imx_get_uartclk(void)
+{
+ return mxc_get_clock(MXC_UART_CLK);
+}
+
void mx31_gpio_mux(unsigned long mode)
{
unsigned long reg, shift, tmp;
#ifndef __ASM_ARCH_CLOCK_H
#define __ASM_ARCH_CLOCK_H
-extern u32 mx31_get_ipg_clk(void);
-#define imx_get_uartclk mx31_get_ipg_clk
+enum mxc_clock {
+ MXC_ARM_CLK,
+ MXC_IPG_CLK,
+ MXC_CSPI_CLK,
+ MXC_UART_CLK,
+};
+
+unsigned int mxc_get_clock(enum mxc_clock clk);
+extern u32 imx_get_uartclk();
extern void mx31_gpio_mux(unsigned long mode);
extern void mx31_set_pad(enum iomux_pins pin, u32 config);