This patch adds support for software I2C for GONI and Universal C210 reference targets.
It adds support for access to GPIOs by number, not as it is present,
by bank and offset.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Cc: Heiko Schocher <hs@denx.de>
void s5p_gpio_set_pull(struct s5p_gpio_bank *bank, int gpio, int mode);
void s5p_gpio_set_drv(struct s5p_gpio_bank *bank, int gpio, int mode);
void s5p_gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode);
+
+/* GPIO pins per bank */
+#define GPIO_PER_BANK 8
+
+static inline unsigned int s5p_gpio_base(int nr)
+{
+ return S5PC110_GPIO_BASE;
+}
+
+#define s5pc110_gpio_get_nr(bank, pin) \
+ ((((((unsigned int)&(((struct s5pc110_gpio *)S5PC110_GPIO_BASE)->bank))\
+ - S5PC110_GPIO_BASE) / sizeof(struct s5p_gpio_bank)) \
+ * GPIO_PER_BANK) + pin)
#endif
/* Pin configurations */
void s5p_gpio_set_pull(struct s5p_gpio_bank *bank, int gpio, int mode);
void s5p_gpio_set_drv(struct s5p_gpio_bank *bank, int gpio, int mode);
void s5p_gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode);
+
+/* GPIO pins per bank */
+#define GPIO_PER_BANK 8
+
+#define s5pc210_gpio_part1_get_nr(bank, pin) \
+ ((((((unsigned int) &(((struct s5pc210_gpio_part1 *) \
+ S5PC210_GPIO_PART1_BASE)->bank)) \
+ - S5PC210_GPIO_PART1_BASE) / sizeof(struct s5p_gpio_bank)) \
+ * GPIO_PER_BANK) + pin)
+
+#define GPIO_PART1_MAX ((sizeof(struct s5pc210_gpio_part1) \
+ / sizeof(struct s5p_gpio_bank)) * GPIO_PER_BANK)
+
+#define s5pc210_gpio_part2_get_nr(bank, pin) \
+ (((((((unsigned int) &(((struct s5pc210_gpio_part2 *) \
+ S5PC210_GPIO_PART2_BASE)->bank)) \
+ - S5PC210_GPIO_PART2_BASE) / sizeof(struct s5p_gpio_bank)) \
+ * GPIO_PER_BANK) + pin) + GPIO_PART1_MAX)
+
+static inline unsigned int s5p_gpio_base(int nr)
+{
+ if (nr < GPIO_PART1_MAX)
+ return S5PC210_GPIO_PART1_BASE;
+ else
+ return S5PC210_GPIO_PART2_BASE;
+
+ return 0;
+}
+
#endif
/* Pin configurations */
writel(value, &bank->drv);
}
+
+struct s5p_gpio_bank *s5p_gpio_get_bank(int nr)
+{
+ int bank = nr / GPIO_PER_BANK;
+ bank *= sizeof(struct s5p_gpio_bank);
+
+ return (struct s5p_gpio_bank *) (s5p_gpio_base(nr) + bank);
+}
+
+int s5p_gpio_get_pin(int nr)
+{
+ return nr % GPIO_PER_BANK;
+}
+
+int gpio_request(int gpio, const char *label)
+{
+ return 0;
+}
+
+int gpio_direction_input(int nr)
+{
+ s5p_gpio_direction_input(s5p_gpio_get_bank(nr),
+ s5p_gpio_get_pin(nr));
+ return 0;
+}
+
+int gpio_direction_output(int nr, int value)
+{
+ s5p_gpio_direction_output(s5p_gpio_get_bank(nr),
+ s5p_gpio_get_pin(nr), value);
+ return 0;
+}
+
+int gpio_get_value(int nr)
+{
+ return (int) s5p_gpio_get_value(s5p_gpio_get_bank(nr),
+ s5p_gpio_get_pin(nr));
+}
+
+void gpio_set_value(int nr, int value)
+{
+ s5p_gpio_set_value(s5p_gpio_get_bank(nr),
+ s5p_gpio_get_pin(nr), value);
+}