reg = <0x58c00000 0x400>, <0x59800000 0x2000>;
};
+ peri: perictrl@59820000 {
+ /* specify compatible in each SoC DTSI */
+ reg = <0x59820000 0x200>;
+ #clock-cells = <1>;
+ };
+
timer@60000200 {
compatible = "arm,cortex-a9-global-timer";
reg = <0x60000200 0x20>;
clock-frequency = <36864000>;
};
+&peri {
+ compatible = "socionext,ph1-ld4-perictrl";
+ clock-names = "uart", "i2c";
+ clocks = <&sysctrl 3>, <&sysctrl 4>;
+};
+
&pinctrl {
compatible = "socionext,ph1-ld4-pinctrl", "syscon";
};
clock-frequency = <73728000>;
};
+&peri {
+ compatible = "socionext,ph1-pro4-perictrl";
+ clock-names = "uart", "fi2c";
+ clocks = <&sysctrl 3>, <&sysctrl 4>;
+};
+
&pinctrl {
compatible = "socionext,ph1-pro4-pinctrl", "syscon";
};
clock-frequency = <73728000>;
};
+&peri {
+ compatible = "socionext,ph1-pro5-perictrl";
+ clock-names = "uart", "fi2c";
+ clocks = <&sysctrl 3>, <&sysctrl 4>;
+};
+
&pinctrl {
compatible = "socionext,ph1-pro5-pinctrl", "syscon";
};
clock-frequency = <80000000>;
};
+&peri {
+ compatible = "socionext,ph1-sld8-perictrl";
+ clock-names = "uart", "i2c";
+ clocks = <&sysctrl 3>, <&sysctrl 4>;
+};
+
&pinctrl {
compatible = "socionext,ph1-sld8-pinctrl", "syscon";
};
clock-frequency = <88900000>;
};
+&peri {
+ compatible = "socionext,proxstream2-perictrl";
+ clock-names = "uart", "fi2c";
+ clocks = <&sysctrl 3>, <&sysctrl 4>;
+};
+
&pinctrl {
compatible = "socionext,proxstream2-pinctrl", "syscon";
};