Do not hardcode the ipu_clk frequency and let the board file pass this value.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
static struct clk ipu_clk = {
.name = "ipu_clk",
- .rate = 133000000,
+ .rate = CONFIG_IPUV3_CLK,
.enable_reg = (u32 *)(CCM_BASE_ADDR +
offsetof(struct mxc_ccm_reg, CCGR5)),
.enable_shift = MXC_CCM_CCGR5_CG5_OFFSET,
#define CONFIG_SPLASH_SCREEN
#define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_LOGO
+#define CONFIG_IPUV3_CLK 133000000
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_SPLASH_SCREEN
#define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_LOGO
+#define CONFIG_IPUV3_CLK 133000000
#endif /* __CONFIG_H */
#define CONFIG_SPLASH_SCREEN
#define CONFIG_CMD_BMP
#define CONFIG_BMP_16BPP
+#define CONFIG_IPUV3_CLK 133000000
#endif /* __CONFIG_H */