i.MX6: add enable_spi_clk()

add enable_spi_clk(), so board code can enable spi clocks.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Stefano Babic <sbabic@denx.de>

diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index e1fb5abdeae00960d05cac99f84930eb1c6dd22e..abd9d619dc92a3d10de0a9432372c73ff08cb364 100644 (file)
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -71,6 +71,24 @@ int enable_i2c_clk(unsigned char enable, unsigned i2c_num)
 }
 #endif
 
+/* spi_num can be from 0 - SPI_MAX_NUM */
+int enable_spi_clk(unsigned char enable, unsigned spi_num)
+{
+       u32 reg;
+       u32 mask;
+
+       if (spi_num > SPI_MAX_NUM)
+               return -EINVAL;
+
+       mask = MXC_CCM_CCGR_CG_MASK << (spi_num << 1);
+       reg = __raw_readl(&imx_ccm->CCGR1);
+       if (enable)
+               reg |= mask;
+       else
+               reg &= ~mask;
+       __raw_writel(reg, &imx_ccm->CCGR1);
+       return 0;
+}
 static u32 decode_pll(enum pll_clocks pll, u32 infreq)
 {
        u32 div;

diff --git a/arch/arm/include/asm/arch-mx6/clock.h b/arch/arm/include/asm/arch-mx6/clock.h
index 1b4ded7feba50e54f1cf6001955958d4fe777f07..339c789110f9ea45d11b3ddfde70ccc22640843d 100644 (file)
--- a/arch/arm/include/asm/arch-mx6/clock.h
+++ b/arch/arm/include/asm/arch-mx6/clock.h
@@ -57,6 +57,7 @@ void enable_usboh3_clk(unsigned char enable);
 int enable_sata_clock(void);
 int enable_pcie_clock(void);
 int enable_i2c_clk(unsigned char enable, unsigned i2c_num);
+int enable_spi_clk(unsigned char enable, unsigned spi_num);
 void enable_ipu_clock(void);
 int enable_fec_anatop_clock(enum enet_freq freq);
 #endif /* __ASM_ARCH_CLOCK_H */

diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h
index 6c0a0d98dd319a0e915f020d6c5b172e1be33504..437b434b1aaddf1f5b226d3fb511c0940f1f2865 100644 (file)
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -505,6 +505,7 @@ struct cspi_regs {
 #define MXC_CSPICTRL_RXOVF     (1 << 6)
 #define MXC_CSPIPERIOD_32KHZ   (1 << 15)
 #define MAX_SPI_BYTES  32
+#define SPI_MAX_NUM    4
 
 /* Bit position inside CTRL register to be associated with SS */
 #define MXC_CSPICTRL_CHAN      18