]> git.sur5r.net Git - u-boot/commitdiff
rockchip: rk3188: ram: add support for 16bit row address
authorKever Yang <kever.yang@rock-chips.com>
Mon, 25 Sep 2017 08:33:22 +0000 (16:33 +0800)
committerPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Sat, 30 Sep 2017 22:33:32 +0000 (00:33 +0200)
RK3188 using the same ddr_conf for both 15 bit and 16 bit row address.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[Fixed compile-error by declaring 'row':]
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
drivers/ram/rockchip/sdram_rk3188.c

index 9d8b225dfac0b3b4d507f58fbbdc0dce99eb12d4..365d00ef542440796f65b38bde0ab7360d37170e 100644 (file)
@@ -682,11 +682,18 @@ out:
 
 static int sdram_get_niu_config(struct rk3188_sdram_params *sdram_params)
 {
-       int i, tmp, size, ret = 0;
+       int i, tmp, size, row, ret = 0;
 
+       row = sdram_params->ch[0].cs0_row;
+       /*
+        * RK3188 share the rank and row bit15, we use same ddr config for 15bit
+        * and 16bit row
+        */
+       if (row == 16)
+               row = 15;
        tmp = sdram_params->ch[0].col - 9;
        tmp -= (sdram_params->ch[0].bw == 2) ? 0 : 1;
-       tmp |= ((sdram_params->ch[0].cs0_row - 13) << 4);
+       tmp |= ((row - 13) << 4);
        size = sizeof(ddrconf_table)/sizeof(ddrconf_table[0]);
        for (i = 0; i < size; i++)
                if (tmp == ddrconf_table[i])