]> git.sur5r.net Git - u-boot/commitdiff
dm: x86: Add a uclass for an Low Pin Count (LPC) device
authorSimon Glass <sjg@chromium.org>
Thu, 26 Mar 2015 15:29:28 +0000 (09:29 -0600)
committerSimon Glass <sjg@chromium.org>
Sat, 18 Apr 2015 17:11:14 +0000 (11:11 -0600)
On x86 systems this device is commonly used to provide legacy port access.
It is sort-of a replacement for the old ISA bus.

Add a uclass for this, and allow it to have child devices.

Signed-off-by: Simon Glass <sjg@chromium.org>
arch/x86/lib/Makefile
arch/x86/lib/lpc-uclass.c [new file with mode: 0644]
include/dm/uclass-id.h

index fe022f653306c70d8a0ae27f5320cba3db5481f7..6c571dd9c1b836ff49b14d420049941d47e42dcb 100644 (file)
@@ -14,6 +14,7 @@ obj-$(CONFIG_HAVE_FSP) += cmd_hob.o
 obj-y  += gcc.o
 obj-y  += init_helpers.o
 obj-y  += interrupts.o
+obj-y  += lpc-uclass.o
 obj-y += cmd_mtrr.o
 obj-$(CONFIG_SYS_PCAT_INTERRUPTS) += pcat_interrupts.o
 obj-$(CONFIG_SYS_PCAT_TIMER) += pcat_timer.o
diff --git a/arch/x86/lib/lpc-uclass.c b/arch/x86/lib/lpc-uclass.c
new file mode 100644 (file)
index 0000000..6aeb4d4
--- /dev/null
@@ -0,0 +1,28 @@
+/*
+ * Copyright (c) 2015 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/root.h>
+
+static int lpc_uclass_post_bind(struct udevice *bus)
+{
+       /*
+        * Scan the device tree for devices
+        *
+        * Before relocation, only bind devices marked for pre-relocation
+        * use.
+        */
+       return dm_scan_fdt_node(bus, gd->fdt_blob, bus->of_offset,
+                               gd->flags & GD_FLG_RELOC ? false : true);
+}
+
+UCLASS_DRIVER(lpc) = {
+       .id             = UCLASS_LPC,
+       .name           = "lpc",
+       .post_bind      = lpc_uclass_post_bind,
+};
index 84a69559c275f8f7280eb6afa43912880a53f355..79b51d346afa77ed5a786a0010d6f631adcb24b5 100644 (file)
@@ -39,6 +39,7 @@ enum uclass_id {
        UCLASS_PCI_GENERIC,     /* Generic PCI bus device */
        UCLASS_PCH,             /* x86 platform controller hub */
        UCLASS_ETH,             /* Ethernet device */
+       UCLASS_LPC,             /* x86 'low pin count' interface */
 
        UCLASS_COUNT,
        UCLASS_INVALID = -1,