AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(9));
at91_sys_write(AT91_SMC1_CYCLE(0),
AT91_SMC_NWECYCLE_(10) | AT91_SMC_NRDCYCLE_(5));
- /* Configure behavior at external wait signal, byte-select mode, 16 bit
- data bus width, none data float wait states and TDF optimization */
+ /*
+ * Configure behavior at external wait signal, byte-select mode, 16 bit
+ * data bus width, none data float wait states and TDF optimization
+ */
at91_sys_write(AT91_SMC1_MODE(0),
AT91_SMC_READMODE | AT91_SMC_EXNWMODE_READY |
AT91_SMC_BAT_SELECT | AT91_SMC_DBW_16 | AT91_SMC_TDF_(0) |
int checkboard(void)
{
char str[32];
-
- puts("Board: esd CAN-EtherCAT Gateway");
+ u_char hw_type; /* hardware type */
+
+ /* read the "Type" register of the ET1100 controller */
+ hw_type = readb(CONFIG_ET1100_BASE);
+
+ switch (hw_type) {
+ case 0x11:
+ case 0x3F:
+ /* ET1100 present, arch number of MEESC-Board */
+ gd->bd->bi_arch_number = MACH_TYPE_MEESC;
+ puts("Board: CAN-EtherCAT Gateway");
+ break;
+ case 0xFF:
+ /* no ET1100 present, arch number of EtherCAN/2-Board */
+ gd->bd->bi_arch_number = MACH_TYPE_ETHERCAN2;
+ puts("Board: EtherCAN/2 Gateway");
+ /* switch on LED1D */
+ at91_set_gpio_output(AT91_PIN_PB12, 1);
+ break;
+ default:
+ /* assume, no ET1100 present, arch number of EtherCAN/2-Board */
+ gd->bd->bi_arch_number = MACH_TYPE_ETHERCAN2;
+ printf("ERROR! Read invalid hw_type: %02X\n", hw_type);
+ puts("Board: EtherCAN/2 Gateway");
+ break;
+ }
if (getenv_r("serial#", str, sizeof(str)) > 0) {
puts(", serial# ");
puts(str);
return 0;
}
+#ifdef CONFIG_SERIAL_TAG
+void get_board_serial(struct tag_serialnr *serialnr)
+{
+ char *str;
+
+ char *serial = getenv("serial#");
+ if (serial) {
+ str = strchr(serial, '_');
+ if (str && (strlen(str) >= 4)) {
+ serialnr->high = (*(str + 1) << 8) | *(str + 2);
+ serialnr->low = simple_strtoul(str + 3, NULL, 16);
+ }
+ } else {
+ serialnr->high = 0;
+ serialnr->low = 0;
+ }
+}
+#endif
+
+#ifdef CONFIG_REVISION_TAG
+u32 get_board_rev(void)
+{
+ return hw_rev | 0x100;
+}
+#endif
+
int board_init(void)
{
/* Peripheral Clock Enable Register */
1 << AT91SAM9263_ID_PIOB |
1 << AT91SAM9263_ID_PIOCDE);
- /* arch number of MEESC-Board */
- gd->bd->bi_arch_number = MACH_TYPE_MEESC;
+ /* initialize ET1100 Controller */
+ meesc_ethercat_hw_init();
/* adress of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
#ifdef CONFIG_CMD_NAND
meesc_nand_hw_init();
#endif
- meesc_ethercat_hw_init();
#ifdef CONFIG_HAS_DATAFLASH
at91_spi0_hw_init(1 << 0);
#endif
#define CONFIG_MEESC 1 /* Board is esd MEESC */
#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
#define CONFIG_AT91SAM9263 1 /* It's an AT91SAM9263 SoC */
-#define CONFIG_ENV_OVERWRITE 1 /* necessary on prototypes */
#define CONFIG_DISPLAY_BOARDINFO 1
#define CONFIG_DISPLAY_CPUINFO 1 /* display cpu info and speed */
#define CONFIG_PREBOOT /* enable preboot variable */
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_INITRD_TAG 1
+#define CONFIG_SERIAL_TAG 1
+#define CONFIG_REVISION_TAG 1
#undef CONFIG_USE_IRQ /* don't need IRQ/FIQ stuff */
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_USE_DATAFLASH 1
#undef CONFIG_SYS_USE_NANDFLASH
-#ifdef CONFIG_SYS_USE_DATAFLASH
-
/* CAN */
#define CONFIG_AT91_CAN 1
-/* bootstrap + u-boot + env + linux in dataflash on CS0 */
+/* hw-controller addresses */
+#define CONFIG_ET1100_BASE 0x70000000
+
+/* bootstrap + u-boot + env in dataflash on CS0 */
#define CONFIG_ENV_IS_IN_DATAFLASH 1
#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
0x8400)
#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
CONFIG_ENV_OFFSET)
#define CONFIG_ENV_SIZE 0x4200
-#define CONFIG_BOOTCOMMAND "cp.b C0042000 22000000 210000; bootm"
-
-#else /* CONFIG_SYS_USE_NANDFLASH */
-
-/* bootstrap + u-boot + env + linux in nandflash */
-#define CONFIG_ENV_IS_IN_NAND 1
-#define CONFIG_ENV_OFFSET 0x60000
-#define CONFIG_ENV_OFFSET_REDUND 0x80000
-#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
-#define CONFIG_BOOTCOMMAND "nand read 22000000 A0000 200000; bootm"
-
-#endif
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
/*
* Size of malloc() pool
*/
-#define CONFIG_SYS_MALLOC_LEN 0x2D000
+#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \
+ 128*1024, 0x1000)
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
#define CONFIG_STACKSIZE (32 * 1024) /* regular stack */