]> git.sur5r.net Git - u-boot/commitdiff
arm: pxa: fix LP-8x4x USB support
authorSergei Ianovich <ynvich@gmail.com>
Wed, 18 Dec 2013 16:19:20 +0000 (20:19 +0400)
committerMarek Vasut <marex@denx.de>
Wed, 18 Dec 2013 17:15:25 +0000 (18:15 +0100)
Signed-off-by: Sergei Ianovich <ynvich@gmail.com>
CC: Marek Vasut <marex@denx.de>
board/icpdas/lp8x4x/lp8x4x.c
include/configs/lp8x4x.h

index 92dd4ff97a7e27b09504de0ac2774c326415fcd8..5eee18af7ba0cc5656d828b0e392f420eac0aa8e 100644 (file)
@@ -61,15 +61,24 @@ int board_mmc_init(bd_t *bis)
 #ifdef CONFIG_CMD_USB
 int board_usb_init(int index, enum usb_init_type init)
 {
-       writel((UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
-               ~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE),
-               UHCHR);
+       if (index !=0 || init != USB_INIT_HOST)
+               return -1;
+
+       writel(readl(CKEN) | CKEN10_USBHOST, CKEN);
+
+       writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
+       udelay(11);
+       writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
 
        writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR);
 
        while (readl(UHCHR) & UHCHR_FSBIR)
                continue; /* required by checkpath.pl */
 
+       writel(readl(UHCHR) & ~UHCHR_SSEP0, UHCHR);
+       writel(readl(UHCRHDA) & ~(0x1000), UHCRHDA);
+       writel(readl(UHCRHDA) | 0x800, UHCRHDA);
+
        writel(readl(UHCHR) & ~UHCHR_SSE, UHCHR);
        writel((UHCHIE_UPRIE | UHCHIE_RWIE), UHCHIE);
 
@@ -83,19 +92,10 @@ int board_usb_init(int index, enum usb_init_type init)
        /* Set port power control mask bits, only 3 ports. */
        writel(readl(UHCRHDB) | (0x7<<17), UHCRHDB);
 
-       /* enable port 2 */
-       writel(readl(UP2OCR) | UP2OCR_HXOE | UP2OCR_HXS |
-               UP2OCR_DMPDE | UP2OCR_DPPDE, UP2OCR);
-
        return 0;
 }
 
-int board_usb_cleanup(int index, enum usb_init_type init)
-{
-       return 0;
-}
-
-void usb_board_stop(void)
+int usb_board_stop(void)
 {
        writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
        udelay(11);
@@ -104,9 +104,19 @@ void usb_board_stop(void)
        writel(readl(UHCCOMS) | 1, UHCCOMS);
        udelay(10);
 
+       writel(readl(UHCHR) | UHCHR_SSEP0 | UHCHR_SSE, UHCHR);
+
        writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN);
 
-       return;
+       return 0;
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+       if (index !=0 || init != USB_INIT_HOST)
+               return -1;
+
+       return usb_board_stop();
 }
 #endif
 
index 68e1a974dd0d03bb6db93d7062a5f8bd79abb9d3..324cc4d1b08d2e02d48f5cd4fbf3a22629ac420a 100644 (file)
 #define        CONFIG_SYS_GAFR1_L_VAL  0x999a955a
 #define        CONFIG_SYS_GAFR1_U_VAL  0xaaa5a00a
 #define        CONFIG_SYS_GAFR2_L_VAL  0xaaaaaaaa
-#define        CONFIG_SYS_GAFR2_U_VAL  0x55f0a402
+#define        CONFIG_SYS_GAFR2_U_VAL  0x55f9a402
 #define        CONFIG_SYS_GAFR3_L_VAL  0x540a950c
 #define        CONFIG_SYS_GAFR3_U_VAL  0x00001599
 
  */
 #ifdef CONFIG_CMD_USB
 #define        CONFIG_USB_OHCI_NEW
-#define        CONFIG_SYS_USB_OHCI_CPU_INIT
 #define        CONFIG_SYS_USB_OHCI_BOARD_INIT
 #define        CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      2
 #define        CONFIG_SYS_USB_OHCI_REGS_BASE   0x4C000000