bool "Support vexpress_ca9x4"
select CPU_V7
-config TARGET_KWB
- bool "Support kwb"
+config TARGET_BRXRE1
+ bool "Support BRXRE1"
select CPU_V7
select SUPPORT_SPL
source "arch/arm/imx-common/Kconfig"
source "board/bosch/shc/Kconfig"
-source "board/BuR/kwb/Kconfig"
+source "board/BuR/brxre1/Kconfig"
source "board/BuR/brppt1/Kconfig"
source "board/CarMediaLab/flea3/Kconfig"
source "board/Marvell/aspenite/Kconfig"
--- /dev/null
+if TARGET_BRXRE1
+
+config SYS_BOARD
+ default "brxre1"
+
+config SYS_VENDOR
+ default "BuR"
+
+config SYS_SOC
+ default "am33xx"
+
+config SYS_CONFIG_NAME
+ default "brxre1"
+
+endif
--- /dev/null
+BRXRE1 BOARD
+M: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
+S: Maintained
+F: board/BuR/brxre1/
+F: include/configs/brxre1.h
+F: configs/brxre1_defconfig
--- /dev/null
+#
+# Makefile
+#
+# Copyright (C) 2014 Hannes Schmelzer <oe5hpm@oevsv.at> -
+# Bernecker & Rainer Industrielektronik GmbH - http://www.br-automation.com/
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-$(CONFIG_SPL_BUILD) += mux.o
+obj-y += ../common/common.o
+obj-y += board.o
--- /dev/null
+/*
+ * board.c
+ *
+ * Board functions for B&R BRXRE1 Board
+ *
+ * Copyright (C) 2013 Hannes Schmelzer <oe5hpm@oevsv.at>
+ * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ *
+ */
+#include <common.h>
+#include <errno.h>
+#include <spl.h>
+#include <asm/arch/cpu.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/omap.h>
+#include <asm/arch/ddr_defs.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/mem.h>
+#include <asm/io.h>
+#include <asm/emif.h>
+#include <asm/gpio.h>
+#include <i2c.h>
+#include <power/tps65217.h>
+#include "../common/bur_common.h"
+#include <lcd.h>
+
+/* -------------------------------------------------------------------------*/
+/* -- defines for used GPIO Hardware -- */
+#define ESC_KEY (0+19)
+#define LCD_PWR (0+5)
+#define PUSH_KEY (0+31)
+/* -------------------------------------------------------------------------*/
+/* -- PSOC Resetcontroller Register defines -- */
+
+/* I2C Address of controller */
+#define RSTCTRL_ADDR 0x75
+/* Register for CTRL-word */
+#define RSTCTRL_CTRLREG 0x01
+/* Register for giving some information to VxWorks OS */
+#define RSTCTRL_SCRATCHREG 0x04
+
+/* -- defines for RSTCTRL_CTRLREG -- */
+#define RSTCTRL_FORCE_PWR_NEN 0x0404
+#define RSTCTRL_CAN_STB 0x4040
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if defined(CONFIG_SPL_BUILD)
+/* TODO: check ram-timing ! */
+static const struct ddr_data ddr3_data = {
+ .datardsratio0 = MT41K256M16HA125E_RD_DQS,
+ .datawdsratio0 = MT41K256M16HA125E_WR_DQS,
+ .datafwsratio0 = MT41K256M16HA125E_PHY_FIFO_WE,
+ .datawrsratio0 = MT41K256M16HA125E_PHY_WR_DATA,
+};
+static const struct cmd_control ddr3_cmd_ctrl_data = {
+ .cmd0csratio = MT41K256M16HA125E_RATIO,
+ .cmd0iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
+
+ .cmd1csratio = MT41K256M16HA125E_RATIO,
+ .cmd1iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
+
+ .cmd2csratio = MT41K256M16HA125E_RATIO,
+ .cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
+};
+static struct emif_regs ddr3_emif_reg_data = {
+ .sdram_config = MT41K256M16HA125E_EMIF_SDCFG,
+ .ref_ctrl = MT41K256M16HA125E_EMIF_SDREF,
+ .sdram_tim1 = MT41K256M16HA125E_EMIF_TIM1,
+ .sdram_tim2 = MT41K256M16HA125E_EMIF_TIM2,
+ .sdram_tim3 = MT41K256M16HA125E_EMIF_TIM3,
+ .zq_config = MT41K256M16HA125E_ZQ_CFG,
+ .emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY,
+};
+
+static const struct ctrl_ioregs ddr3_ioregs = {
+ .cm0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
+ .cm1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
+ .cm2ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
+ .dt0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
+ .dt1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
+};
+
+#define OSC (V_OSCK/1000000)
+const struct dpll_params dpll_ddr3 = { 400, OSC-1, 1, -1, -1, -1, -1};
+
+void am33xx_spl_board_init(void)
+{
+ unsigned int oldspeed;
+ unsigned short buf;
+
+ struct cm_perpll *const cmper = (struct cm_perpll *)CM_PER;
+ struct cm_wkuppll *const cmwkup = (struct cm_wkuppll *)CM_WKUP;
+ /*
+ * enable additional clocks of modules which are accessed later from
+ * VxWorks OS
+ */
+ u32 *const clk_domains[] = { 0 };
+
+ u32 *const clk_modules_xre1specific[] = {
+ &cmwkup->wkup_adctscctrl,
+ &cmper->spi1clkctrl,
+ &cmper->dcan0clkctrl,
+ &cmper->dcan1clkctrl,
+ &cmper->epwmss0clkctrl,
+ &cmper->epwmss1clkctrl,
+ &cmper->epwmss2clkctrl,
+ &cmper->lcdclkctrl,
+ &cmper->lcdcclkstctrl,
+ 0
+ };
+ do_enable_clocks(clk_domains, clk_modules_xre1specific, 1);
+ /* setup LCD-Pixel Clock */
+ writel(0x2, CM_DPLL + 0x34);
+ /* power-OFF LCD-Display */
+ gpio_direction_output(LCD_PWR, 0);
+
+ /* setup I2C */
+ enable_i2c_pin_mux();
+ i2c_set_bus_num(0);
+ i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
+
+ /* power-ON 3V3 via Resetcontroller */
+ oldspeed = i2c_get_bus_speed();
+ if (i2c_set_bus_speed(CONFIG_SYS_OMAP24_I2C_SPEED_PSOC) >= 0) {
+ buf = RSTCTRL_FORCE_PWR_NEN | RSTCTRL_CAN_STB;
+ i2c_write(RSTCTRL_ADDR, RSTCTRL_CTRLREG, 1,
+ (uint8_t *)&buf, sizeof(buf));
+ i2c_set_bus_speed(oldspeed);
+ } else {
+ puts("ERROR: i2c_set_bus_speed failed! (turn on PWR_nEN)\n");
+ }
+
+ pmicsetup(0);
+}
+
+const struct dpll_params *get_dpll_ddr_params(void)
+{
+ return &dpll_ddr3;
+}
+
+void sdram_init(void)
+{
+ config_ddr(400, &ddr3_ioregs,
+ &ddr3_data,
+ &ddr3_cmd_ctrl_data,
+ &ddr3_emif_reg_data, 0);
+}
+#endif /* CONFIG_SPL_BUILD */
+/*
+ * Basic board specific setup. Pinmux has been handled already.
+ */
+int board_init(void)
+{
+ gpmc_init();
+ return 0;
+}
+
+#ifdef CONFIG_BOARD_LATE_INIT
+int board_late_init(void)
+{
+ const unsigned int toff = 1000;
+ unsigned int cnt = 3;
+ unsigned short buf = 0xAAAA;
+ unsigned char scratchreg = 0;
+ unsigned int oldspeed;
+
+ /* try to read out some boot-instruction from resetcontroller */
+ oldspeed = i2c_get_bus_speed();
+ if (i2c_set_bus_speed(CONFIG_SYS_OMAP24_I2C_SPEED_PSOC) >= 0) {
+ i2c_read(RSTCTRL_ADDR, RSTCTRL_SCRATCHREG, 1,
+ &scratchreg, sizeof(scratchreg));
+ i2c_set_bus_speed(oldspeed);
+ } else {
+ puts("ERROR: i2c_set_bus_speed failed! (scratchregister)\n");
+ }
+
+ if (gpio_get_value(ESC_KEY)) {
+ do {
+ lcd_position_cursor(1, 8);
+ switch (cnt) {
+ case 3:
+ lcd_puts(
+ "release ESC-KEY to enter SERVICE-mode.");
+ break;
+ case 2:
+ lcd_puts(
+ "release ESC-KEY to enter DIAGNOSE-mode.");
+ break;
+ case 1:
+ lcd_puts(
+ "release ESC-KEY to enter BOOT-mode. ");
+ break;
+ }
+ mdelay(toff);
+ cnt--;
+ if (!gpio_get_value(ESC_KEY) &&
+ gpio_get_value(PUSH_KEY) && 2 == cnt) {
+ lcd_position_cursor(1, 8);
+ lcd_puts(
+ "switching to network-console ... ");
+ setenv("bootcmd", "run netconsole");
+ cnt = 4;
+ break;
+ } else if (!gpio_get_value(ESC_KEY) &&
+ gpio_get_value(PUSH_KEY) && 1 == cnt) {
+ lcd_position_cursor(1, 8);
+ lcd_puts(
+ "starting u-boot script from USB ... ");
+ setenv("bootcmd", "run usbscript");
+ cnt = 4;
+ break;
+ } else if ((!gpio_get_value(ESC_KEY) &&
+ gpio_get_value(PUSH_KEY) && cnt == 0) ||
+ (gpio_get_value(ESC_KEY) &&
+ gpio_get_value(PUSH_KEY) && cnt == 0)) {
+ lcd_position_cursor(1, 8);
+ lcd_puts(
+ "starting script from network ... ");
+ setenv("bootcmd", "run netscript");
+ cnt = 4;
+ break;
+ } else if (!gpio_get_value(ESC_KEY)) {
+ break;
+ }
+ } while (cnt);
+ } else if (scratchreg == 0xCC) {
+ lcd_position_cursor(1, 8);
+ lcd_puts(
+ "starting vxworks from network ... ");
+ setenv("bootcmd", "run netboot");
+ cnt = 4;
+ } else if (scratchreg == 0xCD) {
+ lcd_position_cursor(1, 8);
+ lcd_puts(
+ "starting script from network ... ");
+ setenv("bootcmd", "run netscript");
+ cnt = 4;
+ } else if (scratchreg == 0xCE) {
+ lcd_position_cursor(1, 8);
+ lcd_puts(
+ "starting AR from eMMC ... ");
+ setenv("bootcmd", "run mmcboot");
+ cnt = 4;
+ }
+
+ lcd_position_cursor(1, 8);
+ switch (cnt) {
+ case 0:
+ lcd_puts("entering BOOT-mode. ");
+ setenv("bootcmd", "run defaultAR");
+ buf = 0x0000;
+ break;
+ case 1:
+ lcd_puts("entering DIAGNOSE-mode. ");
+ buf = 0x0F0F;
+ break;
+ case 2:
+ lcd_puts("entering SERVICE mode. ");
+ buf = 0xB4B4;
+ break;
+ case 3:
+ lcd_puts("loading OS... ");
+ buf = 0x0404;
+ break;
+ }
+ /* write bootinfo into scratchregister of resetcontroller */
+ oldspeed = i2c_get_bus_speed();
+ if (i2c_set_bus_speed(CONFIG_SYS_OMAP24_I2C_SPEED_PSOC) >= 0) {
+ i2c_write(RSTCTRL_ADDR, RSTCTRL_SCRATCHREG, 1,
+ (uint8_t *)&buf, sizeof(buf));
+ i2c_set_bus_speed(oldspeed);
+ } else {
+ puts("ERROR: i2c_set_bus_speed failed! (scratchregister)\n");
+ }
+ /* setup othbootargs for bootvx-command (vxWorks bootline) */
+ char othbootargs[128];
+ snprintf(othbootargs, sizeof(othbootargs),
+ "u=vxWorksFTP pw=vxWorks o=0x%08x;0x%08x;0x%08x;0x%08x",
+ (unsigned int) gd->fb_base-0x20,
+ (u32)getenv_ulong("vx_memtop", 16, gd->fb_base-0x20),
+ (u32)getenv_ulong("vx_romfsbase", 16, 0),
+ (u32)getenv_ulong("vx_romfssize", 16, 0));
+ setenv("othbootargs", othbootargs);
+ /*
+ * reset VBAR registers to its reset location, VxWorks 6.9.3.2 does
+ * expect that vectors are there, original u-boot moves them to _start
+ */
+ __asm__("ldr r0,=0x20000");
+ __asm__("mcr p15, 0, r0, c12, c0, 0"); /* Set VBAR */
+
+ return 0;
+}
+#endif /* CONFIG_BOARD_LATE_INIT */
--- /dev/null
+/*
+ * mux.c
+ *
+ * Pinmux Setting for B&R LEIT Board(s)
+ *
+ * Copyright (C) 2013 Hannes Schmelzer <oe5hpm@oevsv.at>
+ * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/mux.h>
+#include <asm/io.h>
+#include <i2c.h>
+
+static struct module_pin_mux spi0_pin_mux[] = {
+ /* SPI1_SCLK */
+ {OFFSET(spi0_sclk), MODE(0) | PULLUDEN | RXACTIVE},
+ /* SPI1_D0 */
+ {OFFSET(spi0_d0), MODE(0) | PULLUDEN | RXACTIVE},
+ /* SPI1_D1 */
+ {OFFSET(spi0_d1), MODE(0) | PULLUDEN | RXACTIVE},
+ /* SPI1_CS0 */
+ {OFFSET(spi0_cs0), MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE},
+ /* SPI1_CS1 */
+ {OFFSET(spi0_cs1), MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE},
+ {-1},
+};
+
+static struct module_pin_mux dcan0_pin_mux[] = {
+ /* DCAN0 TX */
+ {OFFSET(uart1_ctsn), MODE(2) | PULLUDEN | PULLUP_EN},
+ /* DCAN0 RX */
+ {OFFSET(uart1_rtsn), MODE(2) | RXACTIVE},
+ {-1},
+};
+
+static struct module_pin_mux dcan1_pin_mux[] = {
+ /* DCAN1 TX */
+ {OFFSET(uart1_rxd), MODE(2) | PULLUDEN | PULLUP_EN},
+ /* DCAN1 RX */
+ {OFFSET(uart1_txd), MODE(2) | RXACTIVE},
+ {-1},
+};
+
+static struct module_pin_mux gpios[] = {
+ /* GPIO0_7 (PWW0 OUT) - CAN TERM */
+ {OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUDDIS | RXACTIVE)},
+ /* GPIO0_19 (DMA_INTR0) - TA602 */
+ {OFFSET(xdma_event_intr0), (MODE(7) | PULLUDDIS | RXACTIVE)},
+ /* GPIO0_20 (DMA_INTR1) - SPI0 nCS1 */
+ {OFFSET(xdma_event_intr1), (MODE(7) | PULLUDDIS | RXACTIVE)},
+ /* GPIO0_29 (RMII1_REFCLK) - eMMC nRST */
+ {OFFSET(rmii1_refclk), (MODE(7) | PULLUDDIS)},
+ /* GPIO0_30 (GPMC_WAIT0) - TA601 */
+ {OFFSET(gpmc_wait0), (MODE(7) | PULLUDDIS | RXACTIVE)},
+ /* GPIO0_31 (GPMC_nWP) - SW601 PushButton */
+ {OFFSET(gpmc_wpn), (MODE(7) | PULLUDDIS | RXACTIVE)},
+ /* GPIO1_28 (GPMC_nWE) - FRAM_nWP */
+ {OFFSET(gpmc_be1n), (MODE(7) | PULLUDDIS)},
+ /* GPIO1_29 (gpmc_csn0) - MMC nRST */
+ {OFFSET(gpmc_csn0), (MODE(7) | PULLUDDIS)},
+ /* GPIO2_0 (GPMC_nCS3) - VBAT_OK */
+ {OFFSET(gpmc_csn3), (MODE(7) | PULLUDDIS | RXACTIVE) },
+ /* GPIO2_2 (GPMC_nADV_ALE) - DCOK */
+ {OFFSET(gpmc_advn_ale), (MODE(7) | PULLUDDIS | RXACTIVE)},
+ /* GPIO2_4 (GPMC_nWE) - TST_BAST */
+ {OFFSET(gpmc_wen), (MODE(7) | PULLUDDIS)},
+ /* GPIO2_5 (gpmc_be0n_cle) - DISPLAY_ON_OFF */
+ {OFFSET(gpmc_be0n_cle), (MODE(7) | PULLUDDIS)},
+ /* GPIO3_16 (mcasp0_axr0) - ETH-LED green */
+ {OFFSET(mcasp0_axr0), (MODE(7) | PULLUDDIS | RXACTIVE)},
+ /* GPIO3_17 (mcasp0_ahclkr) - CAN_STB */
+ {OFFSET(mcasp0_ahclkr), (MODE(7) | PULLUDDIS | RXACTIVE)},
+ /* GPIO3_18 (MCASP0_ACLKR) - SW601 CNTup, mapped to Counter eQEB0A_in */
+ {OFFSET(mcasp0_aclkr), (MODE(1) | PULLUDDIS | RXACTIVE)},
+ /* GPIO3_19 (MCASP0_FSR) - SW601 CNTdown, mapped to Counter eQEB0B_in */
+ {OFFSET(mcasp0_fsr), (MODE(1) | PULLUDDIS | RXACTIVE)},
+ /* GPIO3_20 (MCASP0_AXR1) - SW601 CNTdown, map to Counter eQEB0_index */
+ {OFFSET(mcasp0_axr1), (MODE(1) | PULLUDDIS | RXACTIVE)},
+ {-1},
+};
+
+static struct module_pin_mux uart0_pin_mux[] = {
+ /* UART0_CTS */
+ {OFFSET(uart0_ctsn), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)},
+ /* UART0_RXD */
+ {OFFSET(uart0_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},
+ /* UART0_TXD */
+ {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)},
+ {-1},
+};
+
+static struct module_pin_mux i2c0_pin_mux[] = {
+ /* I2C_DATA */
+ {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL)},
+ /* I2C_SCLK */
+ {OFFSET(i2c0_scl), (MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL)},
+ {-1},
+};
+
+static struct module_pin_mux mii1_pin_mux[] = {
+ {OFFSET(mii1_crs), MODE(0) | RXACTIVE}, /* MII1_CRS */
+ {OFFSET(mii1_col), MODE(0) | RXACTIVE}, /* MII1_COL */
+ {OFFSET(mii1_rxerr), MODE(0) | RXACTIVE}, /* MII1_RXERR */
+ {OFFSET(mii1_txen), MODE(0)}, /* MII1_TXEN */
+ {OFFSET(mii1_rxdv), MODE(0) | RXACTIVE}, /* MII1_RXDV */
+ {OFFSET(mii1_txd3), MODE(0)}, /* MII1_TXD3 */
+ {OFFSET(mii1_txd2), MODE(0)}, /* MII1_TXD2 */
+ {OFFSET(mii1_txd1), MODE(0)}, /* MII1_TXD1 */
+ {OFFSET(mii1_txd0), MODE(0)}, /* MII1_TXD0 */
+ {OFFSET(mii1_txclk), MODE(0) | RXACTIVE}, /* MII1_TXCLK */
+ {OFFSET(mii1_rxclk), MODE(0) | RXACTIVE}, /* MII1_RXCLK */
+ {OFFSET(mii1_rxd3), MODE(0) | RXACTIVE}, /* MII1_RXD3 */
+ {OFFSET(mii1_rxd2), MODE(0) | RXACTIVE}, /* MII1_RXD2 */
+ {OFFSET(mii1_rxd1), MODE(0) | RXACTIVE}, /* MII1_RXD1 */
+ {OFFSET(mii1_rxd0), MODE(0) | RXACTIVE}, /* MII1_RXD0 */
+ {OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN}, /* MDIO_DATA */
+ {OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */
+ {-1},
+};
+
+static struct module_pin_mux mmc1_pin_mux[] = {
+ {OFFSET(gpmc_ad7), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT7 */
+ {OFFSET(gpmc_ad6), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT6 */
+ {OFFSET(gpmc_ad5), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT5 */
+ {OFFSET(gpmc_ad4), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT4 */
+ {OFFSET(gpmc_ad3), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT3 */
+ {OFFSET(gpmc_ad2), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT2 */
+ {OFFSET(gpmc_ad1), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT1 */
+ {OFFSET(gpmc_ad0), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT0 */
+ {OFFSET(gpmc_csn1), (MODE(2) | RXACTIVE | PULLUP_EN)}, /* MMC1_CLK */
+ {OFFSET(gpmc_csn2), (MODE(2) | RXACTIVE | PULLUP_EN)}, /* MMC1_CMD */
+ {OFFSET(gpmc_csn0), (MODE(7) | RXACTIVE | PULLUP_EN)}, /* MMC1_WP */
+ {OFFSET(gpmc_advn_ale), (MODE(7) | RXACTIVE | PULLUP_EN)},/* MMC1_CD */
+
+ {-1},
+};
+
+static struct module_pin_mux lcd_pin_mux[] = {
+ {OFFSET(lcd_data0), (MODE(0) | PULLUDDIS)}, /* LCD-Data(0) */
+ {OFFSET(lcd_data1), (MODE(0) | PULLUDDIS)}, /* LCD-Data(1) */
+ {OFFSET(lcd_data2), (MODE(0) | PULLUDDIS)}, /* LCD-Data(2) */
+ {OFFSET(lcd_data3), (MODE(0) | PULLUDDIS)}, /* LCD-Data(3) */
+ {OFFSET(lcd_data4), (MODE(0) | PULLUDDIS)}, /* LCD-Data(4) */
+ {OFFSET(lcd_data5), (MODE(0) | PULLUDDIS)}, /* LCD-Data(5) */
+ {OFFSET(lcd_data6), (MODE(0) | PULLUDDIS)}, /* LCD-Data(6) */
+ {OFFSET(lcd_data7), (MODE(0) | PULLUDDIS)}, /* LCD-Data(7) */
+ {OFFSET(lcd_data8), (MODE(0) | PULLUDDIS)}, /* LCD-Data(8) */
+ {OFFSET(lcd_data9), (MODE(0) | PULLUDDIS)}, /* LCD-Data(9) */
+ {OFFSET(lcd_data10), (MODE(0) | PULLUDDIS)}, /* LCD-Data(10) */
+ {OFFSET(lcd_data11), (MODE(0) | PULLUDDIS)}, /* LCD-Data(11) */
+ {OFFSET(lcd_data12), (MODE(0) | PULLUDDIS)}, /* LCD-Data(12) */
+ {OFFSET(lcd_data13), (MODE(0) | PULLUDDIS)}, /* LCD-Data(13) */
+ {OFFSET(lcd_data14), (MODE(0) | PULLUDDIS)}, /* LCD-Data(14) */
+ {OFFSET(lcd_data15), (MODE(0) | PULLUDDIS)}, /* LCD-Data(15) */
+
+ {OFFSET(gpmc_ad8), (MODE(1) | PULLUDDIS)}, /* LCD-Data(16) */
+ {OFFSET(gpmc_ad9), (MODE(1) | PULLUDDIS)}, /* LCD-Data(17) */
+ {OFFSET(gpmc_ad10), (MODE(1) | PULLUDDIS)}, /* LCD-Data(18) */
+ {OFFSET(gpmc_ad11), (MODE(1) | PULLUDDIS)}, /* LCD-Data(19) */
+ {OFFSET(gpmc_ad12), (MODE(1) | PULLUDDIS)}, /* LCD-Data(20) */
+ {OFFSET(gpmc_ad13), (MODE(1) | PULLUDDIS)}, /* LCD-Data(21) */
+ {OFFSET(gpmc_ad14), (MODE(1) | PULLUDDIS)}, /* LCD-Data(22) */
+ {OFFSET(gpmc_ad15), (MODE(1) | PULLUDDIS)}, /* LCD-Data(23) */
+
+ {OFFSET(lcd_vsync), (MODE(0) | PULLUDDIS)}, /* LCD-VSync */
+ {OFFSET(lcd_hsync), (MODE(0) | PULLUDDIS)}, /* LCD-HSync */
+ {OFFSET(lcd_ac_bias_en), (MODE(0) | PULLUDDIS)},/* LCD-DE */
+ {OFFSET(lcd_pclk), (MODE(0) | PULLUDDIS)}, /* LCD-CLK */
+
+ {-1},
+};
+
+void enable_uart0_pin_mux(void)
+{
+ configure_module_pin_mux(uart0_pin_mux);
+}
+
+void enable_i2c_pin_mux(void)
+{
+ configure_module_pin_mux(i2c0_pin_mux);
+}
+
+void enable_board_pin_mux(void)
+{
+ configure_module_pin_mux(i2c0_pin_mux);
+ configure_module_pin_mux(mii1_pin_mux);
+ configure_module_pin_mux(spi0_pin_mux);
+ configure_module_pin_mux(dcan0_pin_mux);
+ configure_module_pin_mux(dcan1_pin_mux);
+ configure_module_pin_mux(mmc1_pin_mux);
+ configure_module_pin_mux(lcd_pin_mux);
+ configure_module_pin_mux(gpios);
+}
+++ /dev/null
-if TARGET_KWB
-
-config SYS_BOARD
- default "kwb"
-
-config SYS_VENDOR
- default "BuR"
-
-config SYS_SOC
- default "am33xx"
-
-config SYS_CONFIG_NAME
- default "kwb"
-
-endif
+++ /dev/null
-KWB BOARD
-M: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
-S: Maintained
-F: board/BuR/kwb/
-F: include/configs/kwb.h
-F: configs/kwb_defconfig
+++ /dev/null
-#
-# Makefile
-#
-# Copyright (C) 2014 Hannes Schmelzer <oe5hpm@oevsv.at> -
-# Bernecker & Rainer Industrielektronik GmbH - http://www.br-automation.com/
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-$(CONFIG_SPL_BUILD) += mux.o
-obj-y += ../common/common.o
-obj-y += board.o
+++ /dev/null
-/*
- * board.c
- *
- * Board functions for B&R KWB Board
- *
- * Copyright (C) 2013 Hannes Schmelzer <oe5hpm@oevsv.at>
- * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
- *
- * SPDX-License-Identifier: GPL-2.0+
- *
- */
-#include <common.h>
-#include <errno.h>
-#include <spl.h>
-#include <asm/arch/cpu.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/omap.h>
-#include <asm/arch/ddr_defs.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/gpio.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/arch/mem.h>
-#include <asm/io.h>
-#include <asm/emif.h>
-#include <asm/gpio.h>
-#include <i2c.h>
-#include <power/tps65217.h>
-#include "../common/bur_common.h"
-#include <lcd.h>
-
-/* -------------------------------------------------------------------------*/
-/* -- defines for used GPIO Hardware -- */
-#define ESC_KEY (0+19)
-#define LCD_PWR (0+5)
-#define PUSH_KEY (0+31)
-/* -------------------------------------------------------------------------*/
-/* -- PSOC Resetcontroller Register defines -- */
-
-/* I2C Address of controller */
-#define RSTCTRL_ADDR 0x75
-/* Register for CTRL-word */
-#define RSTCTRL_CTRLREG 0x01
-/* Register for giving some information to VxWorks OS */
-#define RSTCTRL_SCRATCHREG 0x04
-
-/* -- defines for RSTCTRL_CTRLREG -- */
-#define RSTCTRL_FORCE_PWR_NEN 0x0404
-#define RSTCTRL_CAN_STB 0x4040
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#if defined(CONFIG_SPL_BUILD)
-/* TODO: check ram-timing ! */
-static const struct ddr_data ddr3_data = {
- .datardsratio0 = MT41K256M16HA125E_RD_DQS,
- .datawdsratio0 = MT41K256M16HA125E_WR_DQS,
- .datafwsratio0 = MT41K256M16HA125E_PHY_FIFO_WE,
- .datawrsratio0 = MT41K256M16HA125E_PHY_WR_DATA,
-};
-static const struct cmd_control ddr3_cmd_ctrl_data = {
- .cmd0csratio = MT41K256M16HA125E_RATIO,
- .cmd0iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
-
- .cmd1csratio = MT41K256M16HA125E_RATIO,
- .cmd1iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
-
- .cmd2csratio = MT41K256M16HA125E_RATIO,
- .cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
-};
-static struct emif_regs ddr3_emif_reg_data = {
- .sdram_config = MT41K256M16HA125E_EMIF_SDCFG,
- .ref_ctrl = MT41K256M16HA125E_EMIF_SDREF,
- .sdram_tim1 = MT41K256M16HA125E_EMIF_TIM1,
- .sdram_tim2 = MT41K256M16HA125E_EMIF_TIM2,
- .sdram_tim3 = MT41K256M16HA125E_EMIF_TIM3,
- .zq_config = MT41K256M16HA125E_ZQ_CFG,
- .emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY,
-};
-
-static const struct ctrl_ioregs ddr3_ioregs = {
- .cm0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
- .cm1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
- .cm2ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
- .dt0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
- .dt1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
-};
-
-#define OSC (V_OSCK/1000000)
-const struct dpll_params dpll_ddr3 = { 400, OSC-1, 1, -1, -1, -1, -1};
-
-void am33xx_spl_board_init(void)
-{
- unsigned int oldspeed;
- unsigned short buf;
-
- struct cm_perpll *const cmper = (struct cm_perpll *)CM_PER;
- struct cm_wkuppll *const cmwkup = (struct cm_wkuppll *)CM_WKUP;
- /*
- * enable additional clocks of modules which are accessed later from
- * VxWorks OS
- */
- u32 *const clk_domains[] = { 0 };
-
- u32 *const clk_modules_kwbspecific[] = {
- &cmwkup->wkup_adctscctrl,
- &cmper->spi1clkctrl,
- &cmper->dcan0clkctrl,
- &cmper->dcan1clkctrl,
- &cmper->epwmss0clkctrl,
- &cmper->epwmss1clkctrl,
- &cmper->epwmss2clkctrl,
- &cmper->lcdclkctrl,
- &cmper->lcdcclkstctrl,
- 0
- };
- do_enable_clocks(clk_domains, clk_modules_kwbspecific, 1);
- /* setup LCD-Pixel Clock */
- writel(0x2, CM_DPLL + 0x34);
- /* power-OFF LCD-Display */
- gpio_direction_output(LCD_PWR, 0);
-
- /* setup I2C */
- enable_i2c_pin_mux();
- i2c_set_bus_num(0);
- i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
-
- /* power-ON 3V3 via Resetcontroller */
- oldspeed = i2c_get_bus_speed();
- if (i2c_set_bus_speed(CONFIG_SYS_OMAP24_I2C_SPEED_PSOC) >= 0) {
- buf = RSTCTRL_FORCE_PWR_NEN | RSTCTRL_CAN_STB;
- i2c_write(RSTCTRL_ADDR, RSTCTRL_CTRLREG, 1,
- (uint8_t *)&buf, sizeof(buf));
- i2c_set_bus_speed(oldspeed);
- } else {
- puts("ERROR: i2c_set_bus_speed failed! (turn on PWR_nEN)\n");
- }
-
- pmicsetup(0);
-}
-
-const struct dpll_params *get_dpll_ddr_params(void)
-{
- return &dpll_ddr3;
-}
-
-void sdram_init(void)
-{
- config_ddr(400, &ddr3_ioregs,
- &ddr3_data,
- &ddr3_cmd_ctrl_data,
- &ddr3_emif_reg_data, 0);
-}
-#endif /* CONFIG_SPL_BUILD */
-/*
- * Basic board specific setup. Pinmux has been handled already.
- */
-int board_init(void)
-{
- gpmc_init();
- return 0;
-}
-
-#ifdef CONFIG_BOARD_LATE_INIT
-int board_late_init(void)
-{
- const unsigned int toff = 1000;
- unsigned int cnt = 3;
- unsigned short buf = 0xAAAA;
- unsigned char scratchreg = 0;
- unsigned int oldspeed;
-
- /* try to read out some boot-instruction from resetcontroller */
- oldspeed = i2c_get_bus_speed();
- if (i2c_set_bus_speed(CONFIG_SYS_OMAP24_I2C_SPEED_PSOC) >= 0) {
- i2c_read(RSTCTRL_ADDR, RSTCTRL_SCRATCHREG, 1,
- &scratchreg, sizeof(scratchreg));
- i2c_set_bus_speed(oldspeed);
- } else {
- puts("ERROR: i2c_set_bus_speed failed! (scratchregister)\n");
- }
-
- if (gpio_get_value(ESC_KEY)) {
- do {
- lcd_position_cursor(1, 8);
- switch (cnt) {
- case 3:
- lcd_puts(
- "release ESC-KEY to enter SERVICE-mode.");
- break;
- case 2:
- lcd_puts(
- "release ESC-KEY to enter DIAGNOSE-mode.");
- break;
- case 1:
- lcd_puts(
- "release ESC-KEY to enter BOOT-mode. ");
- break;
- }
- mdelay(toff);
- cnt--;
- if (!gpio_get_value(ESC_KEY) &&
- gpio_get_value(PUSH_KEY) && 2 == cnt) {
- lcd_position_cursor(1, 8);
- lcd_puts(
- "switching to network-console ... ");
- setenv("bootcmd", "run netconsole");
- cnt = 4;
- break;
- } else if (!gpio_get_value(ESC_KEY) &&
- gpio_get_value(PUSH_KEY) && 1 == cnt) {
- lcd_position_cursor(1, 8);
- lcd_puts(
- "starting u-boot script from USB ... ");
- setenv("bootcmd", "run usbscript");
- cnt = 4;
- break;
- } else if ((!gpio_get_value(ESC_KEY) &&
- gpio_get_value(PUSH_KEY) && cnt == 0) ||
- (gpio_get_value(ESC_KEY) &&
- gpio_get_value(PUSH_KEY) && cnt == 0)) {
- lcd_position_cursor(1, 8);
- lcd_puts(
- "starting script from network ... ");
- setenv("bootcmd", "run netscript");
- cnt = 4;
- break;
- } else if (!gpio_get_value(ESC_KEY)) {
- break;
- }
- } while (cnt);
- } else if (scratchreg == 0xCC) {
- lcd_position_cursor(1, 8);
- lcd_puts(
- "starting vxworks from network ... ");
- setenv("bootcmd", "run netboot");
- cnt = 4;
- } else if (scratchreg == 0xCD) {
- lcd_position_cursor(1, 8);
- lcd_puts(
- "starting script from network ... ");
- setenv("bootcmd", "run netscript");
- cnt = 4;
- } else if (scratchreg == 0xCE) {
- lcd_position_cursor(1, 8);
- lcd_puts(
- "starting AR from eMMC ... ");
- setenv("bootcmd", "run mmcboot");
- cnt = 4;
- }
-
- lcd_position_cursor(1, 8);
- switch (cnt) {
- case 0:
- lcd_puts("entering BOOT-mode. ");
- setenv("bootcmd", "run defaultAR");
- buf = 0x0000;
- break;
- case 1:
- lcd_puts("entering DIAGNOSE-mode. ");
- buf = 0x0F0F;
- break;
- case 2:
- lcd_puts("entering SERVICE mode. ");
- buf = 0xB4B4;
- break;
- case 3:
- lcd_puts("loading OS... ");
- buf = 0x0404;
- break;
- }
- /* write bootinfo into scratchregister of resetcontroller */
- oldspeed = i2c_get_bus_speed();
- if (i2c_set_bus_speed(CONFIG_SYS_OMAP24_I2C_SPEED_PSOC) >= 0) {
- i2c_write(RSTCTRL_ADDR, RSTCTRL_SCRATCHREG, 1,
- (uint8_t *)&buf, sizeof(buf));
- i2c_set_bus_speed(oldspeed);
- } else {
- puts("ERROR: i2c_set_bus_speed failed! (scratchregister)\n");
- }
- /* setup othbootargs for bootvx-command (vxWorks bootline) */
- char othbootargs[128];
- snprintf(othbootargs, sizeof(othbootargs),
- "u=vxWorksFTP pw=vxWorks o=0x%08x;0x%08x;0x%08x;0x%08x",
- (unsigned int) gd->fb_base-0x20,
- (u32)getenv_ulong("vx_memtop", 16, gd->fb_base-0x20),
- (u32)getenv_ulong("vx_romfsbase", 16, 0),
- (u32)getenv_ulong("vx_romfssize", 16, 0));
- setenv("othbootargs", othbootargs);
- /*
- * reset VBAR registers to its reset location, VxWorks 6.9.3.2 does
- * expect that vectors are there, original u-boot moves them to _start
- */
- __asm__("ldr r0,=0x20000");
- __asm__("mcr p15, 0, r0, c12, c0, 0"); /* Set VBAR */
-
- return 0;
-}
-#endif /* CONFIG_BOARD_LATE_INIT */
+++ /dev/null
-/*
- * mux.c
- *
- * Pinmux Setting for B&R LEIT Board(s)
- *
- * Copyright (C) 2013 Hannes Schmelzer <oe5hpm@oevsv.at>
- * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/mux.h>
-#include <asm/io.h>
-#include <i2c.h>
-
-static struct module_pin_mux spi0_pin_mux[] = {
- /* SPI1_SCLK */
- {OFFSET(spi0_sclk), MODE(0) | PULLUDEN | RXACTIVE},
- /* SPI1_D0 */
- {OFFSET(spi0_d0), MODE(0) | PULLUDEN | RXACTIVE},
- /* SPI1_D1 */
- {OFFSET(spi0_d1), MODE(0) | PULLUDEN | RXACTIVE},
- /* SPI1_CS0 */
- {OFFSET(spi0_cs0), MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE},
- /* SPI1_CS1 */
- {OFFSET(spi0_cs1), MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE},
- {-1},
-};
-
-static struct module_pin_mux dcan0_pin_mux[] = {
- /* DCAN0 TX */
- {OFFSET(uart1_ctsn), MODE(2) | PULLUDEN | PULLUP_EN},
- /* DCAN0 RX */
- {OFFSET(uart1_rtsn), MODE(2) | RXACTIVE},
- {-1},
-};
-
-static struct module_pin_mux dcan1_pin_mux[] = {
- /* DCAN1 TX */
- {OFFSET(uart1_rxd), MODE(2) | PULLUDEN | PULLUP_EN},
- /* DCAN1 RX */
- {OFFSET(uart1_txd), MODE(2) | RXACTIVE},
- {-1},
-};
-
-static struct module_pin_mux gpios[] = {
- /* GPIO0_7 (PWW0 OUT) - CAN TERM */
- {OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUDDIS | RXACTIVE)},
- /* GPIO0_19 (DMA_INTR0) - TA602 */
- {OFFSET(xdma_event_intr0), (MODE(7) | PULLUDDIS | RXACTIVE)},
- /* GPIO0_20 (DMA_INTR1) - SPI0 nCS1 */
- {OFFSET(xdma_event_intr1), (MODE(7) | PULLUDDIS | RXACTIVE)},
- /* GPIO0_29 (RMII1_REFCLK) - eMMC nRST */
- {OFFSET(rmii1_refclk), (MODE(7) | PULLUDDIS)},
- /* GPIO0_30 (GPMC_WAIT0) - TA601 */
- {OFFSET(gpmc_wait0), (MODE(7) | PULLUDDIS | RXACTIVE)},
- /* GPIO0_31 (GPMC_nWP) - SW601 PushButton */
- {OFFSET(gpmc_wpn), (MODE(7) | PULLUDDIS | RXACTIVE)},
- /* GPIO1_28 (GPMC_nWE) - FRAM_nWP */
- {OFFSET(gpmc_be1n), (MODE(7) | PULLUDDIS)},
- /* GPIO1_29 (gpmc_csn0) - MMC nRST */
- {OFFSET(gpmc_csn0), (MODE(7) | PULLUDDIS)},
- /* GPIO2_0 (GPMC_nCS3) - VBAT_OK */
- {OFFSET(gpmc_csn3), (MODE(7) | PULLUDDIS | RXACTIVE) },
- /* GPIO2_2 (GPMC_nADV_ALE) - DCOK */
- {OFFSET(gpmc_advn_ale), (MODE(7) | PULLUDDIS | RXACTIVE)},
- /* GPIO2_4 (GPMC_nWE) - TST_BAST */
- {OFFSET(gpmc_wen), (MODE(7) | PULLUDDIS)},
- /* GPIO2_5 (gpmc_be0n_cle) - DISPLAY_ON_OFF */
- {OFFSET(gpmc_be0n_cle), (MODE(7) | PULLUDDIS)},
- /* GPIO3_16 (mcasp0_axr0) - ETH-LED green */
- {OFFSET(mcasp0_axr0), (MODE(7) | PULLUDDIS | RXACTIVE)},
- /* GPIO3_17 (mcasp0_ahclkr) - CAN_STB */
- {OFFSET(mcasp0_ahclkr), (MODE(7) | PULLUDDIS | RXACTIVE)},
- /* GPIO3_18 (MCASP0_ACLKR) - SW601 CNTup, mapped to Counter eQEB0A_in */
- {OFFSET(mcasp0_aclkr), (MODE(1) | PULLUDDIS | RXACTIVE)},
- /* GPIO3_19 (MCASP0_FSR) - SW601 CNTdown, mapped to Counter eQEB0B_in */
- {OFFSET(mcasp0_fsr), (MODE(1) | PULLUDDIS | RXACTIVE)},
- /* GPIO3_20 (MCASP0_AXR1) - SW601 CNTdown, map to Counter eQEB0_index */
- {OFFSET(mcasp0_axr1), (MODE(1) | PULLUDDIS | RXACTIVE)},
- {-1},
-};
-
-static struct module_pin_mux uart0_pin_mux[] = {
- /* UART0_CTS */
- {OFFSET(uart0_ctsn), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)},
- /* UART0_RXD */
- {OFFSET(uart0_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},
- /* UART0_TXD */
- {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)},
- {-1},
-};
-
-static struct module_pin_mux i2c0_pin_mux[] = {
- /* I2C_DATA */
- {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL)},
- /* I2C_SCLK */
- {OFFSET(i2c0_scl), (MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL)},
- {-1},
-};
-
-static struct module_pin_mux mii1_pin_mux[] = {
- {OFFSET(mii1_crs), MODE(0) | RXACTIVE}, /* MII1_CRS */
- {OFFSET(mii1_col), MODE(0) | RXACTIVE}, /* MII1_COL */
- {OFFSET(mii1_rxerr), MODE(0) | RXACTIVE}, /* MII1_RXERR */
- {OFFSET(mii1_txen), MODE(0)}, /* MII1_TXEN */
- {OFFSET(mii1_rxdv), MODE(0) | RXACTIVE}, /* MII1_RXDV */
- {OFFSET(mii1_txd3), MODE(0)}, /* MII1_TXD3 */
- {OFFSET(mii1_txd2), MODE(0)}, /* MII1_TXD2 */
- {OFFSET(mii1_txd1), MODE(0)}, /* MII1_TXD1 */
- {OFFSET(mii1_txd0), MODE(0)}, /* MII1_TXD0 */
- {OFFSET(mii1_txclk), MODE(0) | RXACTIVE}, /* MII1_TXCLK */
- {OFFSET(mii1_rxclk), MODE(0) | RXACTIVE}, /* MII1_RXCLK */
- {OFFSET(mii1_rxd3), MODE(0) | RXACTIVE}, /* MII1_RXD3 */
- {OFFSET(mii1_rxd2), MODE(0) | RXACTIVE}, /* MII1_RXD2 */
- {OFFSET(mii1_rxd1), MODE(0) | RXACTIVE}, /* MII1_RXD1 */
- {OFFSET(mii1_rxd0), MODE(0) | RXACTIVE}, /* MII1_RXD0 */
- {OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN}, /* MDIO_DATA */
- {OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */
- {-1},
-};
-
-static struct module_pin_mux mmc1_pin_mux[] = {
- {OFFSET(gpmc_ad7), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT7 */
- {OFFSET(gpmc_ad6), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT6 */
- {OFFSET(gpmc_ad5), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT5 */
- {OFFSET(gpmc_ad4), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT4 */
- {OFFSET(gpmc_ad3), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT3 */
- {OFFSET(gpmc_ad2), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT2 */
- {OFFSET(gpmc_ad1), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT1 */
- {OFFSET(gpmc_ad0), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT0 */
- {OFFSET(gpmc_csn1), (MODE(2) | RXACTIVE | PULLUP_EN)}, /* MMC1_CLK */
- {OFFSET(gpmc_csn2), (MODE(2) | RXACTIVE | PULLUP_EN)}, /* MMC1_CMD */
- {OFFSET(gpmc_csn0), (MODE(7) | RXACTIVE | PULLUP_EN)}, /* MMC1_WP */
- {OFFSET(gpmc_advn_ale), (MODE(7) | RXACTIVE | PULLUP_EN)},/* MMC1_CD */
-
- {-1},
-};
-
-static struct module_pin_mux lcd_pin_mux[] = {
- {OFFSET(lcd_data0), (MODE(0) | PULLUDDIS)}, /* LCD-Data(0) */
- {OFFSET(lcd_data1), (MODE(0) | PULLUDDIS)}, /* LCD-Data(1) */
- {OFFSET(lcd_data2), (MODE(0) | PULLUDDIS)}, /* LCD-Data(2) */
- {OFFSET(lcd_data3), (MODE(0) | PULLUDDIS)}, /* LCD-Data(3) */
- {OFFSET(lcd_data4), (MODE(0) | PULLUDDIS)}, /* LCD-Data(4) */
- {OFFSET(lcd_data5), (MODE(0) | PULLUDDIS)}, /* LCD-Data(5) */
- {OFFSET(lcd_data6), (MODE(0) | PULLUDDIS)}, /* LCD-Data(6) */
- {OFFSET(lcd_data7), (MODE(0) | PULLUDDIS)}, /* LCD-Data(7) */
- {OFFSET(lcd_data8), (MODE(0) | PULLUDDIS)}, /* LCD-Data(8) */
- {OFFSET(lcd_data9), (MODE(0) | PULLUDDIS)}, /* LCD-Data(9) */
- {OFFSET(lcd_data10), (MODE(0) | PULLUDDIS)}, /* LCD-Data(10) */
- {OFFSET(lcd_data11), (MODE(0) | PULLUDDIS)}, /* LCD-Data(11) */
- {OFFSET(lcd_data12), (MODE(0) | PULLUDDIS)}, /* LCD-Data(12) */
- {OFFSET(lcd_data13), (MODE(0) | PULLUDDIS)}, /* LCD-Data(13) */
- {OFFSET(lcd_data14), (MODE(0) | PULLUDDIS)}, /* LCD-Data(14) */
- {OFFSET(lcd_data15), (MODE(0) | PULLUDDIS)}, /* LCD-Data(15) */
-
- {OFFSET(gpmc_ad8), (MODE(1) | PULLUDDIS)}, /* LCD-Data(16) */
- {OFFSET(gpmc_ad9), (MODE(1) | PULLUDDIS)}, /* LCD-Data(17) */
- {OFFSET(gpmc_ad10), (MODE(1) | PULLUDDIS)}, /* LCD-Data(18) */
- {OFFSET(gpmc_ad11), (MODE(1) | PULLUDDIS)}, /* LCD-Data(19) */
- {OFFSET(gpmc_ad12), (MODE(1) | PULLUDDIS)}, /* LCD-Data(20) */
- {OFFSET(gpmc_ad13), (MODE(1) | PULLUDDIS)}, /* LCD-Data(21) */
- {OFFSET(gpmc_ad14), (MODE(1) | PULLUDDIS)}, /* LCD-Data(22) */
- {OFFSET(gpmc_ad15), (MODE(1) | PULLUDDIS)}, /* LCD-Data(23) */
-
- {OFFSET(lcd_vsync), (MODE(0) | PULLUDDIS)}, /* LCD-VSync */
- {OFFSET(lcd_hsync), (MODE(0) | PULLUDDIS)}, /* LCD-HSync */
- {OFFSET(lcd_ac_bias_en), (MODE(0) | PULLUDDIS)},/* LCD-DE */
- {OFFSET(lcd_pclk), (MODE(0) | PULLUDDIS)}, /* LCD-CLK */
-
- {-1},
-};
-
-void enable_uart0_pin_mux(void)
-{
- configure_module_pin_mux(uart0_pin_mux);
-}
-
-void enable_i2c_pin_mux(void)
-{
- configure_module_pin_mux(i2c0_pin_mux);
-}
-
-void enable_board_pin_mux(void)
-{
- configure_module_pin_mux(i2c0_pin_mux);
- configure_module_pin_mux(mii1_pin_mux);
- configure_module_pin_mux(spi0_pin_mux);
- configure_module_pin_mux(dcan0_pin_mux);
- configure_module_pin_mux(dcan1_pin_mux);
- configure_module_pin_mux(mmc1_pin_mux);
- configure_module_pin_mux(lcd_pin_mux);
- configure_module_pin_mux(gpios);
-}
--- /dev/null
+CONFIG_ARM=y
+CONFIG_TARGET_BRXRE1=y
+CONFIG_SPL=y
+CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1"
+CONFIG_BOOTDELAY=0
+CONFIG_HUSH_PARSER=y
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_BOOTM is not set
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_GO is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_EDITENV is not set
+# CONFIG_CMD_CRC32 is not set
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DHCP=y
+# CONFIG_CMD_NFS is not set
+CONFIG_CMD_PING=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_NETCONSOLE=y
+CONFIG_SYS_NS16550=y
+CONFIG_USB=y
+CONFIG_USB_MUSB_HOST=y
+CONFIG_USB_STORAGE=y
+CONFIG_OF_LIBFDT=y
+# CONFIG_EFI_LOADER is not set
+++ /dev/null
-CONFIG_ARM=y
-CONFIG_TARGET_KWB=y
-CONFIG_SPL=y
-CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1"
-CONFIG_BOOTDELAY=0
-CONFIG_HUSH_PARSER=y
-# CONFIG_CMD_BOOTD is not set
-# CONFIG_CMD_BOOTM is not set
-CONFIG_CMD_BOOTZ=y
-# CONFIG_CMD_GO is not set
-# CONFIG_CMD_IMI is not set
-# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_XIMG is not set
-# CONFIG_CMD_EDITENV is not set
-# CONFIG_CMD_CRC32 is not set
-# CONFIG_CMD_LOADB is not set
-# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
-# CONFIG_CMD_ITEST is not set
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-# CONFIG_CMD_NFS is not set
-CONFIG_CMD_PING=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_NETCONSOLE=y
-CONFIG_SYS_NS16550=y
-CONFIG_USB=y
-CONFIG_USB_MUSB_HOST=y
-CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
-# CONFIG_EFI_LOADER is not set
--- /dev/null
+/*
+ * brxre1.h
+ *
+ * specific parts for B&R KWB Motherboard
+ *
+ * Copyright (C) 2013 Hannes Schmelzer <oe5hpm@oevsv.at> -
+ * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_BRXRE1_H__
+#define __CONFIG_BRXRE1_H__
+
+#include <configs/bur_cfg_common.h>
+#include <configs/bur_am335x_common.h>
+/* ------------------------------------------------------------------------- */
+#define CONFIG_AM335X_LCD
+#define CONFIG_LCD
+#define CONFIG_LCD_NOSTDOUT
+#define CONFIG_SYS_WHITE_ON_BLACK
+#define LCD_BPP LCD_COLOR32
+
+#define CONFIG_VIDEO_BMP_GZIP
+#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (1366*767*4)
+#define CONFIG_CMD_UNZIP
+#define CONFIG_CMD_BMP
+#define CONFIG_BMP_24BMP
+#define CONFIG_BMP_32BPP
+
+/* memory */
+#define CONFIG_SYS_MALLOC_LEN (5 * 1024 * 1024)
+
+/* Clock Defines */
+#define V_OSCK 26000000 /* Clock output from T2 */
+#define V_SCLK (V_OSCK)
+
+#define CONFIG_POWER_TPS65217
+
+#define CONFIG_MACH_TYPE 3589
+/* I2C IP block */
+#define CONFIG_SYS_OMAP24_I2C_SPEED_PSOC 20000
+
+/* GPIO */
+#define CONFIG_SPL_GPIO_SUPPORT
+
+/* MMC/SD IP block */
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_OMAP_HSMMC
+#define CONFIG_SUPPORT_EMMC_BOOT
+/* RAW SD card / eMMC locations. */
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /*addr. 0x60000 */
+#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
+#define CONFIG_SPL_MMC_SUPPORT
+
+/* Always 64 KiB env size */
+#define CONFIG_ENV_SIZE (64 << 10)
+
+#ifndef CONFIG_SPL_BUILD
+#define CONFIG_EXTRA_ENV_SETTINGS \
+BUR_COMMON_ENV \
+"bootaddr=0x80001100\0" \
+"bootdev=cpsw(0,0)\0" \
+"vx_romfsbase=0x800E0000\0" \
+"vx_romfssize=0x20000\0" \
+"vx_memtop=0x8FBEF000\0" \
+"loadromfs=mmc read ${vx_romfsbase} 700 100\0" \
+"autoload=0\0" \
+"loadaddr=0x80100000\0" \
+"logoaddr=0x82000000\0" \
+"defaultARlen=0x8000\0" \
+"loaddefaultAR=mmc read ${loadaddr} 800 ${defaultARlen}\0" \
+"defaultAR=run loadromfs; run loaddefaultAR; bootvx ${loadaddr}\0" \
+"logo0=fatload mmc 0:1 ${logoaddr} SYSTEM/ADDON/Bootlogo/Bootlogo.bmp.gz && " \
+ "bmp display ${logoaddr} 0 0\0" \
+"logo1=fatload mmc 0:1 ${logoaddr} SYSTEM/BASE/Bootlogo/Bootlogo.bmp.gz && " \
+ "bmp display ${logoaddr} 0 0\0" \
+"mmcboot=echo booting AR from eMMC-flash ...; "\
+ "run logo0 || run logo1; " \
+ "run loadromfs; " \
+ "fatload mmc 0:1 ${loadaddr} arimg && bootvx ${loadaddr}; " \
+ "run defaultAR;\0" \
+"netboot=echo booting AR from network ...; " \
+ "run loadromfs; " \
+ "tftp ${loadaddr} arimg && bootvx ${loadaddr}; " \
+ "puts 'networkboot failed!';\0" \
+"netscript=echo running script from network (tftp) ...; " \
+ "tftp 0x80000000 netscript.img && source; " \
+ "puts 'netscript load failed!'\0" \
+"netupdate=tftp ${loadddr} MLO && mmc write ${loadaddr} 100 100; " \
+ "tftp ${loadaddr} u-boot.img && mmc write ${loadaddr} 300 300\0" \
+"netupdatedefaultAR=echo updating defaultAR from network (tftp) ...; " \
+ "if tftp 0x80100000 arimg.bin; " \
+ "then mmc write 0x80100000 800 ${defaultARlen}; " \
+ "else setcurs 1 8; puts 'defAR update failed (tftp)!'; fi;\0" \
+"netupdateROMFS=echo updating romfs from network (tftp) ...; " \
+ "if tftp 0x80100000 romfs.bin; " \
+ "then mmc write 0x80100000 700 100; " \
+ "else setcurs 1 8; puts 'romfs update failed (tftp)!'; fi;\0"
+
+#endif /* !CONFIG_SPL_BUILD*/
+
+#define CONFIG_BOOTCOMMAND \
+ "run usbscript;"
+
+/* undefine command which we not need here */
+#undef CONFIG_BOOTM_NETBSD
+#undef CONFIG_BOOTM_PLAN9
+#undef CONFIG_BOOTM_RTEMS
+
+/* Support both device trees and ATAGs. */
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+
+/* USB configuration */
+#define CONFIG_USB_MUSB_DSPS
+#define CONFIG_ARCH_MISC_INIT
+#define CONFIG_USB_MUSB_PIO_ONLY
+#define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT
+#define CONFIG_AM335X_USB0
+#define CONFIG_AM335X_USB0_MODE MUSB_HOST
+#define CONFIG_AM335X_USB1
+#define CONFIG_AM335X_USB1_MODE MUSB_HOST
+
+#undef CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV 0
+#define CONFIG_SYS_MMC_ENV_PART 2
+#define CONFIG_ENV_OFFSET 0x40000 /* TODO: Adresse definieren */
+#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
+#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
+/*
+ * Common filesystems support. When we have removable storage we
+ * enabled a number of useful commands and support.
+ */
+#if defined(CONFIG_MMC) || defined(CONFIG_USB_STORAGE)
+#define CONFIG_DOS_PARTITION
+#define CONFIG_FAT_WRITE
+#endif /* CONFIG_MMC, ... */
+
+#endif /* __CONFIG_BRXRE1_H__ */
+++ /dev/null
-/*
- * kwb.h
- *
- * specific parts for B&R KWB Motherboard
- *
- * Copyright (C) 2013 Hannes Schmelzer <oe5hpm@oevsv.at> -
- * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __CONFIG_KWB_H__
-#define __CONFIG_KWB_H__
-
-#include <configs/bur_cfg_common.h>
-#include <configs/bur_am335x_common.h>
-/* ------------------------------------------------------------------------- */
-#define CONFIG_AM335X_LCD
-#define CONFIG_LCD
-#define CONFIG_LCD_NOSTDOUT
-#define CONFIG_SYS_WHITE_ON_BLACK
-#define LCD_BPP LCD_COLOR32
-
-#define CONFIG_VIDEO_BMP_GZIP
-#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (1366*767*4)
-#define CONFIG_CMD_UNZIP
-#define CONFIG_CMD_BMP
-#define CONFIG_BMP_24BMP
-#define CONFIG_BMP_32BPP
-
-/* memory */
-#define CONFIG_SYS_MALLOC_LEN (5 * 1024 * 1024)
-
-/* Clock Defines */
-#define V_OSCK 26000000 /* Clock output from T2 */
-#define V_SCLK (V_OSCK)
-
-#define CONFIG_POWER_TPS65217
-
-#define CONFIG_MACH_TYPE 3589
-/* I2C IP block */
-#define CONFIG_SYS_OMAP24_I2C_SPEED_PSOC 20000
-
-/* GPIO */
-#define CONFIG_SPL_GPIO_SUPPORT
-
-/* MMC/SD IP block */
-#define CONFIG_MMC
-#define CONFIG_GENERIC_MMC
-#define CONFIG_OMAP_HSMMC
-#define CONFIG_SUPPORT_EMMC_BOOT
-/* RAW SD card / eMMC locations. */
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /*addr. 0x60000 */
-#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
-#define CONFIG_SPL_MMC_SUPPORT
-
-/* Always 64 KiB env size */
-#define CONFIG_ENV_SIZE (64 << 10)
-
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_EXTRA_ENV_SETTINGS \
-BUR_COMMON_ENV \
-"bootaddr=0x80001100\0" \
-"bootdev=cpsw(0,0)\0" \
-"vx_romfsbase=0x800E0000\0" \
-"vx_romfssize=0x20000\0" \
-"vx_memtop=0x8FBEF000\0" \
-"loadromfs=mmc read ${vx_romfsbase} 700 100\0" \
-"autoload=0\0" \
-"loadaddr=0x80100000\0" \
-"logoaddr=0x82000000\0" \
-"defaultARlen=0x8000\0" \
-"loaddefaultAR=mmc read ${loadaddr} 800 ${defaultARlen}\0" \
-"defaultAR=run loadromfs; run loaddefaultAR; bootvx ${loadaddr}\0" \
-"logo0=fatload mmc 0:1 ${logoaddr} SYSTEM/ADDON/Bootlogo/Bootlogo.bmp.gz && " \
- "bmp display ${logoaddr} 0 0\0" \
-"logo1=fatload mmc 0:1 ${logoaddr} SYSTEM/BASE/Bootlogo/Bootlogo.bmp.gz && " \
- "bmp display ${logoaddr} 0 0\0" \
-"mmcboot=echo booting AR from eMMC-flash ...; "\
- "run logo0 || run logo1; " \
- "run loadromfs; " \
- "fatload mmc 0:1 ${loadaddr} arimg && bootvx ${loadaddr}; " \
- "run defaultAR;\0" \
-"netboot=echo booting AR from network ...; " \
- "run loadromfs; " \
- "tftp ${loadaddr} arimg && bootvx ${loadaddr}; " \
- "puts 'networkboot failed!';\0" \
-"netscript=echo running script from network (tftp) ...; " \
- "tftp 0x80000000 netscript.img && source; " \
- "puts 'netscript load failed!'\0" \
-"netupdate=tftp ${loadddr} MLO && mmc write ${loadaddr} 100 100; " \
- "tftp ${loadaddr} u-boot.img && mmc write ${loadaddr} 300 300\0" \
-"netupdatedefaultAR=echo updating defaultAR from network (tftp) ...; " \
- "if tftp 0x80100000 arimg.bin; " \
- "then mmc write 0x80100000 800 ${defaultARlen}; " \
- "else setcurs 1 8; puts 'defAR update failed (tftp)!'; fi;\0" \
-"netupdateROMFS=echo updating romfs from network (tftp) ...; " \
- "if tftp 0x80100000 romfs.bin; " \
- "then mmc write 0x80100000 700 100; " \
- "else setcurs 1 8; puts 'romfs update failed (tftp)!'; fi;\0"
-
-#endif /* !CONFIG_SPL_BUILD*/
-
-#define CONFIG_BOOTCOMMAND \
- "run usbscript;"
-
-/* undefine command which we not need here */
-#undef CONFIG_BOOTM_NETBSD
-#undef CONFIG_BOOTM_PLAN9
-#undef CONFIG_BOOTM_RTEMS
-
-/* Support both device trees and ATAGs. */
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-
-/* USB configuration */
-#define CONFIG_USB_MUSB_DSPS
-#define CONFIG_ARCH_MISC_INIT
-#define CONFIG_USB_MUSB_PIO_ONLY
-#define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT
-#define CONFIG_AM335X_USB0
-#define CONFIG_AM335X_USB0_MODE MUSB_HOST
-#define CONFIG_AM335X_USB1
-#define CONFIG_AM335X_USB1_MODE MUSB_HOST
-
-#undef CONFIG_ENV_IS_NOWHERE
-#define CONFIG_ENV_IS_IN_MMC
-#define CONFIG_SYS_MMC_ENV_DEV 0
-#define CONFIG_SYS_MMC_ENV_PART 2
-#define CONFIG_ENV_OFFSET 0x40000 /* TODO: Adresse definieren */
-#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
-#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
-/*
- * Common filesystems support. When we have removable storage we
- * enabled a number of useful commands and support.
- */
-#if defined(CONFIG_MMC) || defined(CONFIG_USB_STORAGE)
-#define CONFIG_DOS_PARTITION
-#define CONFIG_FAT_WRITE
-#endif /* CONFIG_MMC, ... */
-
-#endif /* __CONFIG_KWB_H__ */
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