]> git.sur5r.net Git - u-boot/commitdiff
exynos: spi: Fix calculation of SPI transaction start time
authorSimon Glass <sjg@chromium.org>
Mon, 7 Jul 2014 16:16:38 +0000 (10:16 -0600)
committerJagannadha Sutradharudu Teki <jaganna@xilinx.com>
Tue, 5 Aug 2014 18:48:01 +0000 (00:18 +0530)
The SPI transaction delay is supposed to be measured from the end of one
transaction to the start of the next. The code does not work that way, so
fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
drivers/spi/exynos_spi.c

index c92276fdf7199acf1d42c16840a6b75f2ae22455..2969184ee877360da2a170b9f2ddb12722ffb08a 100644 (file)
@@ -428,10 +428,6 @@ void spi_cs_activate(struct spi_slave *slave)
        clrbits_le32(&spi_slave->regs->cs_reg, SPI_SLAVE_SIG_INACT);
        debug("Activate CS, bus %d\n", spi_slave->slave.bus);
        spi_slave->skip_preamble = spi_slave->mode & SPI_PREAMBLE;
-
-       /* Remember time of this transaction so we can honour the bus delay */
-       if (spi_slave->bus->deactivate_delay_us)
-               spi_slave->last_transaction_us = timer_get_us();
 }
 
 /**
@@ -445,6 +441,11 @@ void spi_cs_deactivate(struct spi_slave *slave)
        struct exynos_spi_slave *spi_slave = to_exynos_spi(slave);
 
        setbits_le32(&spi_slave->regs->cs_reg, SPI_SLAVE_SIG_INACT);
+
+       /* Remember time of this transaction so we can honour the bus delay */
+       if (spi_slave->bus->deactivate_delay_us)
+               spi_slave->last_transaction_us = timer_get_us();
+
        debug("Deactivate CS, bus %d\n", spi_slave->slave.bus);
 }