/* GRLIB APBUART Serial controller driver
*
- * (C) Copyright 2008
- * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
+ * (C) Copyright 2008, 2015
+ * Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
-#include <asm/processor.h>
-#include <asm/leon.h>
+#include <asm/io.h>
#include <serial.h>
-#include <linux/compiler.h>
+#include <watchdog.h>
DECLARE_GLOBAL_DATA_PTR;
+static unsigned leon2_serial_calc_scaler(unsigned freq, unsigned baud)
+{
+ return (((freq*10) / (baud*8)) - 5) / 10;
+}
+
static int leon2_serial_init(void)
{
- LEON2_regs *leon2 = (LEON2_regs *) LEON2_PREGS;
+ LEON2_regs *leon2 = (LEON2_regs *)LEON2_PREGS;
LEON2_Uart_regs *regs;
unsigned int tmp;
- /* Init LEON2 UART
- *
- * Set scaler / baud rate
- *
- * Receiver & transmitter enable
- */
#if LEON2_CONSOLE_SELECT == LEON_CONSOLE_UART1
- regs = (LEON2_Uart_regs *) & leon2->UART_Channel_1;
+ regs = (LEON2_Uart_regs *)&leon2->UART_Channel_1;
#else
- regs = (LEON2_Uart_regs *) & leon2->UART_Channel_2;
+ regs = (LEON2_Uart_regs *)&leon2->UART_Channel_2;
#endif
- regs->UART_Scaler = CONFIG_SYS_LEON2_UART1_SCALER;
+ /* Set scaler / baud rate */
+ tmp = leon2_serial_calc_scaler(CONFIG_SYS_CLK_FREQ, CONFIG_BAUDRATE);
+ writel(tmp, ®s->UART_Scaler);
/* Let bit 11 be unchanged (debug bit for GRMON) */
- tmp = READ_WORD(regs->UART_Control);
+ tmp = readl(®s->UART_Control) & LEON2_UART_CTRL_DBG;
+ tmp |= (LEON2_UART1_LOOPBACK_ENABLE << 7);
+ tmp |= (LEON2_UART1_FLOWCTRL_ENABLE << 6);
+ tmp |= (LEON2_UART1_PARITY_ENABLE << 5);
+ tmp |= (LEON2_UART1_ODDPAR_ENABLE << 4);
+ /* Receiver & transmitter enable */
+ tmp |= (LEON2_UART_CTRL_RE | LEON2_UART_CTRL_TE);
+ writel(tmp, ®s->UART_Control);
+
+ gd->arch.uart = regs;
+ return 0;
+}
- regs->UART_Control = ((tmp & LEON2_UART_CTRL_DBG) |
- (LEON2_UART1_LOOPBACK_ENABLE << 7) |
- (LEON2_UART1_FLOWCTRL_ENABLE << 6) |
- (LEON2_UART1_PARITY_ENABLE << 5) |
- (LEON2_UART1_ODDPAR_ENABLE << 4) |
- LEON2_UART_CTRL_RE | LEON2_UART_CTRL_TE);
+static inline LEON2_Uart_regs *leon2_get_uart_regs(void)
+{
+ LEON2_Uart_regs *uart = gd->arch.uart;
- return 0;
+ return uart;
}
static void leon2_serial_putc_raw(const char c)
{
- LEON2_regs *leon2 = (LEON2_regs *) LEON2_PREGS;
- LEON2_Uart_regs *regs;
+ LEON2_Uart_regs *uart = leon2_get_uart_regs();
-#if LEON2_CONSOLE_SELECT == LEON_CONSOLE_UART1
- regs = (LEON2_Uart_regs *) & leon2->UART_Channel_1;
-#else
- regs = (LEON2_Uart_regs *) & leon2->UART_Channel_2;
-#endif
+ if (!uart)
+ return;
/* Wait for last character to go. */
- while (!(READ_WORD(regs->UART_Status) & LEON2_UART_STAT_THE)) ;
+ while (!(readl(&uart->UART_Status) & LEON2_UART_STAT_THE))
+ WATCHDOG_RESET();
/* Send data */
- regs->UART_Channel = c;
+ writel(c, &uart->UART_Channel);
#ifdef LEON_DEBUG
/* Wait for data to be sent */
- while (!(READ_WORD(regs->UART_Status) & LEON2_UART_STAT_TSE)) ;
+ while (!(readl(&uart->UART_Status) & LEON2_UART_STAT_TSE))
+ WATCHDOG_RESET();
#endif
}
static int leon2_serial_getc(void)
{
- LEON2_regs *leon2 = (LEON2_regs *) LEON2_PREGS;
- LEON2_Uart_regs *regs;
+ LEON2_Uart_regs *uart = leon2_get_uart_regs();
-#if LEON2_CONSOLE_SELECT == LEON_CONSOLE_UART1
- regs = (LEON2_Uart_regs *) & leon2->UART_Channel_1;
-#else
- regs = (LEON2_Uart_regs *) & leon2->UART_Channel_2;
-#endif
+ if (!uart)
+ return 0;
/* Wait for a character to arrive. */
- while (!(READ_WORD(regs->UART_Status) & LEON2_UART_STAT_DR)) ;
+ while (!(readl(&uart->UART_Status) & LEON2_UART_STAT_DR))
+ WATCHDOG_RESET();
- /* read data */
- return READ_WORD(regs->UART_Channel);
+ /* Read character data */
+ return readl(&uart->UART_Channel);
}
static int leon2_serial_tstc(void)
{
- LEON2_regs *leon2 = (LEON2_regs *) LEON2_PREGS;
- LEON2_Uart_regs *regs;
+ LEON2_Uart_regs *uart = leon2_get_uart_regs();
-#if LEON2_CONSOLE_SELECT == LEON_CONSOLE_UART1
- regs = (LEON2_Uart_regs *) & leon2->UART_Channel_1;
-#else
- regs = (LEON2_Uart_regs *) & leon2->UART_Channel_2;
-#endif
+ if (!uart)
+ return 0;
- return (READ_WORD(regs->UART_Status) & LEON2_UART_STAT_DR);
+ return readl(&uart->UART_Status) & LEON2_UART_STAT_DR;
}
-/* set baud rate for uart */
static void leon2_serial_setbrg(void)
{
- /* update baud rate settings, read it from gd->baudrate */
+ LEON2_Uart_regs *uart = leon2_get_uart_regs();
unsigned int scaler;
- LEON2_regs *leon2 = (LEON2_regs *) LEON2_PREGS;
- LEON2_Uart_regs *regs;
-#if LEON2_CONSOLE_SELECT == LEON_CONSOLE_UART1
- regs = (LEON2_Uart_regs *) & leon2->UART_Channel_1;
-#else
- regs = (LEON2_Uart_regs *) & leon2->UART_Channel_2;
-#endif
+ if (!uart)
+ return;
+
+ if (!gd->baudrate)
+ gd->baudrate = CONFIG_BAUDRATE;
+
+ scaler = leon2_serial_calc_scaler(CONFIG_SYS_CLK_FREQ, CONFIG_BAUDRATE);
- if (gd->baudrate > 0) {
- scaler =
- (((CONFIG_SYS_CLK_FREQ * 10) / (gd->baudrate * 8)) -
- 5) / 10;
- regs->UART_Scaler = scaler;
- }
+ writel(scaler, &uart->UART_Scaler);
}
static struct serial_device leon2_serial_drv = {
#define PRINT_ROM_VEC
*/
extern struct linux_romvec *kernel_arg_promvec;
-extern ambapp_dev_apbuart *leon3_apbuart;
+
+DECLARE_GLOBAL_DATA_PTR;
#define PROM_PGT __attribute__ ((__section__ (".prom.pgt")))
#define PROM_TEXT __attribute__ ((__section__ (".prom.text")))
pspi->avail.num_bytes = pspi->totphys.num_bytes;
/* Set the pointer to the Console UART in romvec */
- pspi->reloc_funcs.leon3_apbuart = leon3_apbuart;
+ pspi->reloc_funcs.leon3_apbuart = gd->arch.uart;
{
int j = 1;
/* GRLIB APBUART Serial controller driver
*
- * (C) Copyright 2007
- * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
+ * (C) Copyright 2007, 2015
+ * Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
-#include <asm/processor.h>
-#include <asm/leon.h>
+#include <asm/io.h>
#include <ambapp.h>
#include <serial.h>
-#include <linux/compiler.h>
+#include <watchdog.h>
DECLARE_GLOBAL_DATA_PTR;
-ambapp_dev_apbuart *leon3_apbuart = NULL;
-
static int leon3_serial_init(void)
{
+ ambapp_dev_apbuart *uart;
ambapp_apbdev apbdev;
unsigned int tmp;
/* find UART */
- if (ambapp_apb_first(VENDOR_GAISLER, GAISLER_APBUART, &apbdev) == 1) {
+ if (ambapp_apb_first(VENDOR_GAISLER, GAISLER_APBUART, &apbdev) != 1)
+ return -1; /* didn't find hardware */
- leon3_apbuart = (ambapp_dev_apbuart *) apbdev.address;
+ /* found apbuart, let's init .. */
+ uart = (ambapp_dev_apbuart *) apbdev.address;
- /* found apbuart, let's init...
- *
- * Set scaler / baud rate
- *
- * Receiver & transmitter enable
- */
- leon3_apbuart->scaler = CONFIG_SYS_GRLIB_APBUART_SCALER;
+ /* Set scaler / baud rate */
+ tmp = (((CONFIG_SYS_CLK_FREQ*10) / (CONFIG_BAUDRATE*8)) - 5)/10;
+ writel(tmp, &uart->scaler);
- /* Let bit 11 be unchanged (debug bit for GRMON) */
- tmp = READ_WORD(leon3_apbuart->ctrl);
+ /* Let bit 11 be unchanged (debug bit for GRMON) */
+ tmp = readl(&uart->ctrl) & LEON_REG_UART_CTRL_DBG;
+ /* Receiver & transmitter enable */
+ tmp |= LEON_REG_UART_CTRL_RE | LEON_REG_UART_CTRL_TE;
+ writel(tmp, &uart->ctrl);
- leon3_apbuart->ctrl = ((tmp & LEON_REG_UART_CTRL_DBG) |
- LEON_REG_UART_CTRL_RE |
- LEON_REG_UART_CTRL_TE);
+ gd->arch.uart = uart;
+ return 0;
+}
- return 0;
- }
- return -1; /* didn't find hardware */
+static inline ambapp_dev_apbuart *leon3_get_uart_regs(void)
+{
+ ambapp_dev_apbuart *uart = gd->arch.uart;
+ return uart;
}
static void leon3_serial_putc_raw(const char c)
{
- if (!leon3_apbuart)
+ ambapp_dev_apbuart * const uart = leon3_get_uart_regs();
+
+ if (!uart)
return;
/* Wait for last character to go. */
- while (!(READ_WORD(leon3_apbuart->status) & LEON_REG_UART_STATUS_THE)) ;
+ while (!(readl(&uart->status) & LEON_REG_UART_STATUS_THE))
+ WATCHDOG_RESET();
/* Send data */
- leon3_apbuart->data = c;
+ writel(c, &uart->data);
#ifdef LEON_DEBUG
/* Wait for data to be sent */
- while (!(READ_WORD(leon3_apbuart->status) & LEON_REG_UART_STATUS_TSE)) ;
+ while (!(readl(&uart->status) & LEON_REG_UART_STATUS_TSE))
+ WATCHDOG_RESET();
#endif
}
static int leon3_serial_getc(void)
{
- if (!leon3_apbuart)
+ ambapp_dev_apbuart * const uart = leon3_get_uart_regs();
+
+ if (!uart)
return 0;
/* Wait for a character to arrive. */
- while (!(READ_WORD(leon3_apbuart->status) & LEON_REG_UART_STATUS_DR)) ;
+ while (!(readl(&uart->status) & LEON_REG_UART_STATUS_DR))
+ WATCHDOG_RESET();
- /* read data */
- return READ_WORD(leon3_apbuart->data);
+ /* Read character data */
+ return readl(&uart->data);
}
static int leon3_serial_tstc(void)
{
- if (leon3_apbuart)
- return (READ_WORD(leon3_apbuart->status) &
- LEON_REG_UART_STATUS_DR);
- return 0;
+ ambapp_dev_apbuart * const uart = leon3_get_uart_regs();
+
+ if (!uart)
+ return 0;
+
+ return readl(&uart->status) & LEON_REG_UART_STATUS_DR;
}
/* set baud rate for uart */
static void leon3_serial_setbrg(void)
{
- /* update baud rate settings, read it from gd->baudrate */
+ ambapp_dev_apbuart * const uart = leon3_get_uart_regs();
unsigned int scaler;
- if (leon3_apbuart && (gd->baudrate > 0)) {
- scaler =
- (((CONFIG_SYS_CLK_FREQ * 10) / (gd->baudrate * 8)) -
- 5) / 10;
- leon3_apbuart->scaler = scaler;
- }
- return;
+
+ if (!uart)
+ return;
+
+ if (!gd->baudrate)
+ gd->baudrate = CONFIG_BAUDRATE;
+
+ scaler = (((CONFIG_SYS_CLK_FREQ*10) / (gd->baudrate*8)) - 5)/10;
+
+ writel(scaler, &uart->scaler);
}
static struct serial_device leon3_serial_drv = {
/* Architecture-specific global data */
struct arch_global_data {
+ void *uart;
};
#include <asm-generic/global_data.h>
/* SPARC I/O definitions
*
- * (C) Copyright 2007
- * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
+ * (C) Copyright 2007, 2015
+ * Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com.
*
* SPDX-License-Identifier: GPL-2.0+
*/
/* Nothing to sync, total store ordering (TSO)... */
#define sync()
+/*
+ * Generic virtual read/write.
+ */
+
+#ifndef CONFIG_SYS_HAS_NO_CACHE
+
/* Forces a cache miss on read/load.
* On some architectures we need to bypass the cache when reading
* I/O registers so that we are not reading the same status word
* over and over again resulting in a hang (until an IRQ if lucky)
- *
*/
-#ifndef CONFIG_SYS_HAS_NO_CACHE
-#define READ_BYTE(var) SPARC_NOCACHE_READ_BYTE((unsigned int)(var))
-#define READ_HWORD(var) SPARC_NOCACHE_READ_HWORD((unsigned int)(var))
-#define READ_WORD(var) SPARC_NOCACHE_READ((unsigned int)(var))
-#define READ_DWORD(var) SPARC_NOCACHE_READ_DWORD((unsigned int)(var))
+
+#define __arch_getb(a) SPARC_NOCACHE_READ_BYTE((unsigned int)(a))
+#define __arch_getw(a) SPARC_NOCACHE_READ_HWORD((unsigned int)(a))
+#define __arch_getl(a) SPARC_NOCACHE_READ((unsigned int)(a))
+#define __arch_getq(a) SPARC_NOCACHE_READ_DWORD((unsigned int)(a))
+
#else
-#define READ_BYTE(var) (var)
-#define READ_HWORD(var) (var)
-#define READ_WORD(var) (var)
-#define READ_DWORD(var) (var)
-#endif
-/*
- * Generic virtual read/write.
- */
-#define __arch_getb(a) (READ_BYTE(a))
-#define __arch_getw(a) (READ_HWORD(a))
-#define __arch_getl(a) (READ_WORD(a))
-#define __arch_getq(a) (READ_DWORD(a))
+#define __arch_getb(a) (*(volatile unsigned char *)(a))
+#define __arch_getw(a) (*(volatile unsigned short *)(a))
+#define __arch_getl(a) (*(volatile unsigned int *)(a))
+#define __arch_getq(a) (*(volatile unsigned long long *)(a))
+
+#endif /* CONFIG_SYS_HAS_NO_CACHE */
-#define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v))
-#define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v))
-#define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v))
+#define __arch_putb(v, a) (*(volatile unsigned char *)(a) = (v))
+#define __arch_putw(v, a) (*(volatile unsigned short *)(a) = (v))
+#define __arch_putl(v, a) (*(volatile unsigned int *)(a) = (v))
+#define __arch_putq(v, a) (*(volatile unsigned long long *)(a) = (v))
-#define __raw_writeb(v,a) __arch_putb(v,a)
-#define __raw_writew(v,a) __arch_putw(v,a)
-#define __raw_writel(v,a) __arch_putl(v,a)
+#define __raw_writeb(v, a) __arch_putb(v, a)
+#define __raw_writew(v, a) __arch_putw(v, a)
+#define __raw_writel(v, a) __arch_putl(v, a)
+#define __raw_writeq(v, a) __arch_putq(v, a)
#define __raw_readb(a) __arch_getb(a)
#define __raw_readw(a) __arch_getw(a)
#define __raw_readl(a) __arch_getl(a)
#define __raw_readq(a) __arch_getq(a)
+#define writeb __raw_writeb
+#define writew __raw_writew
+#define writel __raw_writel
+#define writeq __raw_writeq
+
+#define readb __raw_readb
+#define readw __raw_readw
+#define readl __raw_readl
+#define readq __raw_readq
+
/*
* Given a physical address and a length, return a virtual address
* that can be used to access the memory range with the caching
#define CONFIG_SYS_GRLIB_DDR2_CFG1 0x00000000
#define CONFIG_SYS_GRLIB_DDR2_CFG3 0x00000000
-/* Calculate scaler register value from default baudrate */
-#define CONFIG_SYS_GRLIB_APBUART_SCALER \
- ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10)
-
/* Identification string */
#define CONFIG_IDENT_STRING "GAISLER LEON3 GR-CPCI-AX2000"
#define CONFIG_SYS_GRLIB_DDR2_CFG1 0x00000000
#define CONFIG_SYS_GRLIB_DDR2_CFG3 0x00000000
-/* Calculate scaler register value from default baudrate */
-#define CONFIG_SYS_GRLIB_APBUART_SCALER \
- ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10)
-
/* Identification string */
#define CONFIG_IDENT_STRING "GAISLER LEON3 EP2S60"
#define CONFIG_SYS_GRLIB_DDR2_CFG1 0x00000000
#define CONFIG_SYS_GRLIB_DDR2_CFG3 0x00000000
-/* Calculate scaler register value from default baudrate */
-#define CONFIG_SYS_GRLIB_APBUART_SCALER \
- ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10)
-
/* Identification string */
#define CONFIG_IDENT_STRING "GAISLER LEON3 GR-XC3S-1500"
#define CONFIG_SYS_GRLIB_DDR2_CFG1 0x00000000
#define CONFIG_SYS_GRLIB_DDR2_CFG3 0x00000000
-#define CONFIG_SYS_GRLIB_APBUART_SCALER \
- ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10)
-
/* default kernel command line */
#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
#define CONFIG_SYS_GRLIB_MEMCFG3 0x00136000
/*** LEON2 UART 1 ***/
-#define CONFIG_SYS_LEON2_UART1_SCALER \
- ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10)
/* UART1 Define to 1 or 0 */
#define LEON2_UART1_LOOPBACK_ENABLE 0
/*** LEON2 UART 2 ***/
-#define CONFIG_SYS_LEON2_UART2_SCALER \
- ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10)
-
/* UART2 Define to 1 or 0 */
#define LEON2_UART2_LOOPBACK_ENABLE 0
#define LEON2_UART2_FLOWCTRL_ENABLE 0
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