]> git.sur5r.net Git - u-boot/commitdiff
mmc: omap_hsmmc: Update pbias programming
authorBalaji T K <balajitk@ti.com>
Thu, 6 Jun 2013 05:04:32 +0000 (05:04 +0000)
committerTom Rini <trini@ti.com>
Mon, 10 Jun 2013 12:43:10 +0000 (08:43 -0400)
Update pbias programming sequence for OMAP5 ES2.0/DRA7

Signed-off-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
arch/arm/include/asm/arch-omap5/omap.h
drivers/mmc/omap_hsmmc.c
include/configs/omap5_common.h
include/configs/omap5_uevm.h

index 06171d017b25c2ac292b302763f7e95b84ccb986..bb6a757dc03c875a9f9f883e0e7bc18edaae1194 100644 (file)
 /* CONTROL_EFUSE_2 */
 #define CONTROL_EFUSE_2_NMOS_PMOS_PTV_CODE_1           0x00ffc000
 
+#define SDCARD_BIAS_PWRDNZ                             (1 << 27)
 #define SDCARD_PWRDNZ                                  (1 << 26)
 #define SDCARD_BIAS_HIZ_MODE                           (1 << 25)
-#define SDCARD_BIAS_PWRDNZ                             (1 << 22)
 #define SDCARD_PBIASLITE_VMODE                         (1 << 21)
 
 #ifndef __ASSEMBLY__
index afdfa886e8a013d44e6b3e759b8662ccc8c6bf80..975b2c5ba4d74b1ae875a205341efec5bd233e82 100644 (file)
@@ -113,23 +113,21 @@ static void omap5_pbias_config(struct mmc *mmc)
        u32 value = 0;
 
        value = readl((*ctrl)->control_pbias);
-       value &= ~(SDCARD_PWRDNZ | SDCARD_BIAS_PWRDNZ);
-       value |= SDCARD_BIAS_HIZ_MODE;
+       value &= ~SDCARD_PWRDNZ;
+       writel(value, (*ctrl)->control_pbias);
+       udelay(10); /* wait 10 us */
+       value &= ~SDCARD_BIAS_PWRDNZ;
        writel(value, (*ctrl)->control_pbias);
 
        palmas_mmc1_poweron_ldo();
 
        value = readl((*ctrl)->control_pbias);
-       value &= ~SDCARD_BIAS_HIZ_MODE;
-       value |= SDCARD_PBIASLITE_VMODE | SDCARD_PWRDNZ | SDCARD_BIAS_PWRDNZ;
+       value |= SDCARD_BIAS_PWRDNZ;
        writel(value, (*ctrl)->control_pbias);
-
-       value = readl((*ctrl)->control_pbias);
-       if (value & (1 << 23)) {
-               value &= ~(SDCARD_PWRDNZ | SDCARD_BIAS_PWRDNZ);
-               value |= SDCARD_BIAS_HIZ_MODE;
-               writel(value, (*ctrl)->control_pbias);
-       }
+       udelay(150); /* wait 150 us */
+       value |= SDCARD_PWRDNZ;
+       writel(value, (*ctrl)->control_pbias);
+       udelay(150); /* wait 150 us */
 }
 #endif
 
index 83b91d1590dbd3358b078544408a015fa2e72f49..ddf2ad4fc2918307fe6489ef8788a36c057abc1d 100644 (file)
 #define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
 #endif
 
+#ifndef CONFIG_SPL_BUILD
+#define CONFIG_PALMAS_POWER
+#endif
+
 /* Defines for SPL */
 #define CONFIG_SPL
 #define CONFIG_SPL_FRAMEWORK
index 7382aa25be5ea71f18d1ed98ce33d4fe5fec856b..dea05bc911cf6970ebd8197921e72625dbed0f37 100644 (file)
 #define CONFIG_SYS_NS16550_COM3                UART3_BASE
 #define CONFIG_BAUDRATE                        115200
 
-/* TWL6035 */
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_PALMAS_POWER
-#endif
-
 /* MMC ENV related defines */
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV         1       /* SLOT2: eMMC(1) */