]> git.sur5r.net Git - u-boot/commitdiff
rockchip: dts: rk3399: update for spl require driver
authorKever Yang <kever.yang@rock-chips.com>
Wed, 22 Feb 2017 08:56:36 +0000 (16:56 +0800)
committerSimon Glass <sjg@chromium.org>
Thu, 16 Mar 2017 22:03:46 +0000 (16:03 -0600)
Add syscon and dmc node, and 'u-boot,dm-pre-reloc' option for
required driver.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added rockchip tag:
Signed-off-by: Simon Glass <sjg@chromium.org>
arch/arm/dts/rk3399-evb.dts
arch/arm/dts/rk3399.dtsi

index fa60e191edf364e031bf3ba3831ef12fd68527d1..a959989735ffbace8bfda1e0252e7446057f7c9c 100644 (file)
@@ -7,6 +7,7 @@
 /dts-v1/;
 #include <dt-bindings/pwm/pwm.h>
 #include "rk3399.dtsi"
+#include "rk3399-sdram-lpddr3-4GB-1600.dtsi"
 
 / {
        model = "Rockchip RK3399 Evaluation Board";
@@ -69,6 +70,7 @@
 };
 
 &sdmmc {
+       bus-width = <4>;
        status = "okay";
 };
 
index 22277ff0ad7b42de3fe5b90f7c1ed5286159a237..379e04bab37a14db8b6714e8294b90b2d8b160ae 100644 (file)
        };
 
        sdhci: sdhci@fe330000 {
+               u-boot,dm-pre-reloc;
                compatible = "rockchip,rk3399-sdhci-5.1", "arasan,sdhci-5.1";
                reg = <0x0 0xfe330000 0x0 0x10000>;
                interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
        };
 
        pmugrf: syscon@ff320000 {
+               u-boot,dm-pre-reloc;
                compatible = "rockchip,rk3399-pmugrf", "syscon", "simple-mfd";
                reg = <0x0 0xff320000 0x0 0x1000>;
                #address-cells = <1>;
                };
        };
 
+       pmusgrf: syscon@ff330000 {
+               u-boot,dm-pre-reloc;
+               compatible = "rockchip,rk3399-pmusgrf", "syscon";
+               reg = <0x0 0xff330000 0x0 0xe3d4>;
+       };
+
        spi3: spi@ff350000 {
                compatible = "rockchip,rk3399-spi", "rockchip,rk3066-spi";
                reg = <0x0 0xff350000 0x0 0x1000>;
                status = "disabled";
        };
 
+       cic: syscon@ff620000 {
+               u-boot,dm-pre-reloc;
+               compatible = "rockchip,rk3399-cic", "syscon";
+               reg = <0x0 0xff620000 0x0 0x100>;
+       };
+
+       dfi: dfi@ff630000 {
+               reg = <0x00 0xff630000 0x00 0x4000>;
+               compatible = "rockchip,rk3399-dfi";
+               rockchip,pmu = <&pmugrf>;
+               clocks = <&cru PCLK_DDR_MON>;
+               clock-names = "pclk_ddr_mon";
+               status = "disabled";
+       };
+
+       dmc: dmc {
+               u-boot,dm-pre-reloc;
+               compatible = "rockchip,rk3399-dmc";
+               devfreq-events = <&dfi>;
+               interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0>;
+               clocks = <&cru SCLK_DDRCLK>;
+               clock-names = "dmc_clk";
+               reg = <0x0 0xffa80000 0x0 0x0800
+                      0x0 0xffa80800 0x0 0x1800
+                      0x0 0xffa82000 0x0 0x2000
+                      0x0 0xffa84000 0x0 0x1000
+                      0x0 0xffa88000 0x0 0x0800
+                      0x0 0xffa88800 0x0 0x1800
+                      0x0 0xffa8a000 0x0 0x2000
+                      0x0 0xffa8c000 0x0 0x1000>;
+       };
+
        pmucru: pmu-clock-controller@ff750000 {
+               u-boot,dm-pre-reloc;
                compatible = "rockchip,rk3399-pmucru";
                reg = <0x0 0xff750000 0x0 0x1000>;
                #clock-cells = <1>;
        };
 
        cru: clock-controller@ff760000 {
+               u-boot,dm-pre-reloc;
                compatible = "rockchip,rk3399-cru";
                reg = <0x0 0xff760000 0x0 0x1000>;
                #clock-cells = <1>;
        };
 
        grf: syscon@ff770000 {
+               u-boot,dm-pre-reloc;
                compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd";
                reg = <0x0 0xff770000 0x0 0x10000>;
                #address-cells = <1>;
        };
 
        pinctrl: pinctrl {
+               u-boot,dm-pre-reloc;
                compatible = "rockchip,rk3399-pinctrl";
                rockchip,grf = <&grf>;
                rockchip,pmu = <&pmugrf>;