]> git.sur5r.net Git - u-boot/commitdiff
ARM: zynq: Align spi and qspi node locations
authorMichal Simek <michal.simek@xilinx.com>
Thu, 7 Apr 2016 11:04:15 +0000 (13:04 +0200)
committerMichal Simek <michal.simek@xilinx.com>
Wed, 13 Apr 2016 16:29:02 +0000 (18:29 +0200)
Keep nodes alphabelitally sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Nathan Rossi <nathan@nathanrossi.com>
arch/arm/dts/zynq-zc702.dts
arch/arm/dts/zynq-zc706.dts
arch/arm/dts/zynq-zc770-xm010.dts
arch/arm/dts/zynq-zed.dts
arch/arm/dts/zynq-zybo.dts

index 8ad1db281de8787f4c17175dff08923f412181eb..6585010f4bc8b92821878c2f136fd62cd72dbdc9 100644 (file)
        };
 };
 
+&qspi {
+       u-boot,dm-pre-reloc;
+       status = "okay";
+};
+
 &sdhci0 {
        u-boot,dm-pre-reloc;
        status = "okay";
        pinctrl-0 = <&pinctrl_uart1_default>;
 };
 
-&qspi {
-       u-boot,dm-pre-reloc;
-       status = "okay";
-};
-
 &usb0 {
        status = "okay";
        dr_mode = "host";
index cefee253fb06a08316ac269aaef0b656f8bd994d..d04880a2cdd3b4f77405dcefdf8574cdf4203381 100644 (file)
        };
 };
 
+&qspi {
+       u-boot,dm-pre-reloc;
+       status = "okay";
+};
+
 &sdhci0 {
        u-boot,dm-pre-reloc;
        status = "okay";
        pinctrl-0 = <&pinctrl_uart1_default>;
 };
 
-&qspi {
-       u-boot,dm-pre-reloc;
-       status = "okay";
-};
-
 &usb0 {
        status = "okay";
        dr_mode = "host";
index 6dc7c89ddb2b70dcfbf0f78bd26dd0edb67c34dc..33524cb6def54f12b834a28acc0bdecb8fa487d8 100644 (file)
        };
 };
 
-&spi1 {
-       status = "okay";
-       num-cs = <4>;
-       is-decoded-cs = <0>;
-       flash@0 {
-               compatible = "sst25wf080";
-               reg = <1>;
-               spi-max-frequency = <1000000>;
-               #address-cells = <1>;
-               #size-cells = <1>;
-               partition@test {
-                       label = "spi-flash";
-                       reg = <0x0 0x100000>;
-               };
-       };
-};
-
-&qspi {
-       status = "okay";
-};
-
 &can0 {
        status = "okay";
 };
 
 };
 
+&qspi {
+       status = "okay";
+};
+
 &sdhci0 {
        status = "okay";
 };
 
+&spi1 {
+       status = "okay";
+       num-cs = <4>;
+       is-decoded-cs = <0>;
+       flash@0 {
+               compatible = "sst25wf080";
+               reg = <1>;
+               spi-max-frequency = <1000000>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+               partition@test {
+                       label = "spi-flash";
+                       reg = <0x0 0x100000>;
+               };
+       };
+};
+
 &uart1 {
        u-boot,dm-pre-reloc;
        status = "okay";
index b262d83ee672d4c7eb305d372ef194aa0b8a750c..4363a4fcaccb10f61f986e86ac07ed0b663189cc 100644 (file)
        };
 };
 
-&sdhci0 {
+&qspi {
        u-boot,dm-pre-reloc;
        status = "okay";
 };
 
-&uart1 {
+&sdhci0 {
        u-boot,dm-pre-reloc;
        status = "okay";
 };
 
-&qspi {
+&uart1 {
        u-boot,dm-pre-reloc;
        status = "okay";
 };
index acc6e42b46fc41bfe938263d2beafe4d5f4e95f4..f32923f5d25df52aa3093116826cb0e3a73e074c 100644 (file)
        };
 };
 
-&sdhci0 {
+&qspi {
        u-boot,dm-pre-reloc;
        status = "okay";
 };
 
-&uart1 {
+&sdhci0 {
        u-boot,dm-pre-reloc;
        status = "okay";
 };
 
-&qspi {
+&uart1 {
        u-boot,dm-pre-reloc;
        status = "okay";
 };