]> git.sur5r.net Git - u-boot/commitdiff
Exynos5800: Introduce new proid for Exynos5800
authorAkshay Saraswat <akshay.s@samsung.com>
Thu, 13 Nov 2014 17:08:15 +0000 (22:38 +0530)
committerMinkyu Kang <mk7.kang@samsung.com>
Mon, 17 Nov 2014 10:03:38 +0000 (19:03 +0900)
This patch intends to add a new proid for Exynos5800 which is a
variant of Exynos5420. Product id for Exynos5800 is 0x5422.
Both Exynos5420 and Exynos5800 are pin to pin compitable. This
gives us an advantage of reusing Exynos5420 clock, pinmux, memory
and other settings.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
arch/arm/cpu/armv7/exynos/clock.c
arch/arm/cpu/armv7/exynos/clock_init_exynos5.c
arch/arm/cpu/armv7/exynos/pinmux.c
arch/arm/include/asm/arch-exynos/cpu.h
arch/arm/include/asm/arch-exynos/gpio.h

index 7558effdb3388b7dce91a5561e7df0a5071fa85c..4ecce448ce2d9f3f7729e22fa4848729bcf0c2e9 100644 (file)
@@ -118,7 +118,8 @@ static int exynos_get_pll_clk(int pllreg, unsigned int r, unsigned int k)
                        div = PLL_DIV_1024;
                else if (proid_is_exynos4412())
                        div = PLL_DIV_65535;
-               else if (proid_is_exynos5250() || proid_is_exynos5420())
+               else if (proid_is_exynos5250() || proid_is_exynos5420()
+                        || proid_is_exynos5800())
                        div = PLL_DIV_65536;
                else
                        return 0;
@@ -1581,7 +1582,7 @@ static unsigned long exynos4_get_i2c_clk(void)
 unsigned long get_pll_clk(int pllreg)
 {
        if (cpu_is_exynos5()) {
-               if (proid_is_exynos5420())
+               if (proid_is_exynos5420() || proid_is_exynos5800())
                        return exynos5420_get_pll_clk(pllreg);
                return exynos5_get_pll_clk(pllreg);
        } else {
@@ -1617,7 +1618,7 @@ unsigned long get_i2c_clk(void)
 unsigned long get_pwm_clk(void)
 {
        if (cpu_is_exynos5()) {
-               if (proid_is_exynos5420())
+               if (proid_is_exynos5420() || proid_is_exynos5800())
                        return exynos5420_get_pwm_clk();
                return clock_get_periph_rate(PERIPH_ID_PWM0);
        } else {
@@ -1630,7 +1631,7 @@ unsigned long get_pwm_clk(void)
 unsigned long get_uart_clk(int dev_index)
 {
        if (cpu_is_exynos5()) {
-               if (proid_is_exynos5420())
+               if (proid_is_exynos5420() || proid_is_exynos5800())
                        return exynos5420_get_uart_clk(dev_index);
                return exynos5_get_uart_clk(dev_index);
        } else {
@@ -1643,7 +1644,7 @@ unsigned long get_uart_clk(int dev_index)
 unsigned long get_mmc_clk(int dev_index)
 {
        if (cpu_is_exynos5()) {
-               if (proid_is_exynos5420())
+               if (proid_is_exynos5420() || proid_is_exynos5800())
                        return exynos5420_get_mmc_clk(dev_index);
                return exynos5_get_mmc_clk(dev_index);
        } else {
@@ -1654,7 +1655,7 @@ unsigned long get_mmc_clk(int dev_index)
 void set_mmc_clk(int dev_index, unsigned int div)
 {
        if (cpu_is_exynos5()) {
-               if (proid_is_exynos5420())
+               if (proid_is_exynos5420() || proid_is_exynos5800())
                        exynos5420_set_mmc_clk(dev_index, div);
                else
                        exynos5_set_mmc_clk(dev_index, div);
@@ -1668,7 +1669,7 @@ unsigned long get_lcd_clk(void)
        if (cpu_is_exynos4())
                return exynos4_get_lcd_clk();
        else {
-               if (proid_is_exynos5420())
+               if (proid_is_exynos5420() || proid_is_exynos5800())
                        return exynos5420_get_lcd_clk();
                else
                        return exynos5_get_lcd_clk();
@@ -1682,7 +1683,7 @@ void set_lcd_clk(void)
        else {
                if (proid_is_exynos5250())
                        exynos5_set_lcd_clk();
-               else if (proid_is_exynos5420())
+               else if (proid_is_exynos5420() || proid_is_exynos5800())
                        exynos5420_set_lcd_clk();
        }
 }
@@ -1696,7 +1697,7 @@ void set_mipi_clk(void)
 int set_spi_clk(int periph_id, unsigned int rate)
 {
        if (cpu_is_exynos5()) {
-               if (proid_is_exynos5420())
+               if (proid_is_exynos5420() || proid_is_exynos5800())
                        return exynos5420_set_spi_clk(periph_id, rate);
                return exynos5_set_spi_clk(periph_id, rate);
        } else {
index b6a9bc1831e0d5b5fa862dee66d79030a14763b8..0aff3d0d0cf454c25f8e90d8d6f1080dbf3da4c7 100644 (file)
@@ -971,7 +971,7 @@ static void exynos5420_system_clock_init(void)
 
 void system_clock_init(void)
 {
-       if (proid_is_exynos5420())
+       if (proid_is_exynos5420() || proid_is_exynos5800())
                exynos5420_system_clock_init();
        else
                exynos5250_system_clock_init();
index 3d95dc3339e6ee87859748d529510a7036b6cece..94d02970516e9efce5065852bf73182647dfd9de 100644 (file)
@@ -837,7 +837,7 @@ static int exynos4x12_pinmux_config(int peripheral, int flags)
 int exynos_pinmux_config(int peripheral, int flags)
 {
        if (cpu_is_exynos5()) {
-               if (proid_is_exynos5420())
+               if (proid_is_exynos5420() || proid_is_exynos5800())
                        return exynos5420_pinmux_config(peripheral, flags);
                else if (proid_is_exynos5250())
                        return exynos5_pinmux_config(peripheral, flags);
index 78aceef17b18b90a278aa48e25533f3ca86ad2c6..29674ad4dadda7942531df19b2495b535b8ec37d 100644 (file)
@@ -227,6 +227,13 @@ static inline void s5p_set_cpu_id(void)
                /* Exynos5420 */
                s5p_cpu_id = 0x5420;
                break;
+       case 0x422:
+               /*
+                * Exynos5800 is a variant of Exynos5420
+                * and has product id 0x5422
+                */
+               s5p_cpu_id = 0x5800;
+               break;
        }
 }
 
@@ -255,6 +262,7 @@ IS_EXYNOS_TYPE(exynos4210, 0x4210)
 IS_EXYNOS_TYPE(exynos4412, 0x4412)
 IS_EXYNOS_TYPE(exynos5250, 0x5250)
 IS_EXYNOS_TYPE(exynos5420, 0x5420)
+IS_EXYNOS_TYPE(exynos5800, 0x5800)
 
 #define SAMSUNG_BASE(device, base)                             \
 static inline unsigned int __attribute__((no_instrument_function)) \
@@ -265,7 +273,7 @@ static inline unsigned int __attribute__((no_instrument_function)) \
                        return EXYNOS4X12_##base;               \
                return EXYNOS4_##base;                          \
        } else if (cpu_is_exynos5()) {                          \
-               if (proid_is_exynos5420())                      \
+               if (proid_is_exynos5420() || proid_is_exynos5800())     \
                        return EXYNOS5420_##base;               \
                return EXYNOS5_##base;                          \
        }                                                       \
index 02287decc2f008fc19de7426c078740afe3bb208..9699954a7d452c1d0979e8675a9094d658747066 100644 (file)
@@ -1398,7 +1398,7 @@ static struct gpio_info exynos5420_gpio_data[EXYNOS5420_GPIO_NUM_PARTS] = {
 static inline struct gpio_info *get_gpio_data(void)
 {
        if (cpu_is_exynos5()) {
-               if (proid_is_exynos5420())
+               if (proid_is_exynos5420() || proid_is_exynos5800())
                        return exynos5420_gpio_data;
                else
                        return exynos5_gpio_data;
@@ -1415,7 +1415,7 @@ static inline struct gpio_info *get_gpio_data(void)
 static inline unsigned int get_bank_num(void)
 {
        if (cpu_is_exynos5()) {
-               if (proid_is_exynos5420())
+               if (proid_is_exynos5420() || proid_is_exynos5800())
                        return EXYNOS5420_GPIO_NUM_PARTS;
                else
                        return EXYNOS5_GPIO_NUM_PARTS;