reg = <0x58c00000 0x400>, <0x59800000 0x2000>;
};
+ mio: mioctrl@59810000 {
+ /* specify compatible in each SoC DTSI */
+ reg = <0x59810000 0x800>;
+ #clock-cells = <1>;
+ };
+
peri: perictrl@59820000 {
/* specify compatible in each SoC DTSI */
reg = <0x59820000 0x200>;
clock-frequency = <36864000>;
};
+&mio {
+ compatible = "socionext,ph1-ld4-mioctrl";
+ clock-names = "stdmac", "ehci";
+ clocks = <&sysctrl 10>, <&sysctrl 18>;
+};
+
&peri {
compatible = "socionext,ph1-ld4-perictrl";
clock-names = "uart", "i2c";
clock-frequency = <73728000>;
};
+&mio {
+ compatible = "socionext,ph1-pro4-mioctrl";
+ clock-names = "stdmac", "ehci";
+ clocks = <&sysctrl 10>, <&sysctrl 18>;
+};
+
&peri {
compatible = "socionext,ph1-pro4-perictrl";
clock-names = "uart", "fi2c";
clock-frequency = <73728000>;
};
+&mio {
+ compatible = "socionext,ph1-pro5-mioctrl";
+ clock-names = "stdmac";
+ clocks = <&sysctrl 10>;
+};
+
&peri {
compatible = "socionext,ph1-pro5-perictrl";
clock-names = "uart", "fi2c";
reg = <0x59800000 0x2000>;
};
+ mio: mioctrl@59810000 {
+ compatible = "socionext,ph1-sld3-mioctrl";
+ reg = <0x59810000 0x800>;
+ #clock-cells = <1>;
+ clock-names = "stdmac", "ehci";
+ clocks = <&sysctrl 10>, <&sysctrl 18>;
+ };
+
usb0: usb@5a800100 {
compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
clock-frequency = <80000000>;
};
+&mio {
+ compatible = "socionext,ph1-sld8-mioctrl";
+ clock-names = "stdmac", "ehci";
+ clocks = <&sysctrl 10>, <&sysctrl 18>;
+};
+
&peri {
compatible = "socionext,ph1-sld8-perictrl";
clock-names = "uart", "i2c";
clock-frequency = <88900000>;
};
+&mio {
+ compatible = "socionext,proxstream2-mioctrl";
+ clock-names = "stdmac";
+ clocks = <&sysctrl 10>;
+};
+
&peri {
compatible = "socionext,proxstream2-perictrl";
clock-names = "uart", "fi2c";