The bit 22 is in fact DQS tracking enable bit (dqstrken) and there
is a macro for this bit already, so use it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
writel(PHY_MGR_CAL_RESET, &phy_mgr_cfg->cal_status);
/* Stop tracking manager. */
- clrbits_le32(&sdr_ctrl->ctrl_cfg, 1 << 22);
+ clrbits_le32(&sdr_ctrl->ctrl_cfg, SDR_CTRLGRP_CTRLCFG_DQSTRKEN_MASK);
phy_mgr_initialize();
rw_mgr_mem_initialize();
writel(0x2, &phy_mgr_cfg->mux_sel);
/* Start tracking manager. */
- setbits_le32(&sdr_ctrl->ctrl_cfg, 1 << 22);
+ setbits_le32(&sdr_ctrl->ctrl_cfg, SDR_CTRLGRP_CTRLCFG_DQSTRKEN_MASK);
return pass;
}