Using CPU_HAS_PCR micro to present the SoC has pcr
(peripheral control register).
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
u32 reserved5[21];
u32 wpmr; /* 0xE4 Write Protect Mode Register (CAP0) */
u32 wpsr; /* 0xE8 Write Protect Status Register (CAP0) */
-#ifdef CONFIG_SAMA5D3
+#ifdef CPU_HAS_PCR
u32 reserved6[8];
u32 pcer1; /* 0x100 Periperial Clock Enable Register 1 */
u32 pcdr1; /* 0x104 Periperial Clock Disable Register 1 */
#define ATMEL_PIO_PORTS 5
#define CPU_HAS_PIO3
#define PIO_SCDR_DIV 0x3fff
+#define CPU_HAS_PCR
/*
* PMECC table in ROM