lcd_printf ("at91support@atmel.com\n");
lcd_printf ("%s CPU at %s MHz\n",
AT91_CPU_NAME,
- strmhz(temp, AT91_MAIN_CLOCK));
+ strmhz(temp, AT91_CPU_CLOCK));
dram_size = 0;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
lcd_printf ("at91support@atmel.com\n");
lcd_printf ("%s CPU at %s MHz\n",
AT91_CPU_NAME,
- strmhz(temp, AT91_MAIN_CLOCK));
+ strmhz(temp, AT91_CPU_CLOCK));
dram_size = 0;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
lcd_printf ("at91support@atmel.com\n");
lcd_printf ("%s CPU at %s MHz\n",
AT91_CPU_NAME,
- strmhz(temp, AT91_MAIN_CLOCK));
+ strmhz(temp, AT91_CPU_CLOCK));
dram_size = 0;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
lcd_printf ("at91support@atmel.com\n");
lcd_printf ("%s CPU at %s MHz\n",
AT91_CPU_NAME,
- strmhz(temp, AT91_MAIN_CLOCK));
+ strmhz(temp, AT91_CPU_CLOCK));
dram_size = 0;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
/* ARM asynchronous clock */
#define AT91_CPU_NAME "AT91CAP9"
-#define AT91_MAIN_CLOCK 200000000 /* from 12 MHz crystal */
-#define AT91_MASTER_CLOCK 100000000 /* peripheral = main / 2 */
-#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
+#define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
+#define AT91_MASTER_CLOCK 100000000 /* peripheral */
+#define AT91_CPU_CLOCK 200000000 /* cpu */
+#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
#define AT91_SLOW_CLOCK 32768 /* slow clock */
#define __CONFIG_H
/* ARM asynchronous clock */
-#define AT91_MAIN_CLOCK 198656000 /* from 18.432 MHz crystal */
-#define AT91_MASTER_CLOCK 99328000 /* peripheral = main / 2 */
-#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
+#define AT91_CPU_NAME "AT91SAM9260"
+#define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
+#define AT91_MASTER_CLOCK 100000000 /* peripheral */
+#define AT91_CPU_CLOCK 200000000 /* cpu */
+#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
#define AT91_SLOW_CLOCK 32768 /* slow clock */
/* ARM asynchronous clock */
#define AT91_CPU_NAME "AT91SAM9261"
-#define AT91_MAIN_CLOCK 198656000 /* from 18.432 MHz crystal */
-#define AT91_MASTER_CLOCK 99328000 /* peripheral = main / 2 */
-#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
+#define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
+#define AT91_MASTER_CLOCK 100000000 /* peripheral */
+#define AT91_CPU_CLOCK 200000000 /* cpu */
+#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
#define AT91_SLOW_CLOCK 32768 /* slow clock */
/* ARM asynchronous clock */
#define AT91_CPU_NAME "AT91SAM9263"
-#define AT91_MAIN_CLOCK 199919000 /* from 16.367 MHz crystal */
-#define AT91_MASTER_CLOCK 99959500 /* peripheral = main / 2 */
-#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
+#define AT91_MAIN_CLOCK 16367660 /* 16.367 MHz crystal */
+#define AT91_MASTER_CLOCK 100000000 /* peripheral */
+#define AT91_CPU_CLOCK 200000000 /* cpu */
+#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
#define AT91_SLOW_CLOCK 32768 /* slow clock */
/* ARM asynchronous clock */
#define AT91_CPU_NAME "AT91SAM9RL"
-#define AT91_MAIN_CLOCK 200000000 /* from 12.000 MHz crystal */
-#define AT91_MASTER_CLOCK 100000000 /* peripheral = main / 2 */
-#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
+#define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
+#define AT91_MASTER_CLOCK 100000000 /* peripheral */
+#define AT91_CPU_CLOCK 200000000 /* cpu */
+#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
#define AT91_SLOW_CLOCK 32768 /* slow clock */