imx: timer: don't clear the GPT control register multiple times

There is no need to clear the control register 100 times in a
loop, a single zero write clears the register. I didn't find any
justification why clearing this register in a loop is needed
(no info in i.MX6 errata or GPT timer linux driver, linux driver
uses single write to clear this control register).

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>

diff --git a/arch/arm/mach-imx/timer.c b/arch/arm/mach-imx/timer.c
index 9b011147d66861ccc8c9d2188a8de9536522901b..69dbf3c2cebf6bccc45c401394381709b49b9151 100644 (file)
--- a/arch/arm/mach-imx/timer.c
+++ b/arch/arm/mach-imx/timer.c
@@ -74,8 +74,7 @@ int timer_init(void)
        __raw_writel(GPTCR_SWR, &cur_gpt->control);
 
        /* We have no udelay by now */
-       for (i = 0; i < 100; i++)
-               __raw_writel(0, &cur_gpt->control);
+       __raw_writel(0, &cur_gpt->control);
 
        i = __raw_readl(&cur_gpt->control);
        i &= ~GPTCR_CLKSOURCE_MASK;