]> git.sur5r.net Git - u-boot/commitdiff
ARM: rmobile: Configure DRAM sizes from DT
authorMarek Vasut <marek.vasut+renesas@gmail.com>
Mon, 27 Nov 2017 04:37:53 +0000 (05:37 +0100)
committerMarek Vasut <marek.vasut+renesas@gmail.com>
Thu, 30 Nov 2017 01:34:20 +0000 (02:34 +0100)
Drop the ad-hoc DRAM configuration with macros and just decode
the DRAM configuration from device tree instead. This makes it
far cleaner and easier.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
board/renesas/salvator-x/salvator-x.c
board/renesas/ulcb/ulcb.c

index f21360c4c5287b4f10f6deafe5f8c2a5da5a3a17..882a35c1400d2518a52e82e8cf88bc85dfd2c3a0 100644 (file)
@@ -109,36 +109,16 @@ int board_init(void)
 
 int dram_init(void)
 {
-       gd->ram_size = PHYS_SDRAM_1_SIZE;
-#if (CONFIG_NR_DRAM_BANKS >= 2)
-       gd->ram_size += PHYS_SDRAM_2_SIZE;
-#endif
-#if (CONFIG_NR_DRAM_BANKS >= 3)
-       gd->ram_size += PHYS_SDRAM_3_SIZE;
-#endif
-#if (CONFIG_NR_DRAM_BANKS >= 4)
-       gd->ram_size += PHYS_SDRAM_4_SIZE;
-#endif
+       if (fdtdec_setup_memory_size() != 0)
+               return -EINVAL;
 
        return 0;
 }
 
 int dram_init_banksize(void)
 {
-       gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
-       gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-#if (CONFIG_NR_DRAM_BANKS >= 2)
-       gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
-       gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
-#endif
-#if (CONFIG_NR_DRAM_BANKS >= 3)
-       gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
-       gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
-#endif
-#if (CONFIG_NR_DRAM_BANKS >= 4)
-       gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
-       gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
-#endif
+       fdtdec_setup_memory_banksize();
+
        return 0;
 }
 
index 000dd51ab7c5dba7703d6ee684bdf367c0e318d9..ed891c833c3e33fbe00731b5c2f4b7b7823e3013 100644 (file)
@@ -97,35 +97,15 @@ int board_init(void)
 
 int dram_init(void)
 {
-       gd->ram_size = PHYS_SDRAM_1_SIZE;
-#if (CONFIG_NR_DRAM_BANKS >= 2)
-       gd->ram_size += PHYS_SDRAM_2_SIZE;
-#endif
-#if (CONFIG_NR_DRAM_BANKS >= 3)
-       gd->ram_size += PHYS_SDRAM_3_SIZE;
-#endif
-#if (CONFIG_NR_DRAM_BANKS >= 4)
-       gd->ram_size += PHYS_SDRAM_4_SIZE;
-#endif
+       if (fdtdec_setup_memory_size() != 0)
+               return -EINVAL;
 
        return 0;
 }
 
 int dram_init_banksize(void)
 {
-       gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
-       gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-#if (CONFIG_NR_DRAM_BANKS >= 2)
-       gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
-       gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
-#endif
-#if (CONFIG_NR_DRAM_BANKS >= 3)
-       gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
-       gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
-#endif
-#if (CONFIG_NR_DRAM_BANKS >= 4)
-       gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
-       gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
-#endif
+       fdtdec_setup_memory_banksize();
+
        return 0;
 }