*/
 
 #include <common.h>
+#include <ns16550.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/hardware.h>
        share_all_segments(11); /* PCIE */
 #endif
 
+       /*
+        * just initialise the COM2 port so that TI specific
+        * UART register PWREMU_MGMT is initialized. Linux UART
+        * driver doesn't handle this.
+        */
+       NS16550_init((NS16550_t)(CONFIG_SYS_NS16550_COM2),
+                    CONFIG_SYS_NS16550_CLK / 16 / CONFIG_BAUDRATE);
+
        return 0;
 }
 
 
 #define K2HK_LPSC_ARM_SREFLEX          51
 #define K2HK_LPSC_TETRIS               52
 
-#define K2HK_UART0_BASE                0x02530c00
-
 /* DDR3A definitions */
 #define K2HK_DDR3A_EMIF_CTRL_BASE      0x21010000
 #define K2HK_DDR3A_EMIF_DATA_BASE      0x80000000
 
 #define KS2_DDR3_PMCTL_OFFSET           0x38
 #define KS2_DDR3_ZQCFG_OFFSET           0xC8
 
+#define KS2_UART0_BASE                 0x02530c00
+#define KS2_UART1_BASE                 0x02531000
+
 #ifdef CONFIG_SOC_K2HK
 #include <asm/arch/hardware-k2hk.h>
 #endif
 
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_MEM32
 #define CONFIG_SYS_NS16550_REG_SIZE     -4
-#define CONFIG_SYS_NS16550_COM1         K2HK_UART0_BASE
+#define CONFIG_SYS_NS16550_COM1         KS2_UART0_BASE
+#define CONFIG_SYS_NS16550_COM2         KS2_UART1_BASE
 #define CONFIG_SYS_NS16550_CLK          clk_get_rate(K2HK_CLK1_6)
 #define CONFIG_CONS_INDEX               1
 #define CONFIG_BAUDRATE                 115200