]> git.sur5r.net Git - u-boot/commitdiff
Merge branch 'master' of git://www.denx.de/git/u-boot-avr32
authorWolfgang Denk <wd@denx.de>
Sat, 13 Oct 2007 21:01:27 +0000 (23:01 +0200)
committerWolfgang Denk <wd@denx.de>
Sat, 13 Oct 2007 21:01:27 +0000 (23:01 +0200)
board/atmel/atstk1000/flash.c
include/asm-avr32/string.h
include/configs/atstk1002.h
lib_avr32/board.c

index 958f4dc330c82fb0c245c3fafcf2deae7306632e..93d790f1731c67f4b9b65eeb59dd8266b8c1fcb0 100644 (file)
@@ -55,10 +55,6 @@ unsigned long flash_init(void)
        unsigned long addr;
        unsigned int i;
 
-       gd->bd->bi_flashstart = CFG_FLASH_BASE;
-       gd->bd->bi_flashsize = CFG_FLASH_SIZE;
-       gd->bd->bi_flashoffset = _edata - _text;
-
        flash_info[0].size = CFG_FLASH_SIZE;
        flash_info[0].sector_count = 135;
 
index 8b05d1a031e029f6f4ec03dd4d71cfbc9bf0935d..58582a3115ddc7e78a902deea11ef5cdaf280cd3 100644 (file)
@@ -23,6 +23,6 @@
 #define __ASM_AVR32_STRING_H
 
 #define __HAVE_ARCH_MEMSET
-extern void *memset(void *s, int c, size_t n);
+extern void *memset(void *s, int c, __kernel_size_t n);
 
 #endif /* __ASM_AVR32_STRING_H */
index 75b153e4a85002ec77a9c7e1869f28bc3cbcf8ac..1809fc5d86401c21ee4281df7aa9ea57ae000a55 100644 (file)
 #define CFG_HZ                         1000
 
 /*
- * Set up the PLL to run at 199.5 MHz, the CPU to run at 1/2 the PLL
- * frequency and the peripherals to run at 1/4 the PLL frequency.
+ * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
+ * frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the
+ * PLL frequency.
+ * (CFG_OSC0_HZ * CFG_PLL0_MUL) / CFG_PLL0_DIV = PLL MHz
  */
 #define CONFIG_PLL                     1
 #define CFG_POWER_MANAGER              1
 #define CFG_PLL0_DIV                   1
 #define CFG_PLL0_MUL                   7
 #define CFG_PLL0_SUPPRESS_CYCLES       16
+/*
+ * Set the CPU running at:
+ * PLL / (2^CFG_CLKDIV_CPU) = CPU MHz
+ */
 #define CFG_CLKDIV_CPU                 0
+/*
+ * Set the HSB running at:
+ * PLL / (2^CFG_CLKDIV_HSB) = HSB MHz
+ */
 #define CFG_CLKDIV_HSB                 1
+/*
+ * Set the PBA running at:
+ * PLL / (2^CFG_CLKDIV_PBA) = PBA MHz
+ */
 #define CFG_CLKDIV_PBA                 2
+/*
+ * Set the PBB running at:
+ * PLL / (2^CFG_CLKDIV_PBB) = PBB MHz
+ */
 #define CFG_CLKDIV_PBB                 1
 
 /*
@@ -78,7 +96,7 @@
 
 #define CONFIG_BAUDRATE                        115200
 #define CONFIG_BOOTARGS                                                        \
-       "console=ttyS0 root=/dev/mtdblock1 rootfstype=jffs2 fbmem=600k"
+       "console=ttyS0 root=/dev/mmcblk0p1 fbmem=600k rootwait=1"
 
 #define CONFIG_BOOTCOMMAND                                             \
        "fsload; bootm $(fileaddr)"
  * Only interrupt autoboot if <space> is pressed. Otherwise, garbage
  * data on the serial line may interrupt the boot sequence.
  */
-#define CONFIG_BOOTDELAY               2
+#define CONFIG_BOOTDELAY               1
 #define CONFIG_AUTOBOOT                        1
 #define CONFIG_AUTOBOOT_KEYED          1
 #define CONFIG_AUTOBOOT_PROMPT                         \
  * generated and assigned to the environment variables "ethaddr" and
  * "eth1addr".
  */
-#define CONFIG_ETHADDR                 "6a:87:71:14:cd:cb"
-#define CONFIG_ETH1ADDR                        "ca:f8:15:e6:3e:e6"
+#define CONFIG_ETHADDR                 6a:87:71:14:cd:cb
+#define CONFIG_ETH1ADDR                        ca:f8:15:e6:3e:e6
 #define CONFIG_OVERWRITE_ETHADDR_ONCE  1
 #define CONFIG_NET_MULTI               1
 
 #define CFG_PBSIZE                     (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
 #define CFG_LONGHELP                   1
 
-#define CFG_MEMTEST_START                                              \
-       ({ gd->bd->bi_dram[0].start; })
-#define CFG_MEMTEST_END                                                        \
-       ({                                                              \
-               gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size;     \
-       })
+#define CFG_MEMTEST_START              CFG_SDRAM_BASE
+#define CFG_MEMTEST_END                        (CFG_MEMTEST_START + 0x700000)
 #define CFG_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 }
 
 #endif /* __CONFIG_H */
index 8b9ca38f50cf2bf16b11ccbe8df752c52da747e5..11d864feacabb66b783916b3a6cd0ddca41c314b 100644 (file)
@@ -310,10 +310,20 @@ void board_init_r(gd_t *new_gd, ulong dest_addr)
        malloc_bin_reloc();
        dma_alloc_init();
        board_init_info();
-       flash_init();
+
+       bd->bi_flashstart = 0;
+       bd->bi_flashsize = 0;
+       bd->bi_flashoffset = 0;
+
+#ifndef CFG_NO_FLASH
+       bd->bi_flashstart = CFG_FLASH_BASE;
+       bd->bi_flashsize = flash_init();
+       bd->bi_flashoffset = (unsigned long)_edata - (unsigned long)_text;
 
        if (bd->bi_flashsize)
                display_flash_config();
+#endif
+
        if (bd->bi_dram[0].size)
                display_dram_config();