]> git.sur5r.net Git - u-boot/commitdiff
DaVinci DM6467: Enhance board Support
authorSandeep Paulraj <s-paulraj@ti.com>
Tue, 28 Dec 2010 22:38:22 +0000 (17:38 -0500)
committerAlbert Aribaud <albert.aribaud@free.fr>
Tue, 1 Feb 2011 23:54:44 +0000 (00:54 +0100)
Support for DM6467 was incomplete and the build failed
as well. Patches were sent to the list but have not been
added. This enhances the DM6467 support.
Some more patches will need to be sent to bring
it in line with what is available in internal TI
trees

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
arch/arm/include/asm/arch-davinci/hardware.h
board/davinci/dm6467evm/dm6467evm.c
include/configs/davinci_dm6467evm.h

index b95fa97bacc154fe1e0be03287a93e5713e16070..df3f549ba42f7ef2c6f3e7245e4adf7ff28a7c6d 100644 (file)
@@ -209,6 +209,7 @@ typedef volatile unsigned int *     dv_reg_p;
 #define DAVINCI_DM646X_LPSC_EMAC       14
 #define DAVINCI_DM646X_LPSC_UART0      26
 #define DAVINCI_DM646X_LPSC_I2C                31
+#define DAVINCI_DM646X_LPSC_TIMER0     34
 
 #else /* CONFIG_SOC_DA8XX */
 
index 994a9aae9fa701ce4a6d0ff02c3af7c527cdba63..1a01c3ce2cab58bfba2bf283828274f79ab2cc71 100644 (file)
@@ -17,6 +17,7 @@
  */
 
 #include <common.h>
+#include <netdev.h>
 #include <asm/io.h>
 #include <nand.h>
 #include <asm/arch/nand_defs.h>
@@ -28,8 +29,33 @@ int board_init(void)
        gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DM6467_EVM;
        gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
 
+       lpsc_on(DAVINCI_DM646X_LPSC_TIMER0);
+       lpsc_on(DAVINCI_DM646X_LPSC_UART0);
+       lpsc_on(DAVINCI_DM646X_LPSC_I2C);
+       lpsc_on(DAVINCI_DM646X_LPSC_EMAC);
+
+       /* Enable GIO3.3V cells used for EMAC */
+       REG(VDD3P3V_PWDN) = 0x80000c0;
+
+       /* Select UART function on UART0 */
+       REG(PINMUX0) &= ~(0x0000003f << 18);
+       REG(PINMUX1) &= ~(0x00000003);
+
+       return 0;
+}
+
+#if defined(CONFIG_DRIVER_TI_EMAC)
+
+int board_eth_init(bd_t *bis)
+{
+       if (!davinci_emac_initialize()) {
+               printf("Error: Ethernet init failed!\n");
+               return -1;
+       }
+
        return 0;
 }
+#endif /* CONFIG_DRIVER_TI_EMAC */
 
 #ifdef CONFIG_NAND_DAVINCI
 int board_nand_init(struct nand_chip *nand)
index 3ef4555627b13654862434288b36e6abdb4d51a9..a0a30f57859571c00c3291f2a424d40876734062 100644 (file)
 
 /* Spectrum Digital TMS320DM6467 EVM board */
 #define DAVINCI_DM6467EVM
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_SYS_USE_NAND
+#define CONFIG_SYS_NAND_SMALLPAGE
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
 /* SoC Configuration */
 #define CONFIG_ARM926EJS                               /* arm926ejs CPU */
+
+/* Clock rates detection */
+#ifndef __ASSEMBLY__
+extern unsigned int davinci_arm_clk_get(void);
+#endif
+
+#define CFG_REFCLK_FREQ                27000000
+/* Arm Clock frequency    */
+#define CONFIG_SYS_CLK_FREQ    davinci_arm_clk_get()
+/* Timer Input clock freq */
+#define CONFIG_SYS_HZ_CLOCK            (CONFIG_SYS_CLK_FREQ/2)
 #define CONFIG_SYS_TIMERBASE           0x01c21400      /* use timer 0 */
-#define CONFIG_SYS_HZ_CLOCK            27000000
 #define CONFIG_SYS_HZ                  1000
 #define CONFIG_SOC_DM646X
 
 #define CONFIG_SYS_I2C_SPEED           80000
 #define CONFIG_SYS_I2C_SLAVE           10
 
+/* Network & Ethernet Configuration */
+#define CONFIG_DRIVER_TI_EMAC
+#define CONFIG_EMAC_MDIO_PHY_NUM       1
+#define CONFIG_MII
+#define CONFIG_BOOTP_DEFAULT
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_NET_RETRY_COUNT 10
+#define CONFIG_NET_MULTI
+#define CONFIG_CMD_NET
+
 /* Flash & Environment */
 #define CONFIG_SYS_NO_FLASH
 #ifdef CONFIG_SYS_USE_NAND
 #define CONFIG_CMD_MII
 #define CONFIG_CMD_SAVES
 #define CONFIG_CMD_EEPROM
-#undef CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
 #undef CONFIG_CMD_BDI
 #undef CONFIG_CMD_FPGA
 #undef CONFIG_CMD_SETGETDCR