]> git.sur5r.net Git - u-boot/commitdiff
ARM: davinci: Move CONFIG_SYS_DA850_DDR_INIT to Kconfig
authorFabien Parent <fparent@baylibre.com>
Tue, 29 Nov 2016 13:23:37 +0000 (14:23 +0100)
committerTom Rini <trini@konsulko.com>
Sat, 3 Dec 2016 18:21:12 +0000 (13:21 -0500)
Clean config headers by moving CONFIG_SYS_DA850_DDR_INIT away to a
Kconfig file.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
arch/arm/mach-davinci/Kconfig
include/configs/calimain.h
include/configs/da850evm.h
include/configs/ipam390.h
include/configs/legoev3.h
scripts/config_whitelist.txt

index ffb9a45475fbdbd3d406f4f11f3a38d06e76738c..cf4ee166a537510300f529392308b53f4e8e507d 100644 (file)
@@ -8,11 +8,13 @@ config TARGET_IPAM390
        bool "IPAM390 board"
        select SUPPORT_SPL
        select SYS_DA850_PLL_INIT
+       select SYS_DA850_DDR_INIT
 
 config TARGET_DA850EVM
        bool "DA850 EVM board"
        select SUPPORT_SPL
        select SYS_DA850_PLL_INIT
+       select SYS_DA850_DDR_INIT
 
 config TARGET_EA20
        bool "EA20 board"
@@ -24,10 +26,12 @@ config TARGET_OMAPL138_LCDK
 config TARGET_CALIMAIN
        bool "Calimain board"
        select SYS_DA850_PLL_INIT
+       select SYS_DA850_DDR_INIT
 
 config TARGET_LEGOEV3
        bool "LEGO MINDSTORMS EV3"
        select SYS_DA850_PLL_INIT
+       select SYS_DA850_DDR_INIT
 
 endchoice
 
@@ -37,6 +41,9 @@ config SYS_SOC
 config SYS_DA850_PLL_INIT
        bool
 
+config SYS_DA850_DDR_INIT
+       bool
+
 source "board/Barix/ipam390/Kconfig"
 source "board/davinci/da8xxevm/Kconfig"
 source "board/davinci/ea20/Kconfig"
index 41c8eb5f3339ca4a72ec5cdc04b22acbaceefe3f..dab4ec2aacf4aebe6129dfc8b19efc6aeba648b3 100644 (file)
@@ -32,7 +32,6 @@
 #define CONFIG_SYS_HZ_CLOCK            clk_get(DAVINCI_AUXCLK_CLKID)
 #define CONFIG_SYS_TEXT_BASE           0x60000000
 #define CONFIG_DA850_LOWLEVEL
-#define CONFIG_SYS_DA850_DDR_INIT
 #define CONFIG_ARCH_CPU_INIT
 #define CONFIG_DA8XX_GPIO
 #define CONFIG_HW_WATCHDOG
index 1f3b003c2519da58f7256cdd0054126faa226f01..18a8e26a228f5ce87956ba75a35a26f88450ec87 100644 (file)
@@ -31,7 +31,6 @@
 #define CONFIG_SYS_OSCIN_FREQ          24000000
 #define CONFIG_SYS_TIMERBASE           DAVINCI_TIMER0_BASE
 #define CONFIG_SYS_HZ_CLOCK            clk_get(DAVINCI_AUXCLK_CLKID)
-#define CONFIG_SYS_DA850_DDR_INIT
 
 #ifdef CONFIG_DIRECT_NOR_BOOT
 #define CONFIG_ARCH_CPU_INIT
index 13c9d5619d82262c3e01248eab5ebb2542fdc4ab..991dad1ce356d829471c79d1bbab19cbc5bfa9bf 100644 (file)
@@ -32,7 +32,6 @@
 #define CONFIG_SYS_OSCIN_FREQ          24000000
 #define CONFIG_SYS_TIMERBASE           DAVINCI_TIMER0_BASE
 #define CONFIG_SYS_HZ_CLOCK            clk_get(DAVINCI_AUXCLK_CLKID)
-#define CONFIG_SYS_DA850_DDR_INIT
 #define CONFIG_SYS_TEXT_BASE           0xc1080000
 
 /*
index adb2446e7077779e5ded89baca01b330791f5a9a..f2f82acc993f70e44c8778e1120c7ff1e455dcc6 100644 (file)
@@ -26,7 +26,6 @@
 #define CONFIG_SYS_OSCIN_FREQ          24000000
 #define CONFIG_SYS_TIMERBASE           DAVINCI_TIMER0_BASE
 #define CONFIG_SYS_HZ_CLOCK            clk_get(DAVINCI_AUXCLK_CLKID)
-#define CONFIG_SYS_DA850_DDR_INIT
 
 #define CONFIG_SYS_TEXT_BASE           0xc1080000
 
index dae2c99763b6e35ba3efee664c7487d0edf32054..a08d90ece4cf57985cf59b7f5382cb4683a18511 100644 (file)
@@ -4690,7 +4690,6 @@ CONFIG_SYS_DA850_DDR2_SDBCR2
 CONFIG_SYS_DA850_DDR2_SDRCR
 CONFIG_SYS_DA850_DDR2_SDTIMR
 CONFIG_SYS_DA850_DDR2_SDTIMR2
-CONFIG_SYS_DA850_DDR_INIT
 CONFIG_SYS_DA850_PLL0_PLLDIV1
 CONFIG_SYS_DA850_PLL0_PLLDIV2
 CONFIG_SYS_DA850_PLL0_PLLDIV3